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xes: Update Freescale DDR code to work with 86xx processors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -31,7 +31,7 @@ LIB = $(obj)lib$(VENDOR).a
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COBJS-$(CONFIG_FSL_PCI_INIT) += fsl_8xxx_pci.o
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COBJS-$(CONFIG_MPC8572) += fsl_8572_clk.o
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COBJS-$(CONFIG_MPC85xx) += fsl_85xx_ddr.o
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COBJS-$(CONFIG_FSL_DDR2) += fsl_8xxx_ddr.o
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COBJS-$(CONFIG_NAND_ACTL) += actl_nand.o
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SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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@ -32,9 +32,10 @@ phys_size_t initdram(int board_type)
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{
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phys_size_t dram_size = fsl_ddr_sdram();
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#ifdef CONFIG_MPC85xx
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dram_size = setup_ddr_tlbs(dram_size / 0x100000);
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dram_size *= 0x100000;
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#endif
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#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
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/* Initialize and enable DDR ECC */
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@ -48,7 +49,12 @@ phys_size_t initdram(int board_type)
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void board_add_ram_info(int use_default)
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{
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#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
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#if defined(CONFIG_MPC85xx)
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volatile ccsr_ddr_t *ddr1 = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
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#elif defined(CONFIG_MPC86xx)
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volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
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#endif
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#endif
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puts(" (");
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