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Merge branch '2023-07-21-assorted-TI-platform-updates'

Browse Source 
- The first half of a number of TI platform bugfixes and improvements,
  primarily around K3 platforms and splash screen support.
This commit is contained in:
Tom Rini 2023-07-21 19:33:05 -04:00
commit 247aa5a191
33 changed files with 447 additions and 190 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/dts/Makefile
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@ -1306,7 +1306,7 @@ dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \
dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \
k3-am625-r5-sk.dtb
dtb-$(CONFIG_SOC_K3_AM625) += k3-am62a7-sk.dtb \
dtb-$(CONFIG_SOC_K3_AM62A7) += k3-am62a7-sk.dtb \
k3-am62a7-r5-sk.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += \

7
arch/arm/mach-k3/Makefile
View File

@ -10,6 +10,13 @@ obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
obj-$(CONFIG_ARM64) += arm64-mmu.o
obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o
obj-$(CONFIG_ARM64) += cache.o
obj-$(CONFIG_OF_LIBFDT) += common_fdt.o
ifeq ($(CONFIG_OF_LIBFDT)$(CONFIG_OF_SYSTEM_SETUP),yy)
obj-$(CONFIG_SOC_K3_AM654) += am654_fdt.o
obj-$(CONFIG_SOC_K3_J721E) += j721e_fdt.o
obj-$(CONFIG_SOC_K3_J721S2) += j721s2_fdt.o
obj-$(CONFIG_SOC_K3_AM625) += am625_fdt.o
endif
ifeq ($(CONFIG_SPL_BUILD),y)
obj-$(CONFIG_SOC_K3_AM654) += am654_init.o
obj-$(CONFIG_SOC_K3_J721E) += j721e_init.o

71
arch/arm/mach-k3/am625_fdt.c Normal file
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@ -0,0 +1,71 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2023 Toradex - https://www.toradex.com/
*/
#include <asm/hardware.h>
#include "common_fdt.h"
#include <fdt_support.h>
static void fdt_fixup_cores_nodes_am625(void *blob, int core_nr)
{
char node_path[32];
if (core_nr < 1)
return;
for (; core_nr < 4; core_nr++) {
snprintf(node_path, sizeof(node_path), "/cpus/cpu@%d", core_nr);
fdt_del_node_path(blob, node_path);
snprintf(node_path, sizeof(node_path), "/cpus/cpu-map/cluster0/core%d", core_nr);
fdt_del_node_path(blob, node_path);
snprintf(node_path, sizeof(node_path), "/bus@f0000/watchdog@e0%d0000", core_nr);
fdt_del_node_path(blob, node_path);
}
}
static void fdt_fixup_gpu_nodes_am625(void *blob, int has_gpu)
{
if (!has_gpu) {
fdt_del_node_path(blob, "/bus@f0000/gpu@fd00000");
fdt_del_node_path(blob, "/bus@f0000/watchdog@e0f0000");
}
}
static void fdt_fixup_pru_node_am625(void *blob, int has_pru)
{
if (!has_pru)
fdt_del_node_path(blob, "/bus@f0000/pruss@30040000");
}
static int k3_get_core_nr(void)
{
u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
return (full_devid & JTAG_DEV_CORE_NR_MASK) >> JTAG_DEV_CORE_NR_SHIFT;
}
static int k3_has_pru(void)
{
u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
u32 feature_mask = (full_devid & JTAG_DEV_FEATURES_MASK) >>
JTAG_DEV_FEATURES_SHIFT;
return !(feature_mask & JTAG_DEV_FEATURE_NO_PRU);
}
static int k3_has_gpu(void)
{
u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
return (full_devid & JTAG_DEV_GPU_MASK) >> JTAG_DEV_GPU_SHIFT;
}
int ft_system_setup(void *blob, struct bd_info *bd)
{
fdt_fixup_cores_nodes_am625(blob, k3_get_core_nr());
fdt_fixup_gpu_nodes_am625(blob, k3_has_gpu());
fdt_fixup_pru_node_am625(blob, k3_has_pru());
return 0;
}

1
arch/arm/mach-k3/am625_init.c
View File

@ -214,6 +214,7 @@ void board_init_f(ulong dummy)
if (ret)
panic("DRAM init failed: %d\n", ret);
#endif
spl_enable_dcache();
}
u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)

11
arch/arm/mach-k3/am62a7_init.c
View File

@ -14,6 +14,10 @@
#include <dm/uclass-internal.h>
#include <dm/pinctrl.h>
struct fwl_data cbass_main_fwls[] = {
{ "FSS_DAT_REG3", 7, 8 },
};
/*
* This uninitialized global variable would normal end up in the .bss section,
* but the .bss is cleared between writing and reading this variable, so move
@ -166,6 +170,9 @@ void board_init_f(ulong dummy)
/* Output System Firmware version info */
k3_sysfw_print_ver();
/* Disable ROM configured firewalls right after loading sysfw */
remove_fwl_configs(cbass_main_fwls, ARRAY_SIZE(cbass_main_fwls));
#if defined(CONFIG_K3_AM62A_DDRSS)
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)
@ -174,7 +181,7 @@ void board_init_f(ulong dummy)
setup_qos();
printf("am62a_init: %s done\n", __func__);
debug("am62a_init: %s done\n", __func__);
}
static u32 __get_backup_bootmedia(u32 devstat)
@ -272,7 +279,7 @@ u32 spl_boot_device(void)
else
bootmedia = __get_backup_bootmedia(devstat);
printf("am62a_init: %s: devstat = 0x%x bootmedia = 0x%x bootindex = %d\n",
debug("am62a_init: %s: devstat = 0x%x bootmedia = 0x%x bootindex = %d\n",
__func__, devstat, bootmedia, bootindex);
return bootmedia;
}

8
arch/arm/mach-k3/am62ax/dev-data.c
View File

@ -66,8 +66,8 @@ const struct ti_k3_pd_platdata am62ax_pd_platdata = {
.pd = soc_pd_list,
.lpsc = soc_lpsc_list,
.devs = soc_dev_list,
.num_psc = 2,
.num_pd = 4,
.num_lpsc = 14,
.num_devs = 19,
.num_psc = ARRAY_SIZE(soc_psc_list),
.num_pd = ARRAY_SIZE(soc_pd_list),
.num_lpsc = ARRAY_SIZE(soc_lpsc_list),
.num_devs = ARRAY_SIZE(soc_dev_list),
};

8
arch/arm/mach-k3/am62x/dev-data.c
View File

@ -71,8 +71,8 @@ const struct ti_k3_pd_platdata am62x_pd_platdata = {
.pd = soc_pd_list,
.lpsc = soc_lpsc_list,
.devs = soc_dev_list,
.num_psc = 2,
.num_pd = 5,
.num_lpsc = 16,
.num_devs = 21,
.num_psc = ARRAY_SIZE(soc_psc_list),
.num_pd = ARRAY_SIZE(soc_pd_list),
.num_lpsc = ARRAY_SIZE(soc_lpsc_list),
.num_devs = ARRAY_SIZE(soc_dev_list),
};

12
arch/arm/mach-k3/am654_fdt.c Normal file
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@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2023 Toradex - https://www.toradex.com/
*/
#include "common_fdt.h"
#include <fdt_support.h>
int ft_system_setup(void *blob, struct bd_info *bd)
{
return fdt_fixup_msmc_ram_k3(blob);
}

93
arch/arm/mach-k3/common.c
View File

@ -357,97 +357,6 @@ void board_fit_image_post_process(const void *fit, int node, void **p_image,
}
#endif
#if defined(CONFIG_OF_LIBFDT)
int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name)
{
u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2];
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
int ret, node, subnode, len, prev_node;
u32 range[4], addr, size;
const fdt32_t *sub_reg;
ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end);
msmc_size = msmc_end - msmc_start + 1;
debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__,
msmc_start, msmc_size);
/* find or create "msmc_sram node */
ret = fdt_path_offset(blob, parent_path);
if (ret < 0)
return ret;
node = fdt_find_or_add_subnode(blob, ret, node_name);
if (node < 0)
return node;
ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram");
if (ret < 0)
return ret;
reg[0] = cpu_to_fdt64(msmc_start);
reg[1] = cpu_to_fdt64(msmc_size);
ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg));
if (ret < 0)
return ret;
fdt_setprop_cell(blob, node, "#address-cells", 1);
fdt_setprop_cell(blob, node, "#size-cells", 1);
range[0] = 0;
range[1] = cpu_to_fdt32(msmc_start >> 32);
range[2] = cpu_to_fdt32(msmc_start & 0xffffffff);
range[3] = cpu_to_fdt32(msmc_size);
ret = fdt_setprop(blob, node, "ranges", range, sizeof(range));
if (ret < 0)
return ret;
subnode = fdt_first_subnode(blob, node);
prev_node = 0;
/* Look for invalid subnodes and delete them */
while (subnode >= 0) {
sub_reg = fdt_getprop(blob, subnode, "reg", &len);
addr = fdt_read_number(sub_reg, 1);
sub_reg++;
size = fdt_read_number(sub_reg, 1);
debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__,
subnode, addr, size);
if (addr + size > msmc_size ||
!strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) ||
!strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) {
fdt_del_node(blob, subnode);
debug("%s: deleting subnode %d\n", __func__, subnode);
if (!prev_node)
subnode = fdt_first_subnode(blob, node);
else
subnode = fdt_next_subnode(blob, prev_node);
} else {
prev_node = subnode;
subnode = fdt_next_subnode(blob, prev_node);
}
}
return 0;
}
#if defined(CONFIG_OF_SYSTEM_SETUP)
int ft_system_setup(void *blob, struct bd_info *bd)
{
int ret;
ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000");
if (ret < 0)
ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000",
"sram@70000000");
if (ret)
printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
return ret;
}
#endif
#endif
#ifndef CONFIG_SYSRESET
void reset_cpu(void)
{
@ -629,8 +538,10 @@ void spl_enable_dcache(void)
ram_top = (phys_addr_t) 0x100000000;
gd->arch.tlb_addr = ram_top - gd->arch.tlb_size;
gd->arch.tlb_addr &= ~(0x10000 - 1);
debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
gd->arch.tlb_addr + gd->arch.tlb_size);
gd->relocaddr = gd->arch.tlb_addr;
dcache_enable();
#endif

113
arch/arm/mach-k3/common_fdt.c Normal file
View File

@ -0,0 +1,113 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2023 Toradex - https://www.toradex.com/
*/
#include "common.h"
#include <dm.h>
#include <fdt_support.h>
#include <linux/soc/ti/ti_sci_protocol.h>
static int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name)
{
u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2];
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
int ret, node, subnode, len, prev_node;
u32 range[4], addr, size;
const fdt32_t *sub_reg;
ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end);
msmc_size = msmc_end - msmc_start + 1;
debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__,
msmc_start, msmc_size);
/* find or create "msmc_sram node */
ret = fdt_path_offset(blob, parent_path);
if (ret < 0)
return ret;
node = fdt_find_or_add_subnode(blob, ret, node_name);
if (node < 0)
return node;
ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram");
if (ret < 0)
return ret;
reg[0] = cpu_to_fdt64(msmc_start);
reg[1] = cpu_to_fdt64(msmc_size);
ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg));
if (ret < 0)
return ret;
fdt_setprop_cell(blob, node, "#address-cells", 1);
fdt_setprop_cell(blob, node, "#size-cells", 1);
range[0] = 0;
range[1] = cpu_to_fdt32(msmc_start >> 32);
range[2] = cpu_to_fdt32(msmc_start & 0xffffffff);
range[3] = cpu_to_fdt32(msmc_size);
ret = fdt_setprop(blob, node, "ranges", range, sizeof(range));
if (ret < 0)
return ret;
subnode = fdt_first_subnode(blob, node);
prev_node = 0;
/* Look for invalid subnodes and delete them */
while (subnode >= 0) {
sub_reg = fdt_getprop(blob, subnode, "reg", &len);
addr = fdt_read_number(sub_reg, 1);
sub_reg++;
size = fdt_read_number(sub_reg, 1);
debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__,
subnode, addr, size);
if (addr + size > msmc_size ||
!strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) ||
!strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) {
fdt_del_node(blob, subnode);
debug("%s: deleting subnode %d\n", __func__, subnode);
if (!prev_node)
subnode = fdt_first_subnode(blob, node);
else
subnode = fdt_next_subnode(blob, prev_node);
} else {
prev_node = subnode;
subnode = fdt_next_subnode(blob, prev_node);
}
}
return 0;
}
int fdt_fixup_msmc_ram_k3(void *blob)
{
int ret;
ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000");
if (ret < 0)
ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000",
"sram@70000000");
if (ret)
printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
return ret;
}
int fdt_del_node_path(void *blob, const char *path)
{
int ret;
int nodeoff;
nodeoff = fdt_path_offset(blob, path);
if (nodeoff < 0)
return 0; /* Not found, skip it */
ret = fdt_del_node(blob, nodeoff);
if (ret < 0)
printf("Unable to delete node %s, err=%s\n", path, fdt_strerror(ret));
else
debug("Deleted node %s\n", path);
return ret;
}

11
arch/arm/mach-k3/common_fdt.h Normal file
View File

@ -0,0 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2023 Toradex - https://www.toradex.com/
*/
#ifndef _COMMON_FDT_H
#define _COMMON_FDT_H
int fdt_fixup_msmc_ram_k3(void *blob);
#endif /* _COMMON_FDT_H */

22
arch/arm/mach-k3/include/mach/am62_hardware.h
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@ -20,6 +20,28 @@
#define MCU_CTRL_MMR0_BASE 0x04500000
#define WKUP_CTRL_MMR0_BASE 0x43000000
#define CTRLMMR_WKUP_JTAG_DEVICE_ID (WKUP_CTRL_MMR0_BASE + 0x18)
#define JTAG_DEV_ID_MASK GENMASK(31, 18)
#define JTAG_DEV_ID_SHIFT 18
#define JTAG_DEV_CORE_NR_MASK GENMASK(21, 19)
#define JTAG_DEV_CORE_NR_SHIFT 19
#define JTAG_DEV_GPU_MASK BIT(18)
#define JTAG_DEV_GPU_SHIFT 18
#define JTAG_DEV_FEATURES_MASK GENMASK(17, 13)
#define JTAG_DEV_FEATURES_SHIFT 13
#define JTAG_DEV_SECURITY_MASK BIT(12)
#define JTAG_DEV_SECURITY_SHIFT 12
#define JTAG_DEV_SAFETY_MASK BIT(11)
#define JTAG_DEV_SAFETY_SHIFT 11
#define JTAG_DEV_SPEED_MASK GENMASK(10, 6)
#define JTAG_DEV_SPEED_SHIFT 6
#define JTAG_DEV_TEMP_MASK GENMASK(5, 3)
#define JTAG_DEV_TEMP_SHIFT 3
#define JTAG_DEV_PKG_MASK GENMASK(2, 0)
#define JTAG_DEV_PKG_SHIFT 0
#define JTAG_DEV_FEATURE_NO_PRU 0x4
#define CTRLMMR_MAIN_DEVSTAT (WKUP_CTRL_MMR0_BASE + 0x30)
#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK GENMASK(6, 3)
#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3

8
arch/arm/mach-k3/j7200/dev-data.c
View File

@ -75,8 +75,8 @@ const struct ti_k3_pd_platdata j7200_pd_platdata = {
.pd = soc_pd_list,
.lpsc = soc_lpsc_list,
.devs = soc_dev_list,
.num_psc = 2,
.num_pd = 6,
.num_lpsc = 17,
.num_devs = 23,
.num_psc = ARRAY_SIZE(soc_psc_list),
.num_pd = ARRAY_SIZE(soc_pd_list),
.num_lpsc = ARRAY_SIZE(soc_lpsc_list),
.num_devs = ARRAY_SIZE(soc_dev_list),
};

8
arch/arm/mach-k3/j721e/dev-data.c
View File

@ -73,8 +73,8 @@ const struct ti_k3_pd_platdata j721e_pd_platdata = {
.pd = soc_pd_list,
.lpsc = soc_lpsc_list,
.devs = soc_dev_list,
.num_psc = 2,
.num_pd = 5,
.num_lpsc = 16,
.num_devs = 23,
.num_psc = ARRAY_SIZE(soc_psc_list),
.num_pd = ARRAY_SIZE(soc_pd_list),
.num_lpsc = ARRAY_SIZE(soc_lpsc_list),
.num_devs = ARRAY_SIZE(soc_dev_list),
};

12
arch/arm/mach-k3/j721e_fdt.c Normal file
View File

@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2023 Toradex - https://www.toradex.com/
*/
#include "common_fdt.h"
#include <fdt_support.h>
int ft_system_setup(void *blob, struct bd_info *bd)
{
return fdt_fixup_msmc_ram_k3(blob);
}

8
arch/arm/mach-k3/j721s2/dev-data.c
View File

@ -79,8 +79,8 @@ const struct ti_k3_pd_platdata j721s2_pd_platdata = {
.pd = soc_pd_list,
.lpsc = soc_lpsc_list,
.devs = soc_dev_list,
.num_psc = 2,
.num_pd = 6,
.num_lpsc = 19,
.num_devs = 25,
.num_psc = ARRAY_SIZE(soc_psc_list),
.num_pd = ARRAY_SIZE(soc_pd_list),
.num_lpsc = ARRAY_SIZE(soc_lpsc_list),
.num_devs = ARRAY_SIZE(soc_dev_list),
};

12
arch/arm/mach-k3/j721s2_fdt.c Normal file
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@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2023 Toradex - https://www.toradex.com/
*/
#include "common_fdt.h"
#include <fdt_support.h>
int ft_system_setup(void *blob, struct bd_info *bd)
{
return fdt_fixup_msmc_ram_k3(blob);
}

2
arch/arm/mach-omap2/emif-common.c
View File

@ -40,7 +40,7 @@ void set_lpmode_selfrefresh(u32 base)
readl(&emif->emif_pwr_mgmt_ctrl);
}
void force_emif_self_refresh()
void force_emif_self_refresh(void)
{
set_lpmode_selfrefresh(EMIF1_BASE);
if (!is_dra72x())

42
board/ti/am62x/evm.c
View File

@ -12,6 +12,7 @@
#include <init.h>
#include <video.h>
#include <splash.h>
#include <cpu_func.h>
#include <k3-ddrss.h>
#include <fdt_support.h>
#include <asm/io.h>
@ -59,42 +60,31 @@ int dram_init_banksize(void)
}
#if defined(CONFIG_SPL_BUILD)
#ifdef CONFIG_SPL_VIDEO_TIDSS
static int setup_dram(void)
{
dram_init();
dram_init_banksize();
gd->ram_base = CFG_SYS_SDRAM_BASE;
gd->ram_top = gd->ram_base + gd->ram_size;
gd->relocaddr = gd->ram_top;
return 0;
}
static int video_setup(void)
{
ulong addr;
int ret;
addr = gd->relocaddr;
if (CONFIG_IS_ENABLED(VIDEO)) {
ulong addr;
int ret;
addr = gd->relocaddr;
ret = video_reserve(&addr);
if (ret)
return ret;
debug("Reserving %luk for video at: %08lx\n",
((unsigned long)gd->relocaddr - addr) >> 10, addr);
gd->relocaddr = addr;
}
ret = video_reserve(&addr);
if (ret)
return ret;
debug("Reserving %luk for video at: %08lx\n",
((unsigned long)gd->relocaddr - addr) >> 10, addr);
gd->relocaddr = addr;
return 0;
}
#endif
void spl_board_init(void)
{
#if defined(CONFIG_SPL_VIDEO_TIDSS)
setup_dram();
arch_reserve_mmu();
video_setup();
enable_caches();
splash_display();
#endif
if (IS_ENABLED(CONFIG_SPL_SPLASH_SCREEN) && IS_ENABLED(CONFIG_SPL_BMP))
splash_display();
}
#if defined(CONFIG_K3_AM64_DDRSS)

1
cmd/Kconfig
View File

@ -2005,6 +2005,7 @@ config CMD_2048
config CMD_BMP
bool "Enable 'bmp' command"
depends on VIDEO
select BMP
help
This provides a way to obtain information about a BMP-format image
and to display it. BMP (which presumably stands for BitMaP) is a

1
common/Kconfig
View File

@ -1167,7 +1167,6 @@ config IO_TRACE
config BMP
bool "Enable bmp image display"
default y if CMD_BMP
help
Enable bmp functions to display bmp image and get bmp info.

11
common/board_f.c
View File

@ -411,7 +411,16 @@ __weak int arch_reserve_mmu(void)
static int reserve_video(void)
{
if (IS_ENABLED(CONFIG_VIDEO)) {
if (IS_ENABLED(CONFIG_SPL_VIDEO) && spl_phase() > PHASE_SPL &&
CONFIG_IS_ENABLED(BLOBLIST)) {
struct video_handoff *ho;
ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
if (!ho)
return log_msg_ret("blf", -ENOENT);
video_reserve_from_bloblist(ho);
gd->relocaddr = ho->fb;
} else if (CONFIG_IS_ENABLED(VIDEO)) {
ulong addr;
int ret;

21
common/spl/spl.c
View File

@ -891,18 +891,18 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
debug("Failed to stash bootstage: err=%d\n", ret);
#endif
#if defined(CONFIG_SPL_VIDEO)
struct udevice *dev;
int rc;
if (IS_ENABLED(CONFIG_SPL_VIDEO_REMOVE)) {
struct udevice *dev;
int rc;
rc = uclass_find_device(UCLASS_VIDEO, 0, &dev);
if (!rc && dev) {
rc = device_remove(dev, DM_REMOVE_NORMAL);
if (rc)
printf("Cannot remove video device '%s' (err=%d)\n",
dev->name, rc);
rc = uclass_find_device(UCLASS_VIDEO, 0, &dev);
if (!rc && dev) {
rc = device_remove(dev, DM_REMOVE_NORMAL);
if (rc)
printf("Cannot remove video device '%s' (err=%d)\n",
dev->name, rc);
}
}
#endif
spl_board_prepare_for_boot();
jump_to_image_no_args(&spl_image);
@ -992,6 +992,7 @@ ulong spl_relocate_stack_gd(void)
#endif
/* Get stack position: use 8-byte alignment for ABI compliance */
ptr = CONFIG_SPL_STACK_R_ADDR - roundup(sizeof(gd_t),16);
gd->start_addr_sp = ptr;
new_gd = (gd_t *)ptr;
memcpy(new_gd, (void *)gd, sizeof(gd_t));
#if CONFIG_IS_ENABLED(DM)

6
common/splash_source.c
View File

@ -363,7 +363,7 @@ static int splash_load_fit(struct splash_location *location, u32 bmp_load_addr)
if (res < 0)
return res;
img_header = (struct legacy_img_hdr *)bmp_load_addr;
img_header = (struct legacy_img_hdr *)(uintptr_t)bmp_load_addr;
if (image_get_magic(img_header) != FDT_MAGIC) {
printf("Could not find FDT magic\n");
return -EINVAL;
@ -373,7 +373,7 @@ static int splash_load_fit(struct splash_location *location, u32 bmp_load_addr)
/* Read in entire FIT */
fit_header = (const u32 *)(bmp_load_addr + header_size);
res = splash_storage_read_raw(location, (u32)fit_header, fit_size);
res = splash_storage_read_raw(location, (uintptr_t)fit_header, fit_size);
if (res < 0)
return res;
@ -398,7 +398,7 @@ static int splash_load_fit(struct splash_location *location, u32 bmp_load_addr)
/* Extract the splash data from FIT */
/* 1. Test if splash is in FIT internal data. */
if (!fit_image_get_data(fit_header, node_offset, &internal_splash_data, &internal_splash_size))
memmove((void *)bmp_load_addr, internal_splash_data, internal_splash_size);
memmove((void *)(uintptr_t)bmp_load_addr, internal_splash_data, internal_splash_size);
/* 2. Test if splash is in FIT external data with fixed position. */
else if (!fit_image_get_data_position(fit_header, node_offset, &external_splash_addr))
is_splash_external = true;

1
configs/am62x_evm_a53_defconfig
View File

@ -102,3 +102,4 @@ CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_TI_SCI=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
CONFIG_BLOBLIST_ADDR=0x80D00000

57
doc/board/ti/am62x_sk.rst
View File

@ -230,6 +230,63 @@ Image formats:
| +-------------------+ |
+-----------------------+
A53 SPL DDR Memory Layout
-------------------------
This provides an overview memory usage in A53 SPL stage.
.. list-table::
:widths: 16 16 16
:header-rows: 1
* - Region
- Start Address
- End Address
* - EMPTY
- 0x80000000
- 0x80080000
* - TEXT BASE
- 0x80080000
- 0x800d8000
* - EMPTY
- 0x800d8000
- 0x80200000
* - BMP IMAGE
- 0x80200000
- 0x80b77660
* - STACK
- 0x80b77660
- 0x80b77e60
* - GD
- 0x80b77e60
- 0x80b78000
* - MALLOC
- 0x80b78000
- 0x80b80000
* - EMPTY
- 0x80b80000
- 0x80c80000
* - BSS
- 0x80c80000
- 0x80d00000
* - BLOBS
- 0x80d00000
- 0x80d00400
* - EMPTY
- 0x80d00400
- 0x81000000
Switch Setting for Boot Mode
----------------------------

11
drivers/ram/k3-ddrss/k3-ddrss.c
View File

@ -138,6 +138,7 @@ struct k3_ddrss_desc {
u32 ddr_freq1;
u32 ddr_freq2;
u32 ddr_fhs_cnt;
u32 dram_class;
struct udevice *vtt_supply;
u32 instance;
lpddr4_obj *driverdt;
@ -243,14 +244,11 @@ static void k3_lpddr4_freq_update(struct k3_ddrss_desc *ddrss)
static void k3_lpddr4_ack_freq_upd_req(const lpddr4_privatedata *pd)
{
u32 dram_class;
struct k3_ddrss_desc *ddrss = (struct k3_ddrss_desc *)pd->ddr_instance;
debug("--->>> LPDDR4 Initialization is in progress ... <<<---\n");
dram_class = k3_lpddr4_read_ddr_type(pd);
switch (dram_class) {
switch (ddrss->dram_class) {
case DENALI_CTL_0_DRAM_CLASS_DDR4:
break;
case DENALI_CTL_0_DRAM_CLASS_LPDDR4:
@ -263,13 +261,12 @@ static void k3_lpddr4_ack_freq_upd_req(const lpddr4_privatedata *pd)
static int k3_ddrss_init_freq(struct k3_ddrss_desc *ddrss)
{
u32 dram_class;
int ret;
lpddr4_privatedata *pd = &ddrss->pd;
dram_class = k3_lpddr4_read_ddr_type(pd);
ddrss->dram_class = k3_lpddr4_read_ddr_type(pd);
switch (dram_class) {
switch (ddrss->dram_class) {
case DENALI_CTL_0_DRAM_CLASS_DDR4:
/* Set to ddr_freq1 from DT for DDR4 */
ret = clk_set_rate(&ddrss->ddr_clk, ddrss->ddr_freq1);

12
drivers/video/Kconfig
View File

@ -871,6 +871,12 @@ config IHS_VIDEO_OUT
out On-screen Display (OSD) used on gdsys FPGAs to control dynamic
textual overlays of the display outputs.
config VIDEO_REMOVE
bool "Remove video driver"
help
Use this option to specify if user wants to call remove method of
video driver in u-boot proper stage.
config SPLASH_SCREEN
bool "Show a splash-screen image"
help
@ -1094,6 +1100,12 @@ config SPL_SYS_WHITE_ON_BLACK
This can be better in low-light situations or to reduce eye strain in
some cases.
config SPL_VIDEO_REMOVE
bool "Remove video driver after SPL stage"
help
if this option is enabled video driver will be removed at the end of
SPL stage, beforeloading the next stage.
if SPL_SPLASH_SCREEN
config SPL_SPLASH_SCREEN_ALIGN

23
drivers/video/video-uclass.c
View File

@ -6,12 +6,14 @@
#define LOG_CATEGORY UCLASS_VIDEO
#include <common.h>
#include <bloblist.h>
#include <console.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
#include <mapmem.h>
#include <spl.h>
#include <stdio_dev.h>
#include <video.h>
#include <video_console.h>
@ -139,6 +141,16 @@ int video_reserve(ulong *addrp)
debug("Video frame buffers from %lx to %lx\n", gd->video_bottom,
gd->video_top);
if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) {
struct video_handoff *ho;
ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0);
if (!ho)
return log_msg_ret("blf", -ENOENT);
ho->fb = *addrp;
ho->size = size;
}
return 0;
}
@ -194,6 +206,17 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
return 0;
}
int video_reserve_from_bloblist(struct video_handoff *ho)
{
gd->video_bottom = ho->fb;
gd->fb_base = ho->fb;
gd->video_top = ho->fb + ho->size;
debug("Reserving %luk for video using blob at: %08x\n",
((unsigned long)ho->size) >> 10, (u32)ho->fb);
return 0;
}
int video_fill(struct udevice *dev, u32 colour)
{
struct video_priv *priv = dev_get_uclass_priv(dev);

11
include/configs/k2e_evm.h
View File

@ -11,18 +11,11 @@
#include <environment/ti/spi.h>
#ifdef CONFIG_TI_SECURE_DEVICE
#define DEFAULT_SEC_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
"findfdt=setenv fdtfile ${name_fdt}\0"
#else
#define DEFAULT_SEC_BOOT_ENV
#endif
/* U-Boot general configuration */
#define ENV_KS2_BOARD_SETTINGS \
DEFAULT_FW_INITRAMFS_BOOT_ENV \
DEFAULT_SEC_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
"findfdt=setenv fdtfile ${name_fdt}\0" \
"boot=ubi\0" \
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \

11
include/configs/k2hk_evm.h
View File

@ -11,18 +11,11 @@
#include <environment/ti/spi.h>
#ifdef CONFIG_TI_SECURE_DEVICE
#define DEFAULT_SEC_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
"findfdt=setenv fdtfile ${name_fdt}\0"
#else
#define DEFAULT_SEC_BOOT_ENV
#endif
/* U-Boot general configuration */
#define ENV_KS2_BOARD_SETTINGS \
DEFAULT_FW_INITRAMFS_BOOT_ENV \
DEFAULT_SEC_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
"findfdt=setenv fdtfile ${name_fdt}\0" \
"boot=ubi\0" \
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \

11
include/configs/k2l_evm.h
View File

@ -11,18 +11,11 @@
#include <environment/ti/spi.h>
#ifdef CONFIG_TI_SECURE_DEVICE
#define DEFAULT_SEC_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
"findfdt=setenv fdtfile ${name_fdt}\0"
#else
#define DEFAULT_SEC_BOOT_ENV
#endif
/* U-Boot general configuration */
#define ENV_KS2_BOARD_SETTINGS \
DEFAULT_FW_INITRAMFS_BOOT_ENV \
DEFAULT_SEC_BOOT_ENV \
DEFAULT_FIT_TI_ARGS \
"findfdt=setenv fdtfile ${name_fdt}\0" \
"boot=ubi\0" \
"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
"root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,4096\0" \

9
include/video.h
View File

@ -406,4 +406,13 @@ int bmp_display(ulong addr, int x, int y);
*/
int bmp_info(ulong addr);
/*
* video_reserve_from_bloblist()- Reserve frame-buffer memory for video devices
* using blobs.
*
* @ho: video information passed from SPL
* Returns: 0 (always)
*/
int video_reserve_from_bloblist(struct video_handoff *ho);
#endif