ARM: at91: Get the Chip ID of SAMA5D2 SiP

The SAMA5D2 SiP(System in Package) has different Chip IDs in the
CHIPID and CHIP_EXID registers.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Wenyou Yang 2017-09-13 14:58:53 +08:00 committed by Tom Rini
parent b5c13daca4
commit 245cbc583d
2 changed files with 30 additions and 3 deletions

View File

@ -10,11 +10,20 @@
#include <asm/arch/clk.h>
#include <asm/arch/sama5d2.h>
char *get_cpu_name()
int cpu_is_sama5d2(void)
{
unsigned int chip_id = get_chip_id();
return ((chip_id == ARCH_ID_SAMA5D2) ||
(chip_id == ARCH_ID_SAMA5D2_SIP)) ? 1 : 0;
}
char *get_cpu_name(void)
{
unsigned int chip_id = get_chip_id();
unsigned int extension_id = get_extension_chip_id();
if (cpu_is_sama5d2()) {
if (chip_id == ARCH_ID_SAMA5D2) {
switch (extension_id) {
case ARCH_EXID_SAMA5D21CU:
return "SAMA5D21";
@ -41,6 +50,19 @@ char *get_cpu_name()
}
}
if ((chip_id == ARCH_ID_SAMA5D2) || (chip_id == ARCH_ID_SAMA5D2_SIP)) {
switch (extension_id) {
case ARCH_EXID_SAMA5D225C_D1M:
return "SAMA5D225 128M bits DDR2 SDRAM";
case ARCH_EXID_SAMA5D27C_D5M:
return "SAMA5D27 512M bits DDR2 SDRAM";
case ARCH_EXID_SAMA5D27C_D1G:
return "SAMA5D27 1G bits DDR2 SDRAM";
case ARCH_EXID_SAMA5D28C_D1G:
return "SAMA5D28 1G bits DDR2 SDRAM";
}
}
return "Unknown CPU type";
}

View File

@ -222,7 +222,11 @@
#define ARCH_EXID_SAMA5D28CU 0x00000010
#define ARCH_EXID_SAMA5D28CN 0x00000020
#define cpu_is_sama5d2() (get_chip_id() == ARCH_ID_SAMA5D2)
#define ARCH_ID_SAMA5D2_SIP 0x8a5c08c2
#define ARCH_EXID_SAMA5D225C_D1M 0x00000053
#define ARCH_EXID_SAMA5D27C_D5M 0x00000032
#define ARCH_EXID_SAMA5D27C_D1G 0x00000033
#define ARCH_EXID_SAMA5D28C_D1G 0x00000013
/* PIT Timer(PIT_PIIR) */
#define CONFIG_SYS_TIMER_COUNTER 0xf804803c
@ -233,6 +237,7 @@
#ifndef __ASSEMBLY__
unsigned int get_chip_id(void);
unsigned int get_extension_chip_id(void);
int cpu_is_sama5d2(void);
unsigned int has_lcdc(void);
char *get_cpu_name(void);
#endif