powerpc/mpc8572ds: Enable bank interleaving to cs0+cs1 for dual-rank DIMMs

The controller interleaving only takes the usable memory mapped to cs0. In
the case of bank interleaving not enabled, only half of dual-rank DIMM will
be used.

For single-rank DIMM bank interleaving will be auto disabled.

Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
Hongtao Jia 2012-12-20 19:36:12 +00:00 committed by Andy Fleming
parent 9730b7bc11
commit 238e146791

View File

@ -735,7 +735,7 @@
#define CONFIG_BAUDRATE 115200
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:ctlr_intlv=bank,ecc=off\0" \
"hwconfig=fsl_ddr:ctlr_intlv=bank,bank_intlv=cs0_cs1,ecc=off\0" \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \