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ARM: dts: at91: sam9x60ek: Enable qspi node
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register access, the other for the qspi core and phy. Both are mandatory. Enable the qspi node together with the SST26VF064B qspi nor flash memory. Booting from the QSPI NOR flash is now possible. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
This commit is contained in:
parent
8c04ea7cad
commit
228f9e0244
@ -22,6 +22,7 @@
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serial0 = &dbgu;
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gpio0 = &pioA;
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gpio1 = &pioB;
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spi0 = &qspi;
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};
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clocks {
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@ -60,6 +61,17 @@
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#size-cells = <1>;
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ranges;
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qspi: spi@f0014000 {
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compatible = "microchip,sam9x60-qspi";
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reg = <0xf0014000 0x100>, <0x70000000 0x10000000>;
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reg-names = "qspi_base", "qspi_mmap";
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clocks = <&qspi_clk>, <&qspick>;
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clock-names = "pclk", "qspick";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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macb0: ethernet@f802c000 {
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compatible = "cdns,sam9x60-macb", "cdns,macb";
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reg = <0xf802c000 0x100>;
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@ -172,6 +184,18 @@
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atmel,clk-divisors = <1 2 4 6>;
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};
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system: systemck {
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compatible = "atmel,at91rm9200-clk-system";
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#address-cells = <1>;
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#size-cells = <0>;
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qspick: qspick {
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#clock-cells = <0>;
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reg = <19>;
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clocks = <&mck>;
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};
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};
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periph: periphck {
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compatible = "microchip,sam9x60-clk-peripheral";
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#address-cells = <1>;
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@ -202,6 +226,11 @@
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#clock-cells = <0>;
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reg = <24>;
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};
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qspi_clk: qspi_clk {
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#clock-cells = <0>;
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reg = <35>;
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};
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};
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generic: gck {
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@ -31,6 +31,10 @@
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u-boot,dm-pre-reloc;
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};
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&qspi {
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u-boot,dm-pre-reloc;
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};
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&pinctrl_dbgu {
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u-boot,dm-pre-reloc;
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};
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@ -39,10 +43,18 @@
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u-boot,dm-pre-reloc;
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};
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&pinctrl_qspi {
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u-boot,dm-pre-reloc;
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};
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&pioA {
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u-boot,dm-pre-reloc;
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};
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&pioB {
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u-boot,dm-pre-reloc;
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};
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&pmc {
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u-boot,dm-pre-reloc;
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};
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@ -59,6 +71,14 @@
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u-boot,dm-pre-reloc;
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};
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&system {
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u-boot,dm-pre-reloc;
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};
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&qspick {
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u-boot,dm-pre-reloc;
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};
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&periph {
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u-boot,dm-pre-reloc;
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};
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@ -67,6 +87,10 @@
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u-boot,dm-pre-reloc;
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};
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&pioB_clk {
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u-boot,dm-pre-reloc;
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};
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&sdhci0_clk {
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u-boot,dm-pre-reloc;
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};
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@ -75,6 +99,10 @@
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u-boot,dm-pre-reloc;
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};
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&qspi_clk {
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u-boot,dm-pre-reloc;
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};
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&generic {
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u-boot,dm-pre-reloc;
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};
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@ -16,6 +16,37 @@
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chosen {
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stdout-path = &dbgu;
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};
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ahb {
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apb {
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qspi: spi@f0014000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_qspi>;
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status = "okay";
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nor_flash: sst26vf064@0 {
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compatible = "spi-flash";
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reg = <0>;
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spi-max-frequency = <80000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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};
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};
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pinctrl {
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pinctrl_qspi: qspi {
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atmel,pins =
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<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
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AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
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AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
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AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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};
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};
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};
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};
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&macb0 {
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