ARM: dts: at91: sam9x60ek: Enable qspi node

The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
access, the other for the qspi core and phy. Both are mandatory.

Enable the qspi node together with the SST26VF064B qspi nor flash
memory. Booting from the QSPI NOR flash is now possible.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
This commit is contained in:
Tudor Ambarus 2019-09-27 13:09:19 +00:00 committed by Eugen Hristev
parent 8c04ea7cad
commit 228f9e0244
3 changed files with 88 additions and 0 deletions

View File

@ -22,6 +22,7 @@
serial0 = &dbgu;
gpio0 = &pioA;
gpio1 = &pioB;
spi0 = &qspi;
};
clocks {
@ -60,6 +61,17 @@
#size-cells = <1>;
ranges;
qspi: spi@f0014000 {
compatible = "microchip,sam9x60-qspi";
reg = <0xf0014000 0x100>, <0x70000000 0x10000000>;
reg-names = "qspi_base", "qspi_mmap";
clocks = <&qspi_clk>, <&qspick>;
clock-names = "pclk", "qspick";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
macb0: ethernet@f802c000 {
compatible = "cdns,sam9x60-macb", "cdns,macb";
reg = <0xf802c000 0x100>;
@ -172,6 +184,18 @@
atmel,clk-divisors = <1 2 4 6>;
};
system: systemck {
compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>;
#size-cells = <0>;
qspick: qspick {
#clock-cells = <0>;
reg = <19>;
clocks = <&mck>;
};
};
periph: periphck {
compatible = "microchip,sam9x60-clk-peripheral";
#address-cells = <1>;
@ -202,6 +226,11 @@
#clock-cells = <0>;
reg = <24>;
};
qspi_clk: qspi_clk {
#clock-cells = <0>;
reg = <35>;
};
};
generic: gck {

View File

@ -31,6 +31,10 @@
u-boot,dm-pre-reloc;
};
&qspi {
u-boot,dm-pre-reloc;
};
&pinctrl_dbgu {
u-boot,dm-pre-reloc;
};
@ -39,10 +43,18 @@
u-boot,dm-pre-reloc;
};
&pinctrl_qspi {
u-boot,dm-pre-reloc;
};
&pioA {
u-boot,dm-pre-reloc;
};
&pioB {
u-boot,dm-pre-reloc;
};
&pmc {
u-boot,dm-pre-reloc;
};
@ -59,6 +71,14 @@
u-boot,dm-pre-reloc;
};
&system {
u-boot,dm-pre-reloc;
};
&qspick {
u-boot,dm-pre-reloc;
};
&periph {
u-boot,dm-pre-reloc;
};
@ -67,6 +87,10 @@
u-boot,dm-pre-reloc;
};
&pioB_clk {
u-boot,dm-pre-reloc;
};
&sdhci0_clk {
u-boot,dm-pre-reloc;
};
@ -75,6 +99,10 @@
u-boot,dm-pre-reloc;
};
&qspi_clk {
u-boot,dm-pre-reloc;
};
&generic {
u-boot,dm-pre-reloc;
};

View File

@ -16,6 +16,37 @@
chosen {
stdout-path = &dbgu;
};
ahb {
apb {
qspi: spi@f0014000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
status = "okay";
nor_flash: sst26vf064@0 {
compatible = "spi-flash";
reg = <0>;
spi-max-frequency = <80000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
};
};
pinctrl {
pinctrl_qspi: qspi {
atmel,pins =
<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
};
};
};
};
&macb0 {