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spi: Support half-duplex mode in FDT decode

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This parameter should also be supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
This commit is contained in:
Simon Glass 2014-07-07 10:16:39 -06:00 committed by Jagannadha Sutradharudu Teki
parent a4e29db257
commit 22052c6236
2 changed files with 4 additions and 0 deletions
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2
doc/device-tree-bindings/spi/spi-bus.txt
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@ -59,6 +59,8 @@ contain the following properties.
used for MOSI. Defaults to 1 if not present.
- spi-rx-bus-width - (optional) The bus width(number of data wires) that
used for MISO. Defaults to 1 if not present.
- spi-half-duplex - (optional) Indicates that the SPI bus should wait for
a header byte before reading data from the slave.
Some SPI controllers and devices support Dual and Quad SPI transfer mode.
It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD).

2
drivers/spi/spi.c
View File

@ -53,6 +53,8 @@ struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum,
mode |= SPI_CPHA;
if (fdtdec_get_bool(blob, node, "spi-cs-high"))
mode |= SPI_CS_HIGH;
if (fdtdec_get_bool(blob, node, "spi-half-duplex"))
mode |= SPI_PREAMBLE;
return spi_setup_slave(busnum, cs, max_hz, mode);
}
#endif