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arc: introduce separate section for interrupt vector table
Even though existing implementation works fine in preparation to submission of ARCv2 architecture we need this change. In case of ARCv2 interrupt vector table consists of just addresses of corresponding handlers. And if those addresses will be in .text section then assembler will encode them as everything in .text section as middle-endian and then on real execution CPU will read swapped addresses and will jump into the wild. Once introduced new section is situated so .text section remains the first which allows us to use common linker option for linking everything to a specified CONFIG_SYS_TEXT_BASE. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
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@ -2,8 +2,6 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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head-y := arch/arc/cpu/$(CPU)/start.o
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libs-y += arch/arc/cpu/$(CPU)/
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libs-y += arch/arc/lib/
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@ -4,10 +4,9 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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extra-y += start.o
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obj-y += cache.o
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obj-y += cpu.o
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obj-y += interrupts.o
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obj-y += reset.o
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obj-y += start.o
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obj-y += timer.o
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@ -88,11 +88,11 @@
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#endif
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.endm
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.section .ivt, "ax",@progbits
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.align 4
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.globl _start
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_start:
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_ivt:
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/* Critical system events */
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j reset /* 0 - 0x000 */
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j _start /* 0 - 0x000 */
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j memory_error /* 1 - 0x008 */
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j instruction_error /* 2 - 0x010 */
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@ -110,6 +110,28 @@ _start:
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j EV_Trap /* 0x128, Trap exception (0x25) */
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j EV_Extension /* 0x130, Extn Intruction Excp (0x26) */
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.text
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.globl _start
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_start:
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/* Setup interrupt vector base that matches "__text_start" */
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sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
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/* Setup stack pointer */
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mov %sp, CONFIG_SYS_INIT_SP_ADDR
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mov %fp, %sp
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/* Clear bss */
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mov %r0, __bss_start
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mov %r1, __bss_end
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clear_bss:
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st.ab 0, [%r0, 4]
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brlt %r0, %r1, clear_bss
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/* Zero the one and only argument of "board_init_f" */
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mov_s %r0, 0
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j board_init_f
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memory_error:
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SAVE_ALL_SYS
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SAVE_EXCEPTION_SOURCE
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@ -164,27 +186,6 @@ EV_Extension:
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mov %r0, %sp
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j do_extension
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reset:
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/* Setup interrupt vector base that matches "__text_start" */
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sr __text_start, [ARC_AUX_INTR_VEC_BASE]
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/* Setup stack pointer */
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mov %sp, CONFIG_SYS_INIT_SP_ADDR
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mov %fp, %sp
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/* Clear bss */
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mov %r0, __bss_start
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mov %r1, __bss_end
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clear_bss:
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st.ab 0, [%r0, 4]
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brlt %r0, %r1, clear_bss
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/* Zero the one and only argument of "board_init_f" */
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mov_s %r0, 0
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j board_init_f
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/*
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* void relocate_code (addr_sp, gd, addr_moni)
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*
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@ -13,7 +13,6 @@ SECTIONS
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.text : {
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*(.__text_start)
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*(.__image_copy_start)
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CPUDIR/start.o (.text*)
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*(.text*)
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}
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@ -23,6 +22,20 @@ SECTIONS
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*(.__text_end)
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}
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. = ALIGN(1024);
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.ivt_start : {
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*(.__ivt_start)
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}
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.ivt :
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{
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*(.ivt)
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}
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.ivt_end : {
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*(.__ivt_end)
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}
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. = ALIGN(4);
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.rodata : {
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
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@ -10,5 +10,7 @@
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#include <asm-generic/sections.h>
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extern ulong __text_end;
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extern ulong __ivt_start;
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extern ulong __ivt_end;
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#endif /* __ASM_ARC_SECTIONS_H */
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@ -44,7 +44,7 @@ int do_elf_reloc_fixups(void)
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#ifdef __LITTLE_ENDIAN__
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/* If location in ".text" section swap value */
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if ((unsigned int)offset_ptr_rom <
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(unsigned int)&__text_end)
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(unsigned int)&__ivt_end)
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val = (val << 16) | (val >> 16);
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#endif
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@ -55,7 +55,7 @@ int do_elf_reloc_fixups(void)
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#ifdef __LITTLE_ENDIAN__
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/* If location in ".text" section swap value */
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if ((unsigned int)offset_ptr_rom <
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(unsigned int)&__text_end)
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(unsigned int)&__ivt_end)
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val = (val << 16) | (val >> 16);
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#endif
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memcpy(offset_ptr_ram, &val, sizeof(int));
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@ -19,3 +19,5 @@ char __rel_dyn_end[0] __attribute__((section(".__rel_dyn_end")));
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char __text_start[0] __attribute__((section(".__text_start")));
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char __text_end[0] __attribute__((section(".__text_end")));
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char __init_end[0] __attribute__((section(".__init_end")));
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char __ivt_start[0] __attribute__((section(".__ivt_start")));
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char __ivt_end[0] __attribute__((section(".__ivt_end")));
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