ARM: rmobile: Remove Watchdog and CPG settings on Gen3

This code is unnecessary, because these registers are set by the
initial program loader (IPL).

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
This commit is contained in:
Hiroyuki Yokoyama 2018-09-25 18:48:03 +09:00 committed by Marek Vasut
parent 6f56582198
commit 1c1fd9f968
3 changed files with 0 additions and 39 deletions

View File

@ -26,21 +26,8 @@
DECLARE_GLOBAL_DATA_PTR;
#define CPGWPCR 0xE6150904
#define CPGWPR 0xE6150900
#define CLK2MHZ(clk) (clk / 1000 / 1000)
void s_init(void)
{
struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
/* Watchdog init */
writel(0xA5A5A500, &rwdt->rwtcsra);
writel(0xA5A5A500, &swdt->swtcsra);
writel(0x5A5AFFFF, CPGWPR);
writel(0xA5A50000, CPGWPCR);
}
#define GSX_MSTP112 BIT(12) /* 3DG */

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@ -27,21 +27,8 @@
DECLARE_GLOBAL_DATA_PTR;
#define CPGWPCR 0xE6150904
#define CPGWPR 0xE6150900
#define CLK2MHZ(clk) (clk / 1000 / 1000)
void s_init(void)
{
struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
/* Watchdog init */
writel(0xA5A5A500, &rwdt->rwtcsra);
writel(0xA5A5A500, &swdt->swtcsra);
writel(0x5A5AFFFF, CPGWPR);
writel(0xA5A50000, CPGWPCR);
}
#define GSX_MSTP112 BIT(12) /* 3DG */

View File

@ -26,21 +26,8 @@
DECLARE_GLOBAL_DATA_PTR;
#define CPGWPCR 0xE6150904
#define CPGWPR 0xE6150900
#define CLK2MHZ(clk) (clk / 1000 / 1000)
void s_init(void)
{
struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
/* Watchdog init */
writel(0xA5A5A500, &rwdt->rwtcsra);
writel(0xA5A5A500, &swdt->swtcsra);
writel(0x5A5AFFFF, CPGWPR);
writel(0xA5A50000, CPGWPCR);
}
#define GSX_MSTP112 BIT(12) /* 3DG */