mirror of
https://github.com/u-boot/u-boot.git
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Convert CONFIG_SYS_HZ to Kconfig
This converts the following to Kconfig: CONFIG_SYS_HZ Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
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7115007ccf
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1a77da4b33
@ -36,7 +36,6 @@ struct gpt_regs *const gpt1_regs_ptr =
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#define GPT_FREE_RUNNING 0xFFFF
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/* Timer, HZ specific defines */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_HZ_CLOCK ((27 * 1000 * 1000) / GPT_PRESCALER_128)
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#endif
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@ -60,8 +60,6 @@
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_HZ 1000
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/* Definitions for initial stack pointer and data area (in DPRAM) */
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#define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x2800)
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#define CONFIG_SYS_INIT_RAM_SIZE (0x2e00 - 0x2800)
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@ -27,8 +27,6 @@
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"erase 0xfff00000 0xffffffff; " \
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"cp.b 0x20000 0xfff00000 ${filesize}\0"
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_CLK 45000000
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#define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 2)
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/* Register Base Addrs */
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@ -6,7 +6,6 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_MHZ 200
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#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
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@ -6,7 +6,6 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_MHZ 325
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#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
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@ -6,7 +6,6 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_MHZ 375
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#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
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@ -10,7 +10,6 @@
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#define __CONFIG_CI20_H__
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/* Ingenic JZ4780 clock configuration. */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_MHZ 1200
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#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
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@ -92,8 +92,6 @@
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"echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \
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"echo USB boot attempt ...; run usbbootscript; "
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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@ -170,8 +170,6 @@
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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@ -110,8 +110,6 @@
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_HZ 1000
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/* Physical memory map */
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#define PHYS_SDRAM (0x80000000)
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#define PHYS_SDRAM_SIZE (256 * SZ_1M)
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@ -47,8 +47,6 @@
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_SIZE SZ_512M
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@ -312,7 +312,6 @@
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_STANDALONE_LOAD_ADDR 0x10001000
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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@ -59,7 +59,6 @@
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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@ -100,8 +100,6 @@
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_HZ 1000
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#ifdef CONFIG_MX6UL
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# define DRAM_OFFSET(x) 0x87##x
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# define FDT_ADDR __stringify(DRAM_OFFSET(800000))
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@ -62,8 +62,6 @@
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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@ -72,8 +72,6 @@
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#define CONFIG_BOOTCOMMAND "run boot${boot-mode}"
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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@ -22,8 +22,6 @@
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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@ -22,8 +22,6 @@
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#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
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#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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@ -101,7 +101,6 @@
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"else run netboot; fi"
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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@ -59,8 +59,6 @@
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_HWCONFIG
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#define HWCONFIG_BUFFER_SIZE 128
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@ -344,8 +344,6 @@ unsigned long get_board_sys_clk(void);
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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@ -360,8 +360,6 @@ unsigned long get_board_sys_clk(void);
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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@ -14,8 +14,6 @@
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#define PHYS_SDRAM_SIZE SZ_512M
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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@ -8,7 +8,6 @@
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#ifndef __CONFIG_MT7620_H
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#define __CONFIG_MT7620_H
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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@ -8,7 +8,6 @@
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#ifndef __CONFIG_MT7628_H
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#define __CONFIG_MT7628_H
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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@ -124,8 +124,6 @@
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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@ -121,8 +121,6 @@
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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@ -87,8 +87,6 @@
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#include <config_distro_bootcmd.h>
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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@ -112,8 +112,6 @@
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"fi; " \
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"fi"
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
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@ -21,8 +21,6 @@
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_SIZE SZ_256M
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@ -23,8 +23,6 @@
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_OSCIN_FREQ 24000000
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#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
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#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
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#define CONFIG_SYS_HZ 1000
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/*
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* Memory Info
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@ -33,8 +33,6 @@
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_SIZE SZ_256M
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@ -36,8 +36,6 @@
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_SIZE SZ_256M
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@ -108,8 +108,6 @@
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#include <config_distro_bootcmd.h>
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#include <linux/stringify.h>
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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@ -107,8 +107,6 @@
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#include <config_distro_bootcmd.h>
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#include <linux/stringify.h>
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_BOOTM_LEN SZ_64M
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/* For timer, QEMU emulates an ARMv7/ARMv8 architected timer */
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#define CONFIG_SYS_HZ 1000
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/* Environment options */
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/* Not used: not need IRQ/FIQ stuff */
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#undef CONFIG_USE_IRQ
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/* decrementer freq: 1ms ticks */
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#define CONFIG_SYS_HZ 1000
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/*-----------------------------------------------------------------------
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* System initialize options (board_init_f)
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"run mmcboot; " \
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"fi; " \
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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@ -68,8 +68,6 @@
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define __CONFIG_H
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/* Timers for fasp(TIMCLK) */
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#define CONFIG_SYS_HZ 1000 /* 1 msec */
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#define CONFIG_SYS_TIMERBASE 0x31080000 /* AP Timer 1 (ARM-SP804) */
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/*
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/* General configuration */
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_MHZ 280
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#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
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"fi; " \
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"fi"
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_SIZE (128 << 20)
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