diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c index 58985b81147..6eb5fe9cfc9 100644 --- a/board/motionpro/motionpro.c +++ b/board/motionpro/motionpro.c @@ -28,11 +28,15 @@ #include #include - +#include #if defined(CONFIG_OF_FLAT_TREE) #include #endif +#if defined(CONFIG_STATUS_LED) +#include +#endif /* CONFIG_STATUS_LED */ + /* Kollmorgen DPR initialization data */ struct init_elem { unsigned long addr; @@ -78,11 +82,27 @@ int board_early_init_r(void) } +/* + * Additional PHY intialization. After being reset in mpc5xxx_fec_init_phy(), + * PHY goes into FX mode. To take it out of the FX mode and switch into + * desired TX operation, one needs to clear the FX_SEL bit of Mode Control + * Register. + */ +void reset_phy(void) +{ + unsigned short mode_control; + + miiphy_read("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15, &mode_control); + miiphy_write("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15, + mode_control & 0xfffe); + return; +} + #ifndef CFG_RAMBOOT /* * Helper function to initialize SDRAM controller. */ -static void sdram_start (int hi_addr) +static void sdram_start(int hi_addr) { long hi_addr_bit = hi_addr ? 0x01000000 : 0; @@ -114,7 +134,7 @@ static void sdram_start (int hi_addr) /* * Initalize SDRAM - configure SDRAM controller, detect memory size. */ -long int initdram (int board_type) +long int initdram(int board_type) { ulong dramsize = 0; #ifndef CFG_RAMBOOT @@ -168,9 +188,10 @@ long int initdram (int board_type) } -int checkboard (void) +int checkboard(void) { - puts("Board: Promess Motion-PRO board\n"); + uchar rev = *(vu_char *)CPLD_REV_REGISTER; + printf("Board: Promess Motion-PRO board (CPLD rev. 0x%02x)\n", rev); return 0; } @@ -181,3 +202,29 @@ void ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); } #endif /* defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) */ + + +#if defined(CONFIG_STATUS_LED) +void __led_init(led_id_t regaddr, int state) +{ + *((vu_long *) regaddr) |= ENABLE_GPIO_OUT; + + if (state == STATUS_LED_ON) + *((vu_long *) regaddr) |= LED_ON; + else + *((vu_long *) regaddr) &= ~LED_ON; +} + +void __led_set(led_id_t regaddr, int state) +{ + if (state == STATUS_LED_ON) + *((vu_long *) regaddr) |= LED_ON; + else + *((vu_long *) regaddr) &= ~LED_ON; +} + +void __led_toggle(led_id_t regaddr) +{ + *((vu_long *) regaddr) ^= LED_ON; +} +#endif /* CONFIG_STATUS_LED */ diff --git a/common/main.c b/common/main.c index d8c00549548..09ee64b8131 100644 --- a/common/main.c +++ b/common/main.c @@ -1191,6 +1191,8 @@ static void process_macros (const char *input, char *output) if (outputcnt) *output = 0; + else + *(output - 1) = 0; #ifdef DEBUG_PARSER printf ("[PROCESS_MACROS] OUTPUT len %d: \"%s\"\n", diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c index 7e658218525..d7440308a45 100644 --- a/cpu/mpc5xxx/cpu_init.c +++ b/cpu/mpc5xxx/cpu_init.c @@ -156,21 +156,21 @@ void cpu_init_f (void) *(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 15); *(vu_long *)(MPC5XXX_XLBARB + 0x70) = CFG_SDRAM_BASE | 0x1d; -# if defined(CFG_IPBSPEED_133) +# if defined(CFG_IPBCLK_EQUALS_XLBCLK) /* Motorola reports IPB should better run at 133 MHz. */ *(vu_long *)MPC5XXX_ADDECR |= 1; /* pci_clk_sel = 0x02, ipb_clk_sel = 0x00; */ addecr = *(vu_long *)MPC5XXX_CDM_CFG; addecr &= ~0x103; -# if defined(CFG_PCISPEED_66) +# if defined(CFG_PCICLK_EQUALS_IPBCLK_DIV2) /* pci_clk_sel = 0x01 -> IPB_CLK/2 */ addecr |= 0x01; # else /* pci_clk_sel = 0x02 -> XLB_CLK/4 = IPB_CLK/4 */ addecr |= 0x02; -# endif /* CFG_PCISPEED_66 */ +# endif /* CFG_PCICLK_EQUALS_IPBCLK_DIV2 */ *(vu_long *)MPC5XXX_CDM_CFG = addecr; -# endif /* CFG_IPBSPEED_133 */ +# endif /* CFG_IPBCLK_EQUALS_XLBCLK */ /* Configure the XLB Arbiter */ *(vu_long *)MPC5XXX_XLBARB_MPRIEN = 0xff; *(vu_long *)MPC5XXX_XLBARB_MPRIVAL = 0x11111111; diff --git a/cpu/mpc5xxx/fec.c b/cpu/mpc5xxx/fec.c index 00e891115c2..813636655b2 100644 --- a/cpu/mpc5xxx/fec.c +++ b/cpu/mpc5xxx/fec.c @@ -395,9 +395,7 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis) static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis) { mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv; -#ifndef CONFIG_MOTIONPRO const uint8 phyAddr = CONFIG_PHY_ADDR; /* Only one PHY */ -#endif /* !CONFIG_MOTIONPRO */ #if (DEBUG & 0x1) printf ("mpc5xxx_fec_init_phy... Begin\n"); @@ -437,7 +435,6 @@ static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis) * PHY initialization for the Motion-PRO board, until a proper fix is found. */ -#ifndef CONFIG_MOTIONPRO if (fec->xcv_type != SEVENWIRE) { /* * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock @@ -564,7 +561,6 @@ static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis) } } -#endif /* !CONFIG_MOTIONPRO */ #if (DEBUG & 0x2) if (fec->xcv_type != SEVENWIRE) diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h index 5b54f30e08d..bc30977fd7a 100644 --- a/include/configs/BC3450.h +++ b/include/configs/BC3450.h @@ -282,17 +282,17 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ /* * PCI Bus clocking configuration * * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if - * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet - * hasn't been tested with a IPB Bus Clock of 66 MHz. + * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock + * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz. */ -#if defined(CFG_IPBSPEED_133) -# define CFG_PCISPEED_66 /* define for 66MHz speed */ +#if defined(CFG_IPBCLK_EQUALS_XLBCLK) +# define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */ #endif /* @@ -488,7 +488,7 @@ #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#ifdef CFG_PCISPEED_66 +#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2 # define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */ #else # define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */ diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h index 598811240a7..73be06950bc 100644 --- a/include/configs/IceCube.h +++ b/include/configs/IceCube.h @@ -167,9 +167,9 @@ * IPB Bus clocking configuration. */ #if defined(CONFIG_LITE5200B) -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ #else -#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ +#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ #endif #endif /* CONFIG_MPC5200 */ diff --git a/include/configs/PM520.h b/include/configs/PM520.h index 9c241e67e73..7d91a0160c4 100644 --- a/include/configs/PM520.h +++ b/include/configs/PM520.h @@ -160,7 +160,7 @@ /* * IPB Bus clocking configuration. */ -#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ +#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ #endif /* * I2C configuration diff --git a/include/configs/TB5200.h b/include/configs/TB5200.h index 8a6e5a61b73..b42cfb6e1fb 100644 --- a/include/configs/TB5200.h +++ b/include/configs/TB5200.h @@ -200,17 +200,17 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ -#if defined(CFG_IPBSPEED_133) +#if defined(CFG_IPBCLK_EQUALS_XLBCLK) /* * PCI Bus clocking configuration * * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if - * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't - * been tested with a IPB Bus Clock of 66 MHz. + * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock + * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz. */ -#define CFG_PCISPEED_66 /* define for 66MHz speed */ +#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */ #endif /* @@ -432,7 +432,7 @@ #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#ifdef CFG_PCISPEED_66 +#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2 #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */ #else #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */ diff --git a/include/configs/TOP5200.h b/include/configs/TOP5200.h index f41dbd0ccb1..1cc9ce94f91 100644 --- a/include/configs/TOP5200.h +++ b/include/configs/TOP5200.h @@ -186,7 +186,7 @@ /* * IPB Bus clocking configuration. */ -#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ +#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ /* * I2C configuration diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index 7069b35ad60..7935593febe 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -269,17 +269,17 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ -#if defined(CFG_IPBSPEED_133) && !defined(CONFIG_CAM5200) +#if defined(CFG_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200) /* * PCI Bus clocking configuration * * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if - * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't - * been tested with a IPB Bus Clock of 66 MHz. + * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of + * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz. */ -#define CFG_PCISPEED_66 /* define for 66MHz speed */ +#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */ #endif /* @@ -594,7 +594,7 @@ #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#ifdef CFG_PCISPEED_66 +#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2 #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */ #else #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */ diff --git a/include/configs/Total5200.h b/include/configs/Total5200.h index 81757032362..d8686dd39c0 100644 --- a/include/configs/Total5200.h +++ b/include/configs/Total5200.h @@ -183,7 +183,7 @@ /* * IPB Bus clocking configuration. */ -#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ +#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ #endif /* diff --git a/include/configs/aev.h b/include/configs/aev.h index 8d9f0a16610..6c2a3603787 100644 --- a/include/configs/aev.h +++ b/include/configs/aev.h @@ -166,17 +166,17 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ -#if defined(CFG_IPBSPEED_133) +#if defined(CFG_IPBCLK_EQUALS_XLBCLK) /* * PCI Bus clocking configuration * * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if - * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't - * been tested with a IPB Bus Clock of 66 MHz. + * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock + * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz. */ -#define CFG_PCISPEED_66 /* define for 66MHz speed */ +#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */ #endif /* @@ -362,7 +362,7 @@ #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#ifdef CFG_PCISPEED_66 +#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2 #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */ #else #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */ diff --git a/include/configs/canmb.h b/include/configs/canmb.h index 2c160a44891..ec6d57e1e69 100644 --- a/include/configs/canmb.h +++ b/include/configs/canmb.h @@ -111,7 +111,7 @@ /* * IPB Bus clocking configuration. */ -#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ +#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ /* * Flash configuration, expect one 16 Megabyte Bank at most diff --git a/include/configs/cpci5200.h b/include/configs/cpci5200.h index f9586fbcb94..f5efcd911a5 100644 --- a/include/configs/cpci5200.h +++ b/include/configs/cpci5200.h @@ -179,7 +179,7 @@ /* * IPB Bus clocking configuration. */ -#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ +#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ #endif /* * I2C configuration diff --git a/include/configs/hmi1001.h b/include/configs/hmi1001.h index 095b5f6dc27..4d813d8be78 100644 --- a/include/configs/hmi1001.h +++ b/include/configs/hmi1001.h @@ -110,7 +110,7 @@ /* * IPB Bus clocking configuration. */ -#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ +#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ /* * I2C configuration diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h index 773d5d2c1d9..ad3cf06e950 100644 --- a/include/configs/inka4x0.h +++ b/include/configs/inka4x0.h @@ -147,7 +147,7 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ /* * Flash configuration diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h index 621a81c9c56..c2324a04c91 100644 --- a/include/configs/mcc200.h +++ b/include/configs/mcc200.h @@ -169,7 +169,7 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ /* * I2C configuration diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h index e6e0eb1ff51..e3899a5ab40 100644 --- a/include/configs/motionpro.h +++ b/include/configs/motionpro.h @@ -54,7 +54,8 @@ CFG_CMD_JFFS2 | \ CFG_CMD_I2C | \ CFG_CMD_DATE | \ - CFG_CMD_EEPROM) + CFG_CMD_EEPROM | \ + CFG_CMD_DTT) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include @@ -75,7 +76,7 @@ #define CONFIG_MPC5xxx_FEC 1 #define CONFIG_PHY_ADDR 0x2 #define CONFIG_PHY_TYPE 0x79c874 - +#define CONFIG_RESET_PHY_R 1 /* * Autobooting @@ -116,26 +117,27 @@ "fdt_file=/tftpboot/motionpro/motionpro.dtb\0" \ "ramdisk_file=/tftpboot/motionpro/uRamdisk\0" \ "multi_image_file=kernel+initrd+dtb.img\0" \ - "load=tftp $(u-boot_addr) $(u-boot)\0" \ + "load=tftp ${u-boot_addr} ${u-boot}\0" \ "update=prot off fff00000 fff3ffff; era fff00000 fff3ffff; " \ - "cp.b $(u-boot_addr) fff00000 $(filesize);" \ + "cp.b ${u-boot_addr} fff00000 ${filesize};" \ "prot on fff00000 fff3ffff\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$(serverip):$(rootpath)\0" \ + "nfsroot=${serverip}:${rootpath}\0" \ "fat_args=setenv bootargs rw\0" \ - "addip=setenv bootargs $(bootargs) " \ - "ip=$(ipaddr):$(serverip):$(gatewayip):" \ - "$(netmask):$(hostname):$(netdev):off panic=1 " \ - "console=$(console)\0" \ - "net_nfs=tftp $(kernel_addr) $(bootfile); " \ - "tftp $(fdt_addr) $(fdt_file); run nfsargs addip; " \ - "bootm $(kernel_addr) - $(fdt_addr)\0" \ - "net_self=tftp $(kernel_addr) $(bootfile); " \ - "tftp $(fdt_addr) $(fdt_file); " \ - "tftp $(ramdisk_addr) $(ramdisk_file); " \ + "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:" \ + "${netmask}:${hostname}:${netdev}:off panic=1 " \ + "console=${console}\0" \ + "net_nfs=tftp ${kernel_addr} ${bootfile}; " \ + "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip; " \ + "bootm ${kernel_addr} - ${fdt_addr}\0" \ + "net_self=tftp ${kernel_addr} ${bootfile}; " \ + "tftp ${fdt_addr} ${fdt_file}; " \ + "tftp ${ramdisk_addr} ${ramdisk_file}; " \ "run ramargs addip; " \ - "bootm $(kernel_addr) $(ramdisk_addr) $(fdt_addr)\0" \ + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ "fat_multi=run fat_args addip; fatload ide 0:1 " \ "${multi_image_addr} ${multi_image_file}; " \ "bootm ${multi_image_addr}\0" \ @@ -160,9 +162,9 @@ /* - * Set IPB speed to 100MHz (yes, the #define is misnamed) + * Set IPB speed to 100MHz */ -#define CFG_IPBSPEED_133 +#define CFG_IPBCLK_EQUALS_XLBCLK /* @@ -268,7 +270,8 @@ #define MTDIDS_DEFAULT "nor0=motionpro-0" #define MTDPARTS_DEFAULT "mtdparts=motionpro-0:" \ "13m(fs),2m(kernel),256k(uboot)," \ - "64k(env),64k(dtb),-(user_data)" + "64k(env),64k(redund_env),64k(dtb)," \ + "-(user_data)" /* * IDE/ATA configuration @@ -297,8 +300,9 @@ * EEPROM configuration */ #define CFG_I2C_EEPROM_ADDR_LEN 1 -#define CFG_EEPROM_PAGE_WRITE_BITS 3 -#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 70 +#define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* DTT driver needs this */ +#define CFG_EEPROM_PAGE_WRITE_BITS 1 /* 2 bytes per write cycle */ +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 5 /* 2ms/cycle + 3ms extra */ #define CFG_I2C_MULTI_EEPROMS 1 /* 2 EEPROMs (addr:50,52) */ @@ -309,6 +313,35 @@ #define CFG_I2C_RTC_ADDR 0x68 +/* + * Status LED configuration + */ +#define CONFIG_STATUS_LED /* Status LED enabled */ +#define CONFIG_BOARD_SPECIFIC_LED + +#define ENABLE_GPIO_OUT 0x00000024 +#define LED_ON 0x00000010 + +#ifndef __ASSEMBLY__ +/* + * In case of Motion-PRO, a LED is identified by its corresponding + * GPT Enable and Mode Select Register. + */ +typedef volatile unsigned long * led_id_t; + +extern void __led_init(led_id_t id, int state); +extern void __led_toggle(led_id_t id); +extern void __led_set(led_id_t id, int state); +#endif /* __ASSEMBLY__ */ + + +/* + * Temperature sensor + */ +#define CONFIG_DTT_LM75 1 +#define CONFIG_DTT_SENSORS { 0x49 } + + /* * Environment settings */ @@ -318,6 +351,9 @@ #define CFG_ENV_SIZE 0x1000 #define CFG_ENV_SECT_SIZE 0x10000 +/* Configuration of redundant environment */ +#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) +#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) /* * Pin multiplexing configuration @@ -334,12 +370,18 @@ #define CFG_GPS_PORT_CONFIG 0x1105a004 +/* + * Motion-PRO's CPLD revision control register + */ +#define CPLD_REV_REGISTER (CFG_CS2_START + 0x06) + + /* * Miscellaneous configurable options */ #define CFG_LONGHELP /* undef to save memory */ #define CFG_PROMPT "=> " /* Monitor Command Prompt */ -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ @@ -376,6 +418,6 @@ #define OF_CPU "PowerPC,5200@0" #define OF_SOC "soc5200@f0000000" #define OF_TBCLK (bd->bi_busfreq / 4) -#define OF_STDOUT_PAT "/soc5200@f0000000/serial@2000" +#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000" #endif /* __CONFIG_H */ diff --git a/include/configs/o2dnt.h b/include/configs/o2dnt.h index 5c05a745dbb..63d0da7d090 100644 --- a/include/configs/o2dnt.h +++ b/include/configs/o2dnt.h @@ -137,17 +137,17 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ -#if defined(CFG_IPBSPEED_133) +#if defined(CFG_IPBCLK_EQUALS_XLBCLK) /* * PCI Bus clocking configuration * * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if - * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't - * been tested with a IPB Bus Clock of 66 MHz. + * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock + * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz. */ -#define CFG_PCISPEED_66 /* define for 66MHz speed */ +#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */ #endif #endif @@ -276,7 +276,7 @@ #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#ifdef CFG_PCISPEED_66 +#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* * For 66 MHz PCI clock additional Wait State is needed for CS0 (flash). */ diff --git a/include/configs/pf5200.h b/include/configs/pf5200.h index fefdb3cca01..7151a9ec2e2 100644 --- a/include/configs/pf5200.h +++ b/include/configs/pf5200.h @@ -171,7 +171,7 @@ /* * IPB Bus clocking configuration. */ -#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ +#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ #endif /* * I2C configuration diff --git a/include/configs/smmaco4.h b/include/configs/smmaco4.h index e106b3b5746..185c2d48709 100644 --- a/include/configs/smmaco4.h +++ b/include/configs/smmaco4.h @@ -138,17 +138,17 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ -#if defined(CFG_IPBSPEED_133) +#if defined(CFG_IPBCLK_EQUALS_XLBCLK) /* * PCI Bus clocking configuration * * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if - * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't - * been tested with a IPB Bus Clock of 66 MHz. + * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock + * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz. */ -#define CFG_PCISPEED_66 /* define for 66MHz speed */ +#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */ #endif /* @@ -357,7 +357,7 @@ #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#ifdef CFG_PCISPEED_66 +#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2 #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */ #else #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */ diff --git a/include/configs/spieval.h b/include/configs/spieval.h index f40dde2ac83..fd138a5d17a 100644 --- a/include/configs/spieval.h +++ b/include/configs/spieval.h @@ -219,17 +219,17 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ -#if defined(CFG_IPBSPEED_133) +#if defined(CFG_IPBCLK_EQUALS_XLBCLK) /* * PCI Bus clocking configuration * * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if - * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't - * been tested with a IPB Bus Clock of 66 MHz. + * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock + * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz. */ -#define CFG_PCISPEED_66 /* define for 66MHz speed */ +#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */ #endif /* @@ -444,7 +444,7 @@ #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#ifdef CFG_PCISPEED_66 +#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2 #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */ #else #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */ diff --git a/include/configs/uc101.h b/include/configs/uc101.h index 8cd8e9be709..ff061eecc89 100644 --- a/include/configs/uc101.h +++ b/include/configs/uc101.h @@ -114,7 +114,7 @@ /* * IPB Bus clocking configuration. */ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ /* * I2C configuration diff --git a/include/configs/v38b.h b/include/configs/v38b.h index e19591d2993..0b7b19eadab 100644 --- a/include/configs/v38b.h +++ b/include/configs/v38b.h @@ -167,7 +167,7 @@ /* * IPB Bus clocking configuration. */ -#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ +#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ #endif /* diff --git a/include/status_led.h b/include/status_led.h index db4c60fe3f3..71a202fe36e 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -355,6 +355,18 @@ void status_led_set (int led, int state); # define STATUS_LED_ACTIVE 0 /* LED on for bit == 0 */ # define STATUS_LED_BOOT 0 /* LED 0 used for boot status */ +#elif defined(CONFIG_MOTIONPRO) + +#define STATUS_LED_BIT ((vu_long *) MPC5XXX_GPT6_ENABLE) +#define STATUS_LED_PERIOD (CFG_HZ / 10) +#define STATUS_LED_STATE STATUS_LED_BLINKING + +#define STATUS_LED_BIT1 ((vu_long *) MPC5XXX_GPT7_ENABLE) +#define STATUS_LED_PERIOD1 (CFG_HZ / 10) +#define STATUS_LED_STATE1 STATUS_LED_OFF + +#define STATUS_LED_BOOT 0 /* LED 0 used for boot status */ + #else # error Status LED configuration missing #endif