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rockchip: rk3368: enable stimer for rk3368
Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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1f6b599b6d
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@ -16,6 +16,28 @@ __weak int arch_cpu_init(void)
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return 0;
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}
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#define TIMER_LOAD_COUNT_L 0x00
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#define TIMER_LOAD_COUNT_H 0x04
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#define TIMER_CONTROL_REG 0x10
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#define TIMER_EN 0x1
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#define TIMER_FMODE BIT(0)
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#define TIMER_RMODE BIT(1)
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void rockchip_stimer_init(void)
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{
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/* If Timer already enabled, don't re-init it */
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u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
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if (reg & TIMER_EN)
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return;
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writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
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writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
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writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
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writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
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TIMER_CONTROL_REG);
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}
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void board_init_f(ulong dummy)
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{
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struct udevice *dev;
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@ -27,6 +49,11 @@ void board_init_f(ulong dummy)
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hang();
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}
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/* Init secure timer */
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rockchip_stimer_init();
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/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
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timer_init();
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arch_cpu_init();
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preloader_console_init();
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@ -11,6 +11,22 @@
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#include <asm/io.h>
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#include <asm/arch-rockchip/bootrom.h>
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#define TIMER_LOAD_COUNT_L 0x00
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#define TIMER_LOAD_COUNT_H 0x04
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#define TIMER_CONTROL_REG 0x10
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#define TIMER_EN 0x1
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#define TIMER_FMODE BIT(0)
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#define TIMER_RMODE BIT(1)
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__weak void rockchip_stimer_init(void)
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{
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writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
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writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
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writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
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writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
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TIMER_CONTROL_REG);
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}
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void board_init_f(ulong dummy)
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{
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struct udevice *dev;
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@ -35,6 +51,11 @@ void board_init_f(ulong dummy)
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hang();
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}
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/* Init secure timer */
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rockchip_stimer_init();
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/* Init ARM arch timer in arch/arm/cpu/ */
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timer_init();
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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debug("DRAM init failed: %d\n", ret);
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@ -20,7 +20,8 @@
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define COUNTER_FREQUENCY 24000000
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#define CONFIG_ROCKCHIP_STIMER_BASE 0xff830020
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#define COUNTER_FREQUENCY 24000000
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#define CONFIG_SYS_NS16550_MEM32
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