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avr32: convert to dram_init()

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Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Andreas Bießmann 2015-02-06 23:06:43 +01:00
parent e9ed41cc5c
commit 186678600a
11 changed files with 46 additions and 136 deletions
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1
arch/avr32/include/asm/u-boot.h
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@ -26,5 +26,6 @@ typedef struct bd_info {
#define IH_ARCH_DEFAULT IH_ARCH_AVR32 #define IH_ARCH_DEFAULT IH_ARCH_AVR32
int arch_cpu_init(void); int arch_cpu_init(void);
int dram_init(void);
#endif /* __ASM_U_BOOT_H__ */ #endif /* __ASM_U_BOOT_H__ */

1
arch/avr32/lib/Makefile
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@ -11,3 +11,4 @@ obj-y += memset.o
obj-y += board.o obj-y += board.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-y += interrupts.o obj-y += interrupts.o
obj-y += dram_init.o

20
arch/avr32/lib/board.c
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@ -29,6 +29,12 @@ DECLARE_GLOBAL_DATA_PTR;
unsigned long monitor_flash_len; unsigned long monitor_flash_len;
__weak void dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = gd->ram_size;
}
/* Weak aliases for optional board functions */ /* Weak aliases for optional board functions */
static int __do_nothing(void) static int __do_nothing(void)
{ {
@ -82,7 +88,6 @@ void board_init_f(ulong board_type)
unsigned long monitor_len; unsigned long monitor_len;
unsigned long monitor_addr; unsigned long monitor_addr;
unsigned long addr; unsigned long addr;
long sdram_size;
/* Initialize the global data pointer */ /* Initialize the global data pointer */
memset(&gd_data, 0, sizeof(gd_data)); memset(&gd_data, 0, sizeof(gd_data));
@ -97,10 +102,10 @@ void board_init_f(ulong board_type)
serial_init(); serial_init();
console_init_f(); console_init_f();
display_banner(); display_banner();
sdram_size = initdram(board_type); dram_init();
/* If we have no SDRAM, we can't go on */ /* If we have no SDRAM, we can't go on */
if (sdram_size <= 0) if (gd->ram_size <= 0)
panic("No working SDRAM available\n"); panic("No working SDRAM available\n");
/* /*
@ -114,7 +119,7 @@ void board_init_f(ulong board_type)
* - global data struct * - global data struct
* - stack * - stack
*/ */
addr = CONFIG_SYS_SDRAM_BASE + sdram_size; addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size;
monitor_len = (char *)(&__bss_end) - _text; monitor_len = (char *)(&__bss_end) - _text;
/* /*
@ -156,12 +161,7 @@ void board_init_f(ulong board_type)
*(--new_sp) = 0; *(--new_sp) = 0;
*(--new_sp) = 0; *(--new_sp) = 0;
/* dram_init_banksize();
* Initialize the board information struct with the
* information we have.
*/
bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
bd->bi_dram[0].size = sdram_size;
memcpy(new_gd, gd, sizeof(gd_t)); memcpy(new_gd, gd, sizeof(gd_t));

17
arch/avr32/lib/dram_init.c Normal file
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@ -0,0 +1,17 @@
/*
* Copyright (C) 2015 Andreas Bießmann <andreas.devel@googlemail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
/* check for the maximum amount of memory possible on AP7000 devices */
gd->ram_size = get_ram_size(
(void *)CONFIG_SYS_SDRAM_BASE,
(256<<20));
return 0;
}

20
board/atmel/atngw100/atngw100.c
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@ -52,6 +52,8 @@ int board_early_init_f(void)
hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH); portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH);
sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
portmux_enable_usart1(PORTMUX_DRIVE_MIN); portmux_enable_usart1(PORTMUX_DRIVE_MIN);
#if defined(CONFIG_MACB) #if defined(CONFIG_MACB)
@ -68,24 +70,6 @@ int board_early_init_f(void)
return 0; return 0;
} }
phys_size_t initdram(int board_type)
{
unsigned long expected_size;
unsigned long actual_size;
void *sdram_base;
sdram_base = uncached(EBI_SDRAM_BASE);
expected_size = sdram_init(sdram_base, &sdram_config);
actual_size = get_ram_size(sdram_base, expected_size);
if (expected_size != actual_size)
printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);
return actual_size;
}
int board_early_init_r(void) int board_early_init_r(void)
{ {
gd->bd->bi_phy_id[0] = 0x01; gd->bd->bi_phy_id[0] = 0x01;

21
board/atmel/atngw100mkii/atngw100mkii.c
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@ -69,6 +69,9 @@ int board_early_init_f(void)
portmux_select_gpio(PORTMUX_PORT_E, 1 << 23, portmux_select_gpio(PORTMUX_PORT_E, 1 << 23,
PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH
| PORTMUX_DRIVE_MIN); | PORTMUX_DRIVE_MIN);
sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
portmux_enable_usart1(PORTMUX_DRIVE_MIN); portmux_enable_usart1(PORTMUX_DRIVE_MIN);
#if defined(CONFIG_MACB) #if defined(CONFIG_MACB)
@ -85,24 +88,6 @@ int board_early_init_f(void)
return 0; return 0;
} }
phys_size_t initdram(int board_type)
{
unsigned long expected_size;
unsigned long actual_size;
void *sdram_base;
sdram_base = uncached(EBI_SDRAM_BASE);
expected_size = sdram_init(sdram_base, &sdram_config);
actual_size = get_ram_size(sdram_base, expected_size);
if (expected_size != actual_size)
printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);
return actual_size;
}
int board_early_init_r(void) int board_early_init_r(void)
{ {
gd->bd->bi_phy_id[0] = 0x01; gd->bd->bi_phy_id[0] = 0x01;

21
board/atmel/atstk1000/atstk1000.c
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@ -78,7 +78,10 @@ int board_early_init_f(void)
hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
portmux_enable_ebi(sdram_config.data_bits, 23, 0, PORTMUX_DRIVE_HIGH); portmux_enable_ebi(sdram_config.data_bits, 23, 0, PORTMUX_DRIVE_HIGH);
sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
portmux_enable_usart1(PORTMUX_DRIVE_MIN); portmux_enable_usart1(PORTMUX_DRIVE_MIN);
#if defined(CONFIG_MACB) #if defined(CONFIG_MACB)
portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW); portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW); portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
@ -90,24 +93,6 @@ int board_early_init_f(void)
return 0; return 0;
} }
phys_size_t initdram(int board_type)
{
unsigned long expected_size;
unsigned long actual_size;
void *sdram_base;
sdram_base = uncached(EBI_SDRAM_BASE);
expected_size = sdram_init(sdram_base, &sdram_config);
actual_size = get_ram_size(sdram_base, expected_size);
if (expected_size != actual_size)
printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);
return actual_size;
}
int board_early_init_r(void) int board_early_init_r(void)
{ {
gd->bd->bi_phy_id[0] = 0x10; gd->bd->bi_phy_id[0] = 0x10;

21
board/earthlcd/favr-32-ezkit/favr-32-ezkit.c
View File

@ -52,6 +52,9 @@ int board_early_init_f(void)
hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH); portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH);
sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
portmux_enable_usart3(PORTMUX_DRIVE_MIN); portmux_enable_usart3(PORTMUX_DRIVE_MIN);
#if defined(CONFIG_MACB) #if defined(CONFIG_MACB)
portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH); portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
@ -63,24 +66,6 @@ int board_early_init_f(void)
return 0; return 0;
} }
phys_size_t initdram(int board_type)
{
unsigned long expected_size;
unsigned long actual_size;
void *sdram_base;
sdram_base = uncached(EBI_SDRAM_BASE);
expected_size = sdram_init(sdram_base, &sdram_config);
actual_size = get_ram_size(sdram_base, expected_size);
if (expected_size != actual_size)
printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);
return actual_size;
}
int board_early_init_r(void) int board_early_init_r(void)
{ {
gd->bd->bi_phy_id[0] = 0x01; gd->bd->bi_phy_id[0] = 0x01;

20
board/in-circuit/grasshopper/grasshopper.c
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@ -53,6 +53,8 @@ int board_early_init_f(void)
hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
portmux_enable_ebi(SDRAM_DATA_32BIT, 23, 0, PORTMUX_DRIVE_HIGH); portmux_enable_ebi(SDRAM_DATA_32BIT, 23, 0, PORTMUX_DRIVE_HIGH);
sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
portmux_enable_usart0(PORTMUX_DRIVE_MIN); portmux_enable_usart0(PORTMUX_DRIVE_MIN);
portmux_enable_usart1(PORTMUX_DRIVE_MIN); portmux_enable_usart1(PORTMUX_DRIVE_MIN);
#if defined(CONFIG_MACB) #if defined(CONFIG_MACB)
@ -69,24 +71,6 @@ int board_early_init_f(void)
return 0; return 0;
} }
phys_size_t initdram(int board_type)
{
unsigned long expected_size;
unsigned long actual_size;
void *sdram_base;
sdram_base = uncached(EBI_SDRAM_BASE);
expected_size = sdram_init(sdram_base, &sdram_config);
actual_size = get_ram_size(sdram_base, expected_size);
if (expected_size != actual_size)
printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);
return actual_size;
}
int board_early_init_r(void) int board_early_init_r(void)
{ {
gd->bd->bi_phy_id[0] = 0x00; gd->bd->bi_phy_id[0] = 0x00;

20
board/mimc/mimc200/mimc200.c
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@ -91,6 +91,8 @@ int board_early_init_f(void)
/* Enable 26 address bits and NCS2 */ /* Enable 26 address bits and NCS2 */
portmux_enable_ebi(16, 26, PORTMUX_EBI_CS(2), PORTMUX_DRIVE_HIGH); portmux_enable_ebi(16, 26, PORTMUX_EBI_CS(2), PORTMUX_DRIVE_HIGH);
sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
portmux_enable_usart1(PORTMUX_DRIVE_MIN); portmux_enable_usart1(PORTMUX_DRIVE_MIN);
/* de-assert "force sys reset" pin */ /* de-assert "force sys reset" pin */
@ -151,24 +153,6 @@ int board_early_init_f(void)
return 0; return 0;
} }
phys_size_t initdram(int board_type)
{
unsigned long expected_size;
unsigned long actual_size;
void *sdram_base;
sdram_base = uncached(EBI_SDRAM_BASE);
expected_size = sdram_init(sdram_base, &sdram_config);
actual_size = get_ram_size(sdram_base, expected_size);
if (expected_size != actual_size)
printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);
return actual_size;
}
int board_early_init_r(void) int board_early_init_r(void)
{ {
gd->bd->bi_phy_id[0] = 0x01; gd->bd->bi_phy_id[0] = 0x01;

20
board/miromico/hammerhead/hammerhead.c
View File

@ -63,6 +63,8 @@ int board_early_init_f(void)
hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH); portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH);
sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
portmux_enable_usart1(PORTMUX_DRIVE_MIN); portmux_enable_usart1(PORTMUX_DRIVE_MIN);
#if defined(CONFIG_MACB) #if defined(CONFIG_MACB)
@ -74,24 +76,6 @@ int board_early_init_f(void)
return 0; return 0;
} }
phys_size_t initdram(int board_type)
{
unsigned long expected_size;
unsigned long actual_size;
void *sdram_base;
sdram_base = uncached(EBI_SDRAM_BASE);
expected_size = sdram_init(sdram_base, &sdram_config);
actual_size = get_ram_size(sdram_base, expected_size);
if (expected_size != actual_size)
printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);
return actual_size;
}
int board_early_init_r(void) int board_early_init_r(void)
{ {
gd->bd->bi_phy_id[0] = 0x01; gd->bd->bi_phy_id[0] = 0x01;