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https://github.com/u-boot/u-boot.git
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arm: dts: imx8mm: sync dts from Linux Kernel 5.10-rc6
There have been some updates to the device tree since 5.6. This also includes some clocks, and makes it easier to keep board device tree files in sync with Linux Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Adam Ford
Stefano Babic
parent
d72cecec7f
commit
15d79fcac0
@ -18,10 +18,18 @@
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aliases {
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ethernet0 = &fec1;
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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gpio2 = &gpio3;
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gpio3 = &gpio4;
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gpio4 = &gpio5;
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i2c0 = &i2c1;
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i2c1 = &i2c2;
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i2c2 = &i2c3;
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i2c3 = &i2c4;
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mmc0 = &usdhc1;
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mmc1 = &usdhc2;
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mmc2 = &usdhc3;
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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@ -29,14 +37,6 @@
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spi0 = &ecspi1;
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spi1 = &ecspi2;
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spi2 = &ecspi3;
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mmc0 = &usdhc1;
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mmc1 = &usdhc2;
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mmc2 = &usdhc3;
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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gpio2 = &gpio3;
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gpio3 = &gpio4;
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gpio4 = &gpio5;
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};
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cpus {
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@ -68,6 +68,7 @@
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nvmem-cells = <&cpu_speed_grade>;
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nvmem-cell-names = "speed_grade";
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cpu-idle-states = <&cpu_pd_wait>;
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#cooling-cells = <2>;
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};
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A53_1: cpu@1 {
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@ -80,6 +81,7 @@
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next-level-cache = <&A53_L2>;
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operating-points-v2 = <&a53_opp_table>;
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cpu-idle-states = <&cpu_pd_wait>;
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#cooling-cells = <2>;
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};
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A53_2: cpu@2 {
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@ -92,6 +94,7 @@
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next-level-cache = <&A53_L2>;
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operating-points-v2 = <&a53_opp_table>;
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cpu-idle-states = <&cpu_pd_wait>;
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#cooling-cells = <2>;
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};
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A53_3: cpu@3 {
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@ -104,6 +107,7 @@
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next-level-cache = <&A53_L2>;
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operating-points-v2 = <&a53_opp_table>;
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cpu-idle-states = <&cpu_pd_wait>;
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#cooling-cells = <2>;
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};
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A53_L2: l2-cache0 {
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@ -125,7 +129,7 @@
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opp-1600000000 {
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opp-hz = /bits/ 64 <1600000000>;
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opp-microvolt = <900000>;
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opp-microvolt = <950000>;
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opp-supported-hw = <0xc>, <0x7>;
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clock-latency-ns = <150000>;
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opp-suspend;
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@ -204,6 +208,38 @@
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arm,no-tick-in-suspend;
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};
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thermal-zones {
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cpu-thermal {
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polling-delay-passive = <250>;
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polling-delay = <2000>;
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thermal-sensors = <&tmu>;
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trips {
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cpu_alert0: trip0 {
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temperature = <85000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu_crit0: trip1 {
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temperature = <95000>;
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hysteresis = <2000>;
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type = "critical";
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};
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};
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cooling-maps {
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map0 {
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trip = <&cpu_alert0>;
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cooling-device =
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<&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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};
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};
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};
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usbphynop1: usbphynop1 {
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compatible = "usb-nop-xceiv";
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clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
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@ -227,12 +263,14 @@
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ranges = <0x0 0x0 0x0 0x3e000000>;
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aips1: bus@30000000 {
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compatible = "simple-bus";
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compatible = "fsl,aips-bus", "simple-bus";
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reg = <0x30000000 0x400000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x30000000 0x30000000 0x400000>;
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sai1: sai@30010000 {
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#sound-dai-cells = <0>;
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compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
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reg = <0x30010000 0x10000>;
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interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
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@ -246,6 +284,7 @@
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};
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sai2: sai@30020000 {
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#sound-dai-cells = <0>;
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compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
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reg = <0x30020000 0x10000>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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@ -273,6 +312,7 @@
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};
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sai5: sai@30050000 {
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#sound-dai-cells = <0>;
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compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
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reg = <0x30050000 0x10000>;
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interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
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@ -286,6 +326,7 @@
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};
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sai6: sai@30060000 {
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#sound-dai-cells = <0>;
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compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
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reg = <0x30060000 0x10000>;
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interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
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@ -363,6 +404,13 @@
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gpio-ranges = <&iomuxc 0 119 30>;
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};
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tmu: tmu@30260000 {
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compatible = "fsl,imx8mm-tmu";
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reg = <0x30260000 0x10000>;
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clocks = <&clk IMX8MM_CLK_TMU_ROOT>;
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#thermal-sensor-cells = <0>;
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};
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wdog1: watchdog@30280000 {
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compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt";
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reg = <0x30280000 0x10000>;
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@ -419,7 +467,7 @@
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reg = <0x30340000 0x10000>;
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};
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ocotp: ocotp-ctrl@30350000 {
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ocotp: efuse@30350000 {
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compatible = "fsl,imx8mm-ocotp", "syscon";
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reg = <0x30350000 0x10000>;
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clocks = <&clk IMX8MM_CLK_OCOTP_ROOT>;
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@ -455,6 +503,8 @@
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compatible = "fsl,sec-v4.0-pwrkey";
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regmap = <&snvs>;
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interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MM_CLK_SNVS_ROOT>;
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clock-names = "snvs-pwrkey";
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linux,keycode = <KEY_POWER>;
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wakeup-source;
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status = "disabled";
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@ -469,16 +519,20 @@
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<&clk_ext3>, <&clk_ext4>;
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clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
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"clk_ext3", "clk_ext4";
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assigned-clocks = <&clk IMX8MM_CLK_NOC>,
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assigned-clocks = <&clk IMX8MM_CLK_A53_SRC>,
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<&clk IMX8MM_CLK_A53_CORE>,
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<&clk IMX8MM_CLK_NOC>,
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<&clk IMX8MM_CLK_AUDIO_AHB>,
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<&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
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<&clk IMX8MM_SYS_PLL3>,
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<&clk IMX8MM_VIDEO_PLL1>,
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<&clk IMX8MM_AUDIO_PLL1>,
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<&clk IMX8MM_AUDIO_PLL2>;
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assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
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assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_800M>,
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<&clk IMX8MM_ARM_PLL_OUT>,
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<&clk IMX8MM_SYS_PLL3_OUT>,
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<&clk IMX8MM_SYS_PLL1_800M>;
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assigned-clock-rates = <0>,
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assigned-clock-rates = <0>, <0>, <0>,
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<400000000>,
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<400000000>,
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<750000000>,
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@ -496,7 +550,8 @@
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};
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aips2: bus@30400000 {
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compatible = "simple-bus";
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compatible = "fsl,aips-bus", "simple-bus";
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reg = <0x30400000 0x400000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x30400000 0x30400000 0x400000>;
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@ -555,10 +610,12 @@
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};
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aips3: bus@30800000 {
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compatible = "simple-bus";
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compatible = "fsl,aips-bus", "simple-bus";
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reg = <0x30800000 0x400000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x30800000 0x30800000 0x400000>;
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ranges = <0x30800000 0x30800000 0x400000>,
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<0x8000000 0x8000000 0x10000000>;
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ecspi1: spi@30820000 {
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compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
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@ -718,6 +775,14 @@
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status = "disabled";
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};
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mu: mailbox@30aa0000 {
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compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu";
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reg = <0x30aa0000 0x10000>;
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interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MM_CLK_MU_ROOT>;
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#mbox-cells = <2>;
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};
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usdhc1: mmc@30b40000 {
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compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
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reg = <0x30b40000 0x10000>;
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@ -760,6 +825,19 @@
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status = "disabled";
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};
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flexspi: spi@30bb0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "nxp,imx8mm-fspi";
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reg = <0x30bb0000 0x10000>, <0x8000000 0x10000000>;
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reg-names = "fspi_base", "fspi_mmap";
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interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MM_CLK_QSPI_ROOT>,
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<&clk IMX8MM_CLK_QSPI_ROOT>;
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clock-names = "fspi", "fspi_en";
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status = "disabled";
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};
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sdma1: dma-controller@30bd0000 {
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compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
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reg = <0x30bd0000 0x10000>;
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@ -776,7 +854,8 @@
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reg = <0x30be0000 0x10000>;
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interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MM_CLK_ENET1_ROOT>,
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<&clk IMX8MM_CLK_ENET1_ROOT>,
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<&clk IMX8MM_CLK_ENET_TIMER>,
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@ -800,7 +879,8 @@
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};
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aips4: bus@32c00000 {
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compatible = "simple-bus";
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compatible = "fsl,aips-bus", "simple-bus";
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reg = <0x32c00000 0x400000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x32c00000 0x32c00000 0x400000>;
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@ -896,7 +976,6 @@
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ddr-pmu@3d800000 {
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compatible = "fsl,imx8mm-ddr-pmu", "fsl,imx8m-ddr-pmu";
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reg = <0x3d800000 0x400000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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