mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-25 05:04:23 +08:00
Merge git://git.denx.de/u-boot-mmc
This commit is contained in:
commit
14249635b6
@ -37,6 +37,8 @@ CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_S5P=y
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||||
CONFIG_DM_PMIC=y
|
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CONFIG_DM_PMIC_MAX77686=y
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CONFIG_DM_REGULATOR=y
|
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CONFIG_DM_REGULATOR_MAX77686=y
|
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CONFIG_USB=y
|
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CONFIG_DM_USB=y
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CONFIG_USB_GADGET=y
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|
@ -124,6 +124,14 @@ config MMC_VERBOSE
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Enable the output of more information about the card such as the
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operating mode.
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config MMC_TRACE
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bool "MMC debugging"
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default n
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help
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This is an option for use by developer. Enable MMC core debugging.
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If you need to see the MMC core message, say Y.
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config SPL_MMC_TINY
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bool "Tiny MMC framework in SPL"
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help
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|
@ -982,7 +982,7 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
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#endif
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/* Set the initial clock speed */
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mmc_set_clock(mmc, 400000, false);
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mmc_set_clock(mmc, 400000, MMC_CLK_ENABLE);
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/* Disable the BRR and BWR bits in IRQSTAT */
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esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
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|
@ -252,7 +252,7 @@ static int meson_mmc_probe(struct udevice *dev)
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mmc->priv = pdata;
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upriv->mmc = mmc;
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mmc_set_clock(mmc, cfg->f_min, false);
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mmc_set_clock(mmc, cfg->f_min, MMC_CLK_ENABLE);
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/* reset all status bits */
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meson_write(mmc, STATUS_MASK, MESON_SD_EMMC_STATUS);
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|
@ -529,7 +529,7 @@ static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage)
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* During a signal voltage level switch, the clock must be gated
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* for 5 ms according to the SD spec
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*/
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mmc_set_clock(mmc, mmc->clock, true);
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mmc_set_clock(mmc, mmc->clock, MMC_CLK_DISABLE);
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err = mmc_set_signal_voltage(mmc, signal_voltage);
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if (err)
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@ -537,7 +537,7 @@ static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage)
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/* Keep clock gated for at least 10 ms, though spec only says 5 ms */
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mdelay(10);
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mmc_set_clock(mmc, mmc->clock, false);
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mmc_set_clock(mmc, mmc->clock, MMC_CLK_ENABLE);
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/*
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* Failure to switch is indicated by the card holding
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@ -1506,6 +1506,8 @@ int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
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mmc->clock = clock;
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mmc->clk_disable = disable;
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debug("clock is %s (%dHz)\n", disable ? "disabled" : "enabled", clock);
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return mmc_set_ios(mmc);
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}
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@ -1672,7 +1674,8 @@ static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
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/* configure the bus mode (host) */
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mmc_select_mode(mmc, mwt->mode);
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mmc_set_clock(mmc, mmc->tran_speed, false);
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mmc_set_clock(mmc, mmc->tran_speed,
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MMC_CLK_ENABLE);
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#ifdef MMC_SUPPORTS_TUNING
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/* execute tuning if needed */
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@ -1697,7 +1700,8 @@ static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
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error:
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/* revert to a safer bus speed */
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mmc_select_mode(mmc, SD_LEGACY);
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mmc_set_clock(mmc, mmc->tran_speed, false);
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mmc_set_clock(mmc, mmc->tran_speed,
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MMC_CLK_ENABLE);
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}
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}
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}
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@ -1858,7 +1862,7 @@ static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
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return -ENOTSUPP;
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}
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mmc_set_clock(mmc, mmc->legacy_speed, false);
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mmc_set_clock(mmc, mmc->legacy_speed, MMC_CLK_ENABLE);
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for_each_mmc_mode_by_pref(card_caps, mwt) {
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for_each_supported_width(card_caps & mwt->widths,
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@ -1901,7 +1905,7 @@ static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
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/* configure the bus mode (host) */
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mmc_select_mode(mmc, mwt->mode);
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mmc_set_clock(mmc, mmc->tran_speed, false);
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mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE);
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#ifdef MMC_SUPPORTS_TUNING
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/* execute tuning if needed */
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@ -2426,7 +2430,7 @@ static void mmc_set_initial_state(struct mmc *mmc)
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mmc_select_mode(mmc, MMC_LEGACY);
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mmc_set_bus_width(mmc, 1);
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mmc_set_clock(mmc, 0, false);
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mmc_set_clock(mmc, 0, MMC_CLK_ENABLE);
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}
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static int mmc_power_on(struct mmc *mmc)
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@ -2446,7 +2450,7 @@ static int mmc_power_on(struct mmc *mmc)
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static int mmc_power_off(struct mmc *mmc)
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{
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mmc_set_clock(mmc, 0, true);
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mmc_set_clock(mmc, 0, MMC_CLK_DISABLE);
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#if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
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if (mmc->vmmc_supply) {
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int ret = regulator_set_enable(mmc->vmmc_supply, false);
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|
@ -123,7 +123,7 @@ static int socfpga_dwmmc_probe(struct udevice *dev)
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upriv->mmc = host->mmc;
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host->mmc->dev = dev;
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return 0;
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return dwmci_probe(dev);
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}
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static int socfpga_dwmmc_bind(struct udevice *dev)
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@ -28,7 +28,6 @@ obj-$(CONFIG_POWER_MAX77696) += pmic_max77696.o
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obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o
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obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o
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obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o
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obj-$(CONFIG_POWER_MAX77686) += pmic_max77686.o
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obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o
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obj-$(CONFIG_POWER_PFUZE3000) += pmic_pfuze3000.o
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obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o
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@ -1,303 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2012 Samsung Electronics
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* Rajeshwari Shinde <rajeshwari.s@samsung.com>
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*/
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#include <common.h>
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#include <fdtdec.h>
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#include <i2c.h>
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#include <power/pmic.h>
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#include <power/max77686_pmic.h>
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#include <errno.h>
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DECLARE_GLOBAL_DATA_PTR;
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static const char max77686_buck_addr[] = {
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0xff, 0x10, 0x12, 0x1c, 0x26, 0x30, 0x32, 0x34, 0x36, 0x38
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};
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static unsigned int max77686_ldo_volt2hex(int ldo, ulong uV)
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{
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unsigned int hex = 0;
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switch (ldo) {
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case 1:
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case 2:
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case 6:
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case 7:
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case 8:
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case 15:
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hex = (uV - 800000) / 25000;
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break;
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default:
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hex = (uV - 800000) / 50000;
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}
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if (hex >= 0 && hex <= MAX77686_LDO_VOLT_MAX_HEX)
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return hex;
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debug("%s: %ld is wrong voltage value for LDO%d\n", __func__, uV, ldo);
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return 0;
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}
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static int max77686_buck_volt2hex(int buck, ulong uV)
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{
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int hex = 0;
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if (buck < 5 || buck > 9) {
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debug("%s: buck %d is not supported\n", __func__, buck);
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return -EINVAL;
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}
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hex = (uV - 750000) / 50000;
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if (hex >= 0 && hex <= MAX77686_BUCK_VOLT_MAX_HEX)
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return hex;
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debug("%s: %ld is wrong voltage value for BUCK%d\n",
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__func__, uV, buck);
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return -EINVAL;
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}
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int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV)
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{
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unsigned int val, ret, hex, adr;
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if (ldo < 1 || ldo > 26) {
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printf("%s: %d is wrong ldo number\n", __func__, ldo);
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return -EINVAL;
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}
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adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1;
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hex = max77686_ldo_volt2hex(ldo, uV);
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if (!hex)
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return -EINVAL;
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ret = pmic_reg_read(p, adr, &val);
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if (ret)
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return ret;
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val &= ~MAX77686_LDO_VOLT_MASK;
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val |= hex;
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ret |= pmic_reg_write(p, adr, val);
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return ret;
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}
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int max77686_set_buck_voltage(struct pmic *p, int buck, ulong uV)
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{
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unsigned int val, adr;
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int hex, ret;
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if (buck < 5 || buck > 9) {
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printf("%s: %d is an unsupported bucket number\n",
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__func__, buck);
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return -EINVAL;
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}
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adr = max77686_buck_addr[buck] + 1;
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hex = max77686_buck_volt2hex(buck, uV);
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if (hex < 0)
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return hex;
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ret = pmic_reg_read(p, adr, &val);
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if (ret)
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return ret;
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val &= ~MAX77686_BUCK_VOLT_MASK;
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ret |= pmic_reg_write(p, adr, val | hex);
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return ret;
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}
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int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode)
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{
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unsigned int val, ret, adr, mode;
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if (ldo < 1 || 26 < ldo) {
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printf("%s: %d is wrong ldo number\n", __func__, ldo);
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return -EINVAL;
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}
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|
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adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1;
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/* mode */
|
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switch (opmode) {
|
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case OPMODE_OFF:
|
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mode = MAX77686_LDO_MODE_OFF;
|
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break;
|
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case OPMODE_STANDBY:
|
||||
switch (ldo) {
|
||||
case 2:
|
||||
case 6:
|
||||
case 7:
|
||||
case 8:
|
||||
case 10:
|
||||
case 11:
|
||||
case 12:
|
||||
case 14:
|
||||
case 15:
|
||||
case 16:
|
||||
mode = MAX77686_LDO_MODE_STANDBY;
|
||||
break;
|
||||
default:
|
||||
mode = 0xff;
|
||||
}
|
||||
break;
|
||||
case OPMODE_LPM:
|
||||
mode = MAX77686_LDO_MODE_LPM;
|
||||
break;
|
||||
case OPMODE_ON:
|
||||
mode = MAX77686_LDO_MODE_ON;
|
||||
break;
|
||||
default:
|
||||
mode = 0xff;
|
||||
}
|
||||
|
||||
if (mode == 0xff) {
|
||||
printf("%s: %d is not supported on LDO%d\n",
|
||||
__func__, opmode, ldo);
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
ret = pmic_reg_read(p, adr, &val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
val &= ~MAX77686_LDO_MODE_MASK;
|
||||
val |= mode;
|
||||
ret |= pmic_reg_write(p, adr, val);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int max77686_set_buck_mode(struct pmic *p, int buck, char opmode)
|
||||
{
|
||||
unsigned int val, ret, mask, adr, size, mode, mode_shift;
|
||||
|
||||
size = ARRAY_SIZE(max77686_buck_addr);
|
||||
if (buck >= size) {
|
||||
printf("%s: %d is wrong buck number\n", __func__, buck);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
adr = max77686_buck_addr[buck];
|
||||
|
||||
/* mask */
|
||||
switch (buck) {
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
mode_shift = MAX77686_BUCK_MODE_SHIFT_2;
|
||||
break;
|
||||
default:
|
||||
mode_shift = MAX77686_BUCK_MODE_SHIFT_1;
|
||||
}
|
||||
|
||||
mask = MAX77686_BUCK_MODE_MASK << mode_shift;
|
||||
|
||||
/* mode */
|
||||
switch (opmode) {
|
||||
case OPMODE_OFF:
|
||||
mode = MAX77686_BUCK_MODE_OFF << mode_shift;
|
||||
break;
|
||||
case OPMODE_STANDBY:
|
||||
switch (buck) {
|
||||
case 1:
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
mode = MAX77686_BUCK_MODE_STANDBY << mode_shift;
|
||||
break;
|
||||
default:
|
||||
mode = 0xff;
|
||||
}
|
||||
break;
|
||||
case OPMODE_LPM:
|
||||
switch (buck) {
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
mode = MAX77686_BUCK_MODE_LPM << mode_shift;
|
||||
break;
|
||||
default:
|
||||
mode = 0xff;
|
||||
}
|
||||
break;
|
||||
case OPMODE_ON:
|
||||
mode = MAX77686_BUCK_MODE_ON << mode_shift;
|
||||
break;
|
||||
default:
|
||||
mode = 0xff;
|
||||
}
|
||||
|
||||
if (mode == 0xff) {
|
||||
printf("%s: %d is not supported on BUCK%d\n",
|
||||
__func__, opmode, buck);
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
ret = pmic_reg_read(p, adr, &val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
val &= ~mask;
|
||||
val |= mode;
|
||||
ret |= pmic_reg_write(p, adr, val);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int pmic_init(unsigned char bus)
|
||||
{
|
||||
static const char name[] = "MAX77686_PMIC";
|
||||
struct pmic *p = pmic_alloc();
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
const void *blob = gd->fdt_blob;
|
||||
int node, parent, tmp;
|
||||
#endif
|
||||
|
||||
if (!p) {
|
||||
printf("%s: POWER allocation error!\n", __func__);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
#if CONFIG_IS_ENABLED(OF_CONTROL)
|
||||
node = fdtdec_next_compatible(blob, 0, COMPAT_MAXIM_MAX77686_PMIC);
|
||||
if (node < 0) {
|
||||
debug("PMIC: No node for PMIC Chip in device tree\n");
|
||||
debug("node = %d\n", node);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
parent = fdt_parent_offset(blob, node);
|
||||
if (parent < 0) {
|
||||
debug("%s: Cannot find node parent\n", __func__);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* tmp since p->bus is unsigned */
|
||||
tmp = i2c_get_bus_num_fdt(parent);
|
||||
if (tmp < 0) {
|
||||
debug("%s: Cannot find I2C bus\n", __func__);
|
||||
return -ENODEV;
|
||||
}
|
||||
p->bus = tmp;
|
||||
p->hw.i2c.addr = fdtdec_get_int(blob, node, "reg", 9);
|
||||
#else
|
||||
p->bus = bus;
|
||||
p->hw.i2c.addr = MAX77686_I2C_ADDR;
|
||||
#endif
|
||||
|
||||
p->name = name;
|
||||
p->interface = PMIC_I2C;
|
||||
p->number_of_regs = MAX77686_NUM_OF_REGS;
|
||||
p->hw.i2c.tx_num = 1;
|
||||
|
||||
puts("Board PMIC init\n");
|
||||
|
||||
return 0;
|
||||
}
|
@ -12,9 +12,6 @@
|
||||
#include <errno.h>
|
||||
#include <pwm.h>
|
||||
#include <power/regulator.h>
|
||||
#include <linux/libfdt.h>
|
||||
#include <fdt_support.h>
|
||||
#include <fdtdec.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
@ -93,13 +90,10 @@ static int pwm_regulator_set_voltage(struct udevice *dev, int uvolt)
|
||||
static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
|
||||
{
|
||||
struct pwm_regulator_info *priv = dev_get_priv(dev);
|
||||
struct fdtdec_phandle_args args;
|
||||
const void *blob = gd->fdt_blob;
|
||||
int node = dev_of_offset(dev);
|
||||
struct ofnode_phandle_args args;
|
||||
int ret;
|
||||
|
||||
ret = fdtdec_parse_phandle_with_args(blob, node, "pwms", "#pwm-cells",
|
||||
0, 0, &args);
|
||||
ret = dev_read_phandle_with_args(dev, "pwms", "#pwm-cells", 0, 0, &args);
|
||||
if (ret) {
|
||||
debug("%s: Cannot get PWM phandle: ret=%d\n", __func__, ret);
|
||||
return ret;
|
||||
@ -108,14 +102,13 @@ static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
|
||||
priv->period_ns = args.args[1];
|
||||
priv->polarity = args.args[2];
|
||||
|
||||
priv->init_voltage = fdtdec_get_int(blob, node,
|
||||
"regulator-init-microvolt", -1);
|
||||
priv->init_voltage = dev_read_u32_default(dev, "regulator-init-microvolt", -1);
|
||||
if (priv->init_voltage < 0) {
|
||||
printf("Cannot find regulator pwm init_voltage\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = uclass_get_device_by_of_offset(UCLASS_PWM, args.node, &priv->pwm);
|
||||
ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm);
|
||||
if (ret) {
|
||||
debug("%s: Cannot get PWM: ret=%d\n", __func__, ret);
|
||||
return ret;
|
||||
|
@ -136,7 +136,6 @@ enum fdt_compat_id {
|
||||
COMPAT_SAMSUNG_EXYNOS_MIPI_DSI, /* Exynos mipi dsi */
|
||||
COMPAT_SAMSUNG_EXYNOS_DWMMC, /* Exynos DWMMC controller */
|
||||
COMPAT_SAMSUNG_EXYNOS_MMC, /* Exynos MMC controller */
|
||||
COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
|
||||
COMPAT_GENERIC_SPI_FLASH, /* Generic SPI Flash chip */
|
||||
COMPAT_MAXIM_98095_CODEC, /* MAX98095 Codec */
|
||||
COMPAT_SAMSUNG_EXYNOS5_I2C, /* Exynos5 High Speed I2C Controller */
|
||||
|
@ -707,6 +707,9 @@ int mmc_voltage_to_mv(enum mmc_voltage voltage);
|
||||
*/
|
||||
int mmc_set_clock(struct mmc *mmc, uint clock, bool disable);
|
||||
|
||||
#define MMC_CLK_ENABLE false
|
||||
#define MMC_CLK_DISABLE true
|
||||
|
||||
struct mmc *find_mmc_device(int dev_num);
|
||||
int mmc_set_dev(int dev_num);
|
||||
void print_mmc_devices(char separator);
|
||||
|
@ -48,7 +48,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
|
||||
COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
|
||||
COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
|
||||
COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
|
||||
COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
|
||||
COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
|
||||
COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
|
||||
COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
|
||||
|
Loading…
Reference in New Issue
Block a user