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arm: omap2plus: Move CONFIG_SYS_PTV out of CONFIG namespace
This is always defined to 2, and referenced in two places. Move the define to <asm/omap_common.h> and make sure the code that uses this includes that file. Make <asm/arch-omap*/clock.h> not include that file, as we don't need to be doing so. Signed-off-by: Tom Rini <trini@konsulko.com>
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@ -7,7 +7,6 @@
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*/
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#ifndef _CLOCKS_OMAP4_H_
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#define _CLOCKS_OMAP4_H_
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#include <asm/omap_common.h>
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/*
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* Assuming a maximum of 1.5 GHz ARM speed and a minimum of 2 cycles per
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@ -8,7 +8,6 @@
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*/
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#ifndef _CLOCKS_OMAP5_H_
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#define _CLOCKS_OMAP5_H_
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#include <asm/omap_common.h>
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/*
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* Assuming a maximum of 1.5 GHz ARM speed and a minimum of 2 cycles per
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@ -13,6 +13,7 @@
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#include <linux/types.h>
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#define NUM_SYS_CLKS 7
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#define SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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struct bd_info;
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@ -13,6 +13,7 @@
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#include <asm/arch/sata.h>
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#include <sata.h>
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#include <asm/io.h>
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#include <asm/omap_common.h>
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#include "pipe3-phy.h"
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static struct pipe3_dpll_map dpll_map_sata[] = {
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@ -22,6 +22,7 @@
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/clock.h>
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#include <asm/omap_common.h>
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#include <linux/delay.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -33,7 +34,7 @@ static ulong get_timer_masked(void);
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* Nothing really to do with interrupts, just starts up a counter.
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*/
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#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV))
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#define TIMER_CLOCK (V_SCLK / (2 << SYS_PTV))
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#define TIMER_OVERFLOW_VAL 0xffffffff
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#define TIMER_LOAD_VAL 0
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@ -42,7 +43,7 @@ int timer_init(void)
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/* start the counter ticking up, reload value on overflow */
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writel(TIMER_LOAD_VAL, &timer_base->tldr);
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/* enable timer */
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writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
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writel((SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
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&timer_base->tclr);
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return 0;
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@ -11,6 +11,7 @@
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#include <timer.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/omap_common.h>
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#include <linux/bitops.h>
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/* Timer register bits */
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@ -61,13 +62,13 @@ static int omap_timer_probe(struct udevice *dev)
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if (!uc_priv->clock_rate)
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uc_priv->clock_rate = V_SCLK;
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uc_priv->clock_rate /= (2 << CONFIG_SYS_PTV);
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uc_priv->clock_rate /= (2 << SYS_PTV);
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/* start the counter ticking up, reload value on overflow */
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writel(0, &priv->regs->tldr);
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writel(0, &priv->regs->tcrr);
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/* enable timer */
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writel((CONFIG_SYS_PTV << 2) | TCLR_PRE_EN | TCLR_AUTO_RELOAD |
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writel((SYS_PTV << 2) | TCLR_PRE_EN | TCLR_AUTO_RELOAD |
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TCLR_START, &priv->regs->tclr);
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return 0;
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@ -24,7 +24,6 @@
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#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
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/* Timer information */
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
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#include <asm/arch/omap.h>
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@ -153,7 +153,6 @@
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* This rate is divided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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/*
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* Physical Memory Map
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@ -42,7 +42,6 @@
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GENERATED_GBL_DATA_SIZE)
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/* Platform/Board specific defs */
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#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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/* NS16550 Configuration */
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#define CONFIG_SYS_NS16550_SERIAL
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@ -16,7 +16,6 @@
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*/
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#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
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#define CONFIG_SYS_PTV 2
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#define V_NS16550_CLK 48000000
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#define V_OSCK 26000000
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@ -77,7 +77,6 @@
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* Platform/Board specific defs
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*/
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#define CONFIG_SYS_TIMERBASE 0x4802E000
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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/* NS16550 Configuration */
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#define CONFIG_SYS_NS16550_SERIAL
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@ -28,7 +28,6 @@
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* Platform/Board specific defs
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*/
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#define CONFIG_SYS_TIMERBASE 0x4802E000
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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/*
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* NS16550 Configuration
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@ -71,9 +71,6 @@
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GENERATED_GBL_DATA_SIZE)
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#endif
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/* Timer information. */
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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/* If DM_I2C, enable non-DM I2C support */
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/*
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