mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-29 07:33:29 +08:00
arm64: board support of vexpress_aemv8a
Signed-off-by: David Feng <fenghua@phytium.com.cn> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
This commit is contained in:
parent
cce6be7f08
commit
129168290a
8
board/armltd/vexpress64/Makefile
Normal file
8
board/armltd/vexpress64/Makefile
Normal file
@ -0,0 +1,8 @@
|
||||
#
|
||||
# (C) Copyright 2000-2004
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y := vexpress64.o
|
56
board/armltd/vexpress64/vexpress64.c
Normal file
56
board/armltd/vexpress64/vexpress64.c
Normal file
@ -0,0 +1,56 @@
|
||||
/*
|
||||
* (C) Copyright 2013
|
||||
* David Feng <fenghua@phytium.com.cn>
|
||||
* Sharma Bhupesh <bhupesh.sharma@freescale.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <malloc.h>
|
||||
#include <errno.h>
|
||||
#include <netdev.h>
|
||||
#include <asm/io.h>
|
||||
#include <linux/compiler.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
int board_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dram_init(void)
|
||||
{
|
||||
/*
|
||||
* Clear spin table so that secondary processors
|
||||
* observe the correct value after waken up from wfe.
|
||||
*/
|
||||
*(unsigned long *)CPU_RELEASE_ADDR = 0;
|
||||
|
||||
gd->ram_size = PHYS_SDRAM_1_SIZE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int timer_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Board specific reset that is system reset.
|
||||
*/
|
||||
void reset_cpu(ulong addr)
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
* Board specific ethernet initialization routine.
|
||||
*/
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = 0;
|
||||
#ifdef CONFIG_SMC91111
|
||||
rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
@ -397,6 +397,7 @@ Active arm pxa - - vpac270
|
||||
Active arm pxa - icpdas lp8x4x lp8x4x - Sergey Yanovich <ynvich@gmail.com>
|
||||
Active arm pxa - toradex - colibri_pxa270 - Marek Vasut <marek.vasut@gmail.com>
|
||||
Active arm sa1100 - - - jornada - Kristoffer Ericson <kristoffer.ericson@gmail.com>
|
||||
Active arm armv8 - armltd vexpress64 vexpress_aemv8a vexpress_aemv8a:ARM64 David Feng <fenghua@phytium.com.cn>
|
||||
Active avr32 at32ap at32ap700x atmel - atngw100 - Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
|
||||
Active avr32 at32ap at32ap700x atmel - atngw100mkii - Andreas Bießmann <andreas.devel@googlemail.com>
|
||||
Active avr32 at32ap at32ap700x atmel atstk1000 atstk1002 - Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
|
||||
|
189
include/configs/vexpress_aemv8a.h
Normal file
189
include/configs/vexpress_aemv8a.h
Normal file
@ -0,0 +1,189 @@
|
||||
/*
|
||||
* Configuration for Versatile Express. Parts were derived from other ARM
|
||||
* configurations.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __VEXPRESS_AEMV8A_H
|
||||
#define __VEXPRESS_AEMV8A_H
|
||||
|
||||
#define DEBUG
|
||||
|
||||
#define CONFIG_REMAKE_ELF
|
||||
|
||||
/*#define CONFIG_ARMV8_SWITCH_TO_EL1*/
|
||||
|
||||
/*#define CONFIG_SYS_GENERIC_BOARD*/
|
||||
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
|
||||
#define CONFIG_SUPPORT_RAW_INITRD
|
||||
|
||||
/* Cache Definitions */
|
||||
#define CONFIG_SYS_DCACHE_OFF
|
||||
#define CONFIG_SYS_ICACHE_OFF
|
||||
|
||||
#define CONFIG_IDENT_STRING " vexpress_aemv8a"
|
||||
#define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a"
|
||||
|
||||
/* Link Definitions */
|
||||
#define CONFIG_SYS_TEXT_BASE 0x80000000
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
|
||||
|
||||
/* Flat Device Tree Definitions */
|
||||
#define CONFIG_OF_LIBFDT
|
||||
|
||||
#define CONFIG_DEFAULT_DEVICE_TREE vexpress64
|
||||
|
||||
/* SMP Spin Table Definitions */
|
||||
#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
|
||||
|
||||
/* CS register bases for the original memory map. */
|
||||
#define V2M_PA_CS0 0x00000000
|
||||
#define V2M_PA_CS1 0x14000000
|
||||
#define V2M_PA_CS2 0x18000000
|
||||
#define V2M_PA_CS3 0x1c000000
|
||||
#define V2M_PA_CS4 0x0c000000
|
||||
#define V2M_PA_CS5 0x10000000
|
||||
|
||||
#define V2M_PERIPH_OFFSET(x) (x << 16)
|
||||
#define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
|
||||
#define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
|
||||
#define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
|
||||
|
||||
#define V2M_BASE 0x80000000
|
||||
|
||||
/*
|
||||
* Physical addresses, offset from V2M_PA_CS0-3
|
||||
*/
|
||||
#define V2M_NOR0 (V2M_PA_CS0)
|
||||
#define V2M_NOR1 (V2M_PA_CS4)
|
||||
#define V2M_SRAM (V2M_PA_CS1)
|
||||
|
||||
/* Common peripherals relative to CS7. */
|
||||
#define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
|
||||
#define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
|
||||
#define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
|
||||
#define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
|
||||
|
||||
#define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
|
||||
#define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
|
||||
#define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
|
||||
#define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
|
||||
|
||||
#define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
|
||||
|
||||
#define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
|
||||
#define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
|
||||
|
||||
#define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
|
||||
#define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
|
||||
|
||||
#define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
|
||||
|
||||
#define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
|
||||
|
||||
/* System register offsets. */
|
||||
#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
|
||||
#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
|
||||
#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
|
||||
|
||||
/* Generic Timer Definitions */
|
||||
#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
|
||||
|
||||
/* Generic Interrupt Controller Definitions */
|
||||
#define GICD_BASE (0x2C001000)
|
||||
#define GICC_BASE (0x2C002000)
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START V2M_BASE
|
||||
#define CONFIG_SYS_MEMTEST_END (V2M_BASE + 0x80000000)
|
||||
|
||||
/* Size of malloc() pool */
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
|
||||
|
||||
/* SMSC9115 Ethernet from SMSC9118 family */
|
||||
#define CONFIG_SMC9111 1
|
||||
#define CONFIG_SMC9111_BASE (0x1a000000)
|
||||
|
||||
/* PL011 Serial Configuration */
|
||||
#define CONFIG_PL011_SERIAL
|
||||
#define CONFIG_PL011_CLOCK 24000000
|
||||
#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
|
||||
(void *)CONFIG_SYS_SERIAL1}
|
||||
#define CONFIG_CONS_INDEX 0
|
||||
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
#define CONFIG_SYS_SERIAL0 V2M_UART0
|
||||
#define CONFIG_SYS_SERIAL1 V2M_UART1
|
||||
|
||||
/* Command line configuration */
|
||||
#define CONFIG_MENU
|
||||
/*#define CONFIG_MENU_SHOW*/
|
||||
#define CONFIG_CMD_CACHE
|
||||
#define CONFIG_CMD_BDI
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_PXE
|
||||
#define CONFIG_CMD_ENV
|
||||
#define CONFIG_CMD_FLASH
|
||||
#define CONFIG_CMD_IMI
|
||||
#define CONFIG_CMD_MEMORY
|
||||
#define CONFIG_CMD_MII
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_SAVEENV
|
||||
#define CONFIG_CMD_RUN
|
||||
#define CONFIG_CMD_BOOTD
|
||||
#define CONFIG_CMD_ECHO
|
||||
#define CONFIG_CMD_SOURCE
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
||||
/* BOOTP options */
|
||||
#define CONFIG_BOOTP_BOOTFILESIZE
|
||||
#define CONFIG_BOOTP_BOOTPATH
|
||||
#define CONFIG_BOOTP_GATEWAY
|
||||
#define CONFIG_BOOTP_HOSTNAME
|
||||
#define CONFIG_BOOTP_PXE
|
||||
#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
|
||||
|
||||
/* Miscellaneous configurable options */
|
||||
#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
|
||||
|
||||
/* Physical Memory Map */
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */
|
||||
#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2048 MB */
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
|
||||
/* Initial environment variables */
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"kernel_addr=0x200000\0" \
|
||||
"initrd_addr=0xa00000\0" \
|
||||
"initrd_size=0x2000000\0" \
|
||||
"fdt_addr=0x100000\0" \
|
||||
"fdt_high=0xa0000000\0"
|
||||
|
||||
#define CONFIG_BOOTARGS "console=ttyAMA0 root=/dev/ram0"
|
||||
#define CONFIG_BOOTCOMMAND "bootm $kernel_addr " \
|
||||
"$initrd_addr:$initrd_size $fdt_addr"
|
||||
#define CONFIG_BOOTDELAY -1
|
||||
|
||||
/* Do not preserve environment */
|
||||
#define CONFIG_ENV_IS_NOWHERE 1
|
||||
#define CONFIG_ENV_SIZE 0x1000
|
||||
|
||||
/* Monitor Command Prompt */
|
||||
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_PROMPT "VExpress64# "
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||
sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_CMDLINE_EDITING 1
|
||||
#define CONFIG_SYS_MAXARGS 64 /* max command args */
|
||||
|
||||
#endif /* __VEXPRESS_AEMV8A_H */
|
Loading…
Reference in New Issue
Block a user