mirror of
https://github.com/u-boot/u-boot.git
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rockchip: rk3568: Add support for FriendlyARM NanoPi R5S
FriendlyARM NanoPi R5S is an open-sourced mini IoT gateway device. Board Specifications - Rockchip RK3568 - 2 or 4GB LPDDR4X - 8GB or 16GB eMMC, SD card slot - GbE LAN (Native) - 2x 2.5G LAN (PCIe) - M.2 Connector - HDMI 2.0, MIPI DSI/CSI - 2xUSB 3.0 Host - USB Type C PD, 5V/9V/12V - GPIO: 12-pin 0.5mm FPC connector The device tree is taken from kernel v6.4-rc1. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Tianling Shen <cnsztl@gmail.com>
This commit is contained in:
parent
9bd954ab8a
commit
0ef326b5e9
@ -171,6 +171,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
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rk3566-anbernic-rgxx3.dtb \
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rk3566-radxa-cm3-io.dtb \
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rk3568-evb.dtb \
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rk3568-nanopi-r5s.dtb \
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rk3568-rock-3a.dtb
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dtb-$(CONFIG_ROCKCHIP_RK3588) += \
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31
arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
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31
arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
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@ -0,0 +1,31 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
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* (http://www.friendlyelec.com)
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*
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* Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
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*/
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#include "rk356x-u-boot.dtsi"
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/ {
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chosen {
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stdout-path = &uart2;
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u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
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};
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};
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&sdhci {
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cap-mmc-highspeed;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
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};
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&uart2 {
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clock-frequency = <24000000>;
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bootph-all;
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status = "okay";
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};
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arch/arm/dts/rk3568-nanopi-r5s.dts
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136
arch/arm/dts/rk3568-nanopi-r5s.dts
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@ -0,0 +1,136 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
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* (http://www.friendlyelec.com)
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*
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* Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
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*/
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/dts-v1/;
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#include "rk3568-nanopi-r5s.dtsi"
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/ {
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model = "FriendlyElec NanoPi R5S";
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compatible = "friendlyarm,nanopi-r5s", "rockchip,rk3568";
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aliases {
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ethernet0 = &gmac0;
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&power_led_pin>, <&wan_led_pin>;
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led-lan1 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <1>;
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gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
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};
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led-lan2 {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <2>;
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gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>;
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};
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power_led: led-power {
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_POWER;
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linux,default-trigger = "heartbeat";
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gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
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};
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led-wan {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WAN;
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gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&gmac0 {
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assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
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assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
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assigned-clock-rates = <0>, <125000000>;
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clock_in_out = "output";
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phy-handle = <&rgmii_phy0>;
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phy-mode = "rgmii";
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pinctrl-names = "default";
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pinctrl-0 = <&gmac0_miim
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&gmac0_tx_bus2
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&gmac0_rx_bus2
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&gmac0_rgmii_clk
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&gmac0_rgmii_bus>;
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snps,reset-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 15ms, 50ms for rtl8211f */
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snps,reset-delays-us = <0 15000 50000>;
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tx_delay = <0x3c>;
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rx_delay = <0x2f>;
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status = "okay";
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};
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&mdio0 {
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rgmii_phy0: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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pinctrl-0 = <ð_phy0_reset_pin>;
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pinctrl-names = "default";
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};
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};
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&pcie2x1 {
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num-lanes = <1>;
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reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&pcie30phy {
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data-lanes = <1 2>;
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status = "okay";
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};
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&pcie3x1 {
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num-lanes = <1>;
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reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc3v3_pcie>;
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status = "okay";
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};
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&pcie3x2 {
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num-lanes = <1>;
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num-ib-windows = <8>;
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num-ob-windows = <8>;
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reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc3v3_pcie>;
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status = "okay";
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};
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&pinctrl {
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gmac0 {
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eth_phy0_reset_pin: eth-phy0-reset-pin {
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rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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gpio-leds {
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lan1_led_pin: lan1-led-pin {
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rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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lan2_led_pin: lan2-led-pin {
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rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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power_led_pin: power-led-pin {
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rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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wan_led_pin: wan-led-pin {
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rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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arch/arm/dts/rk3568-nanopi-r5s.dtsi
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590
arch/arm/dts/rk3568-nanopi-r5s.dtsi
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@ -0,0 +1,590 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
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* (http://www.friendlyelec.com)
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*
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* Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/soc/rockchip,vop2.h>
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#include "rk3568.dtsi"
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/ {
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aliases {
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mmc0 = &sdmmc0;
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mmc1 = &sdhci;
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};
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chosen: chosen {
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stdout-path = "serial2:1500000n8";
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};
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hdmi-con {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_in: endpoint {
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remote-endpoint = <&hdmi_out_con>;
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};
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};
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};
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vdd_usbc: vdd-usbc-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vdd_usbc";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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vcc3v3_sys: vcc3v3-sys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vdd_usbc>;
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};
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vcc5v0_sys: vcc5v0-sys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vdd_usbc>;
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};
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vcc3v3_pcie: vcc3v3-pcie-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <200000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc5v0_usb: vcc5v0-usb-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_usb";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vdd_usbc>;
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};
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vcc5v0_usb_host: vcc5v0-usb-host-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_usb_host_en>;
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regulator-name = "vcc5v0_usb_host";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v0_usb>;
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};
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vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_usb_otg_en>;
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regulator-name = "vcc5v0_usb_otg";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v0_usb>;
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};
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pcie30_avdd0v9: pcie30-avdd0v9-regulator {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd0v9";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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vin-supply = <&vcc3v3_sys>;
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};
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pcie30_avdd1v8: pcie30-avdd1v8-regulator {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc3v3_sys>;
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};
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};
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&combphy0 {
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status = "okay";
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};
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&combphy1 {
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status = "okay";
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};
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&combphy2 {
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&vdd_cpu>;
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};
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&cpu1 {
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cpu-supply = <&vdd_cpu>;
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};
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&cpu2 {
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cpu-supply = <&vdd_cpu>;
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};
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&cpu3 {
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cpu-supply = <&vdd_cpu>;
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};
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&gpu {
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mali-supply = <&vdd_gpu>;
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status = "okay";
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};
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&hdmi {
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avdd-0v9-supply = <&vdda0v9_image>;
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avdd-1v8-supply = <&vcca1v8_image>;
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status = "okay";
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};
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&hdmi_in {
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hdmi_in_vp0: endpoint {
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remote-endpoint = <&vp0_out_hdmi>;
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};
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};
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&hdmi_out {
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hdmi_out_con: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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&hdmi_sound {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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vdd_cpu: regulator@1c {
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compatible = "tcs,tcs4525";
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reg = <0x1c>;
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fcs,suspend-voltage-selector = <1>;
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regulator-name = "vdd_cpu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1150000>;
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regulator-ramp-delay = <2300>;
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vin-supply = <&vcc5v0_sys>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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rk809: pmic@20 {
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compatible = "rockchip,rk809";
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reg = <0x20>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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#clock-cells = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int>;
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rockchip,system-power-controller;
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vcc1-supply = <&vcc3v3_sys>;
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vcc2-supply = <&vcc3v3_sys>;
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vcc3-supply = <&vcc3v3_sys>;
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vcc4-supply = <&vcc3v3_sys>;
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vcc5-supply = <&vcc3v3_sys>;
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vcc6-supply = <&vcc3v3_sys>;
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vcc7-supply = <&vcc3v3_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc3v3_sys>;
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wakeup-source;
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regulators {
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vdd_logic: DCDC_REG1 {
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regulator-name = "vdd_logic";
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regulator-always-on;
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regulator-boot-on;
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regulator-init-microvolt = <900000>;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_gpu: DCDC_REG2 {
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regulator-name = "vdd_gpu";
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regulator-always-on;
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regulator-init-microvolt = <900000>;
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regulator-initial-mode = <0x2>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-name = "vcc_ddr";
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vdd_npu: DCDC_REG4 {
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regulator-name = "vdd_npu";
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: DCDC_REG5 {
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda0v9_image: LDO_REG1 {
|
||||
regulator-name = "vdda0v9_image";
|
||||
regulator-min-microvolt = <950000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda_0v9: LDO_REG2 {
|
||||
regulator-name = "vdda_0v9";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda0v9_pmu: LDO_REG3 {
|
||||
regulator-name = "vdda0v9_pmu";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <900000>;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_acodec: LDO_REG4 {
|
||||
regulator-name = "vccio_acodec";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_sd: LDO_REG5 {
|
||||
regulator-name = "vccio_sd";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_pmu: LDO_REG6 {
|
||||
regulator-name = "vcc3v3_pmu";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca_1v8: LDO_REG7 {
|
||||
regulator-name = "vcca_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_pmu: LDO_REG8 {
|
||||
regulator-name = "vcca1v8_pmu";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_image: LDO_REG9 {
|
||||
regulator-name = "vcca1v8_image";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3: SWITCH_REG1 {
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_sd: SWITCH_REG2 {
|
||||
regulator-name = "vcc3v3_sd";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
|
||||
hym8563: rtc@51 {
|
||||
compatible = "haoyu,hym8563";
|
||||
reg = <0x51>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "rtcic_32kout";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hym8563_int>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
&i2s0_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie30phy {
|
||||
data-lanes = <1 2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
hym8563 {
|
||||
hym8563_int: hym8563-int {
|
||||
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
pmic_int: pmic-int {
|
||||
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
vcc5v0_usb_host_en: vcc5v0-usb-host-en {
|
||||
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
vcc5v0_usb_otg_en: vcc5v0-usb-otg-en {
|
||||
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
pmuio1-supply = <&vcc3v3_pmu>;
|
||||
pmuio2-supply = <&vcc3v3_pmu>;
|
||||
vccio1-supply = <&vccio_acodec>;
|
||||
vccio3-supply = <&vccio_sd>;
|
||||
vccio4-supply = <&vcc_1v8>;
|
||||
vccio5-supply = <&vcc_3v3>;
|
||||
vccio6-supply = <&vcc_1v8>;
|
||||
vccio7-supply = <&vcc_3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
vref-supply = <&vcca_1v8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
bus-width = <8>;
|
||||
max-frequency = <200000000>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc0 {
|
||||
max-frequency = <150000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
vmmc-supply = <&vcc3v3_sd>;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
rockchip,hw-tshut-mode = <1>;
|
||||
rockchip,hw-tshut-polarity = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_xhci {
|
||||
extcon = <&usb2phy0>;
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_xhci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy0_host {
|
||||
phy-supply = <&vcc5v0_usb_host>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy0_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy1_host {
|
||||
phy-supply = <&vcc5v0_usb_otg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy1_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vop {
|
||||
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vop_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vp0 {
|
||||
vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||||
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||||
remote-endpoint = <&hdmi_in_vp0>;
|
||||
};
|
||||
};
|
@ -7,6 +7,14 @@ F: configs/evb-rk3568_defconfig
|
||||
F: arch/arm/dts/rk3568-evb-boot.dtsi
|
||||
F: arch/arm/dts/rk3568-evb.dts
|
||||
|
||||
NANOPI-R5S
|
||||
M: Tianling Shen <cnsztl@gmail.com>
|
||||
S: Maintained
|
||||
F: configs/nanopi-r5s-rk3568_defconfig
|
||||
F: arch/arm/dts/rk3568-nanopi-r5s.dts
|
||||
F: arch/arm/dts/rk3568-nanopi-r5s.dtsi
|
||||
F: arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
|
||||
|
||||
RADXA-CM3
|
||||
M: Jagan Teki <jagan@amarulasolutions.com>
|
||||
S: Maintained
|
||||
|
85
configs/nanopi-r5s-rk3568_defconfig
Normal file
85
configs/nanopi-r5s-rk3568_defconfig
Normal file
@ -0,0 +1,85 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_SKIP_LOWLEVEL_INIT=y
|
||||
CONFIG_COUNTER_FREQUENCY=24000000
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_TEXT_BASE=0x00a00000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5s"
|
||||
CONFIG_ROCKCHIP_RK3568=y
|
||||
CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
|
||||
CONFIG_SPL_SERIAL=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x600000
|
||||
CONFIG_TARGET_EVB_RK3568=y
|
||||
CONFIG_SPL_STACK=0x400000
|
||||
CONFIG_DEBUG_UART_BASE=0xFE660000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_SYS_LOAD_ADDR=0xc00800
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-nanopi-r5s.dtb"
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
CONFIG_SPL_MAX_SIZE=0x40000
|
||||
CONFIG_SPL_PAD_TO=0x7f8000
|
||||
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
||||
CONFIG_SPL_BSS_START_ADDR=0x4000000
|
||||
CONFIG_SPL_BSS_MAX_SIZE=0x4000
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_ATF=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_PMIC=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
# CONFIG_SPL_DOS_PARTITION is not set
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
CONFIG_SPL_DM_WARN=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_SUPPORT_EMMC_RPMB=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||||
CONFIG_ETH_DESIGNWARE=y
|
||||
CONFIG_GMAC_ROCKCHIP=y
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_RK8XX=y
|
||||
CONFIG_SPL_DM_REGULATOR_FIXED=y
|
||||
CONFIG_REGULATOR_RK8XX=y
|
||||
CONFIG_PWM_ROCKCHIP=y
|
||||
CONFIG_SPL_RAM=y
|
||||
CONFIG_BAUDRATE=1500000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_SYS_NS16550_MEM32=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_SYSRESET_PSCI=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_GENERIC=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_GENERIC=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_ERRNO_STR=y
|
Loading…
Reference in New Issue
Block a user