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avr32: add support for EarthLCD Favr-32 board

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This patch adds support for the Favr-32 board made by EarthLCD.

This kit, which is also called ezLCD-101 when running with EarthLCD firmware,
has a 10.4" touch screen LCD panel, 16 MB 32-bit SDRAM, 8 MB parallel flash,
Ethernet, audio out, USB device, SD-card slot, USART and various other
connectors for cennecting stuff to SPI, I2C, GPIO, etc.

Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This commit is contained in:
Hans-Christian Egtvedt 2008-08-06 14:42:13 +02:00 committed by Haavard Skinnemoen
parent 81091f58f0
commit 0eb5717a85
9 changed files with 652 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
MAINTAINERS
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@ -709,6 +709,10 @@ Haavard Skinnemoen <hskinnemoen@atmel.com>
ATSTK1006 AT32AP7000
ATNGW100 AT32AP7000
Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
FAVR-32-EZKIT AT32AP7000
#########################################################################
# SuperH Systems: #
# #

1
MAKEALL
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@ -714,6 +714,7 @@ LIST_avr32=" \
atstk1004 \
atstk1006 \
atngw100 \
favr-32-ezkit \
"
#########################################################################

3
Makefile
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@ -2911,6 +2911,9 @@ atstk1004_config : unconfig
atstk1006_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
favr-32-ezkit_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap favr-32-ezkit earthlcd at32ap700x
#========================================================================
# SH3 (SuperH)
#========================================================================

42
board/earthlcd/favr-32-ezkit/Makefile Normal file
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@ -0,0 +1,42 @@
#
# (C) Copyright 2001-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# Copyright (C) 2008 Atmel Corporation
#
# See file CREDITS for list of people who contributed to this project.
#
# This program is free software; you can redistribute it and/or modify it under
# the terms of the GNU General Public License as published by the Free Software
# Foundation; either version 2 of the License, or (at your option) any later
# version.
#
# This program is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
# details.
#
# You should have received a copy of the GNU General Public License along with
# this program; if not, write to the Free Software Foundation, Inc., 59 Temple
# Place, Suite 330, Boston, MA 02111-1307 USA
include $(TOPDIR)/config.mk
LIB := $(obj)lib$(BOARD).a
COBJS := $(BOARD).o flash.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
$(LIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

4
board/earthlcd/favr-32-ezkit/config.mk Normal file
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@ -0,0 +1,4 @@
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
PLATFORM_LDFLAGS += --gc-sections
TEXT_BASE = 0x00000000
LDSCRIPT = $(obj)board/earthlcd/favr-32-ezkit/u-boot.lds

96
board/earthlcd/favr-32-ezkit/favr-32-ezkit.c Normal file
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@ -0,0 +1,96 @@
/*
* Copyright (C) 2008 Atmel Corporation
*
* See file CREDITS for list of people who contributed to this project.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
* Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/sdram.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <asm/arch/hmatrix.h>
DECLARE_GLOBAL_DATA_PTR;
static const struct sdram_config sdram_config = {
/* MT48LC4M32B2P-6 (16 MB) */
.data_bits = SDRAM_DATA_32BIT,
.row_bits = 12,
.col_bits = 8,
.bank_bits = 2,
.cas = 3,
.twr = 2,
.trc = 7,
.trp = 2,
.trcd = 2,
.tras = 5,
.txsr = 5,
/* 15.6 us */
.refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
};
int board_early_init_f(void)
{
/* Enable SDRAM in the EBI mux */
hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
gpio_enable_ebi();
gpio_enable_usart3();
#if defined(CONFIG_MACB)
gpio_enable_macb0();
#endif
#if defined(CONFIG_MMC)
gpio_enable_mmci();
#endif
return 0;
}
phys_size_t initdram(int board_type)
{
unsigned long expected_size;
unsigned long actual_size;
void *sdram_base;
sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
expected_size = sdram_init(sdram_base, &sdram_config);
actual_size = get_ram_size(sdram_base, expected_size);
unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
if (expected_size != actual_size)
printf("Warning: Only %u of %u MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);
return actual_size;
}
void board_init_info(void)
{
gd->bd->bi_phy_id[0] = 0x01;
}
#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET)
extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
int board_eth_init(bd_t *bi)
{
return macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
}
#endif

230
board/earthlcd/favr-32-ezkit/flash.c Normal file
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@ -0,0 +1,230 @@
/*
* Copyright (C) 2008 Atmel Corporation
*
* See file CREDITS for list of people who contributed to this project.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
* Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <common.h>
#ifdef CONFIG_FAVR32_EZKIT_EXT_FLASH
#include <asm/cacheflush.h>
#include <asm/io.h>
#include <asm/sections.h>
DECLARE_GLOBAL_DATA_PTR;
flash_info_t flash_info[1];
static void flash_identify(uint16_t *flash, flash_info_t *info)
{
unsigned long flags;
flags = disable_interrupts();
dcache_flush_unlocked();
writew(0xaa, flash + 0x555);
writew(0x55, flash + 0xaaa);
writew(0x90, flash + 0x555);
info->flash_id = readl(flash);
writew(0xff, flash);
readw(flash);
if (flags)
enable_interrupts();
}
unsigned long flash_init(void)
{
unsigned long addr;
unsigned int i;
flash_info[0].size = CFG_FLASH_SIZE;
flash_info[0].sector_count = 135;
flash_identify(uncached((void *)CFG_FLASH_BASE), &flash_info[0]);
for (i = 0, addr = 0; i < 8; i++, addr += 0x2000)
flash_info[0].start[i] = addr;
for (; i < flash_info[0].sector_count; i++, addr += 0x10000)
flash_info[0].start[i] = addr;
return CFG_FLASH_SIZE;
}
void flash_print_info(flash_info_t *info)
{
printf("Flash: Vendor ID: 0x%02x, Product ID: 0x%02x\n",
info->flash_id >> 16, info->flash_id & 0xffff);
printf("Size: %ld MB in %d sectors\n",
info->size >> 10, info->sector_count);
}
int flash_erase(flash_info_t *info, int s_first, int s_last)
{
unsigned long flags;
unsigned long start_time;
uint16_t *fb, *sb;
unsigned int i;
int ret;
uint16_t status;
if ((s_first < 0) || (s_first > s_last)
|| (s_last >= info->sector_count)) {
puts("Error: first and/or last sector out of range\n");
return ERR_INVAL;
}
for (i = s_first; i < s_last; i++)
if (info->protect[i]) {
printf("Error: sector %d is protected\n", i);
return ERR_PROTECTED;
}
fb = (uint16_t *)uncached(info->start[0]);
dcache_flush_unlocked();
for (i = s_first; (i <= s_last) && !ctrlc(); i++) {
printf("Erasing sector %3d...", i);
sb = (uint16_t *)uncached(info->start[i]);
flags = disable_interrupts();
start_time = get_timer(0);
/* Unlock sector */
writew(0xaa, fb + 0x555);
writew(0x70, sb);
/* Erase sector */
writew(0xaa, fb + 0x555);
writew(0x55, fb + 0xaaa);
writew(0x80, fb + 0x555);
writew(0xaa, fb + 0x555);
writew(0x55, fb + 0xaaa);
writew(0x30, sb);
/* Wait for completion */
ret = ERR_OK;
do {
/* TODO: Timeout */
status = readw(sb);
} while ((status != 0xffff) && !(status & 0x28));
writew(0xf0, fb);
/*
* Make sure the command actually makes it to the bus
* before we re-enable interrupts.
*/
readw(fb);
if (flags)
enable_interrupts();
if (status != 0xffff) {
printf("Flash erase error at address 0x%p: 0x%02x\n",
sb, status);
ret = ERR_PROG_ERROR;
break;
}
}
if (ctrlc())
printf("User interrupt!\n");
return ERR_OK;
}
int write_buff(flash_info_t *info, uchar *src,
ulong addr, ulong count)
{
unsigned long flags;
uint16_t *base, *p, *s, *end;
uint16_t word, status, status1;
int ret = ERR_OK;
if (addr < info->start[0]
|| (addr + count) > (info->start[0] + info->size)
|| (addr + count) < addr) {
puts("Error: invalid address range\n");
return ERR_INVAL;
}
if (addr & 1 || count & 1 || (unsigned int)src & 1) {
puts("Error: misaligned source, destination or count\n");
return ERR_ALIGN;
}
base = (uint16_t *)uncached(info->start[0]);
end = (uint16_t *)uncached(addr + count);
flags = disable_interrupts();
dcache_flush_unlocked();
sync_write_buffer();
for (p = (uint16_t *)uncached(addr), s = (uint16_t *)src;
p < end && !ctrlc(); p++, s++) {
word = *s;
writew(0xaa, base + 0x555);
writew(0x55, base + 0xaaa);
writew(0xa0, base + 0x555);
writew(word, p);
sync_write_buffer();
/* Wait for completion */
status1 = readw(p);
do {
/* TODO: Timeout */
status = status1;
status1 = readw(p);
} while (((status ^ status1) & 0x40) /* toggled */
&& !(status1 & 0x28)); /* error bits */
/*
* We'll need to check once again for toggle bit
* because the toggle bit may stop toggling as I/O5
* changes to "1" (ref at49bv642.pdf p9)
*/
status1 = readw(p);
status = readw(p);
if ((status ^ status1) & 0x40) {
printf("Flash write error at address 0x%p: "
"0x%02x != 0x%02x\n",
p, status,word);
ret = ERR_PROG_ERROR;
writew(0xf0, base);
readw(base);
break;
}
writew(0xf0, base);
readw(base);
}
if (flags)
enable_interrupts();
return ret;
}
#endif /* CONFIG_FAVR32_EZKIT_EXT_FLASH */

71
board/earthlcd/favr-32-ezkit/u-boot.lds Normal file
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@ -0,0 +1,71 @@
/* -*- Fundamental -*-
*
* Copyright (C) 2008 Atmel Corporation
*
* See file CREDITS for list of people who contributed to this project.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
* Place, Suite 330, Boston, MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
OUTPUT_ARCH(avr32)
ENTRY(_start)
SECTIONS
{
. = 0;
_text = .;
.text : {
*(.exception.text)
*(.text)
*(.text.*)
}
_etext = .;
.rodata : {
*(.rodata)
*(.rodata.*)
}
. = ALIGN(8);
_data = .;
.data : {
*(.data)
*(.data.*)
}
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : {
KEEP(*(.u_boot_cmd))
}
__u_boot_cmd_end = .;
. = ALIGN(4);
_got = .;
.got : {
*(.got)
}
_egot = .;
. = ALIGN(8);
_edata = .;
.bss (NOLOAD) : {
*(.bss)
*(.bss.*)
}
. = ALIGN(8);
_end = .;
}

201
include/configs/favr-32-ezkit.h Normal file
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@ -0,0 +1,201 @@
/*
* Copyright (C) 2008 Atmel Corporation
*
* Configuration settings for the Favr-32 EarthLCD LCD kit.
*
* See file CREDITS for list of people who contributed to this project.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
* Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <asm/arch/memory-map.h>
#define CONFIG_AVR32 1
#define CONFIG_AT32AP 1
#define CONFIG_AT32AP7000 1
#define CONFIG_FAVR32_EZKIT 1
#define CONFIG_FAVR32_EZKIT_EXT_FLASH 1
/*
* Timer clock frequency. We're using the CPU-internal COUNT register
* for this, so this is equivalent to the CPU core clock frequency
*/
#define CFG_HZ 1000
/*
* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
* frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
* PLL frequency.
* (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz
*/
#define CONFIG_PLL 1
#define CFG_POWER_MANAGER 1
#define CFG_OSC0_HZ 20000000
#define CFG_PLL0_DIV 1
#define CFG_PLL0_MUL 7
#define CFG_PLL0_SUPPRESS_CYCLES 16
/*
* Set the CPU running at:
* PLL / (2^CFG_CLKDIV_CPU) = CPU MHz
*/
#define CFG_CLKDIV_CPU 0
/*
* Set the HSB running at:
* PLL / (2^CFG_CLKDIV_HSB) = HSB MHz
*/
#define CFG_CLKDIV_HSB 1
/*
* Set the PBA running at:
* PLL / (2^CFG_CLKDIV_PBA) = PBA MHz
*/
#define CFG_CLKDIV_PBA 2
/*
* Set the PBB running at:
* PLL / (2^CFG_CLKDIV_PBB) = PBB MHz
*/
#define CFG_CLKDIV_PBB 1
/*
* The PLLOPT register controls the PLL like this:
* icp = PLLOPT<2>
* ivco = PLLOPT<1:0>
*
* We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
*/
#define CFG_PLL0_OPT 0x04
#undef CONFIG_USART0
#undef CONFIG_USART1
#undef CONFIG_USART2
#define CONFIG_USART3 1
/* User serviceable stuff */
#define CONFIG_DOS_PARTITION 1
#define CONFIG_CMDLINE_TAG 1
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
#define CONFIG_STACKSIZE (2048)
#define CONFIG_BAUDRATE 115200
#define CONFIG_BOOTARGS \
"root=/dev/mtdblock1 rootfstype=jffs fbmem=1800k"
#define CONFIG_BOOTCOMMAND \
"fsload; bootm $(fileaddr)"
/*
* Only interrupt autoboot if <space> is pressed. Otherwise, garbage
* data on the serial line may interrupt the boot sequence.
*/
#define CONFIG_BOOTDELAY 1
#define CONFIG_AUTOBOOT 1
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n"
#define CONFIG_AUTOBOOT_DELAY_STR "d"
#define CONFIG_AUTOBOOT_STOP_STR " "
/*
* After booting the board for the first time, new ethernet addresses
* should be generated and assigned to the environment variables
* "ethaddr" and "eth1addr". This is normally done during production.
*/
#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
#define CONFIG_NET_MULTI 1
/*
* BOOTP options
*/
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MMC
#undef CONFIG_CMD_AUTOSCRIPT
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR
#undef CONFIG_CMD_XIMG
#define CONFIG_ATMEL_USART 1
#define CONFIG_MACB 1
#define CONFIG_PIO2 1
#define CFG_NR_PIOS 5
#define CFG_HSDRAMC 1
#define CONFIG_MMC 1
#define CONFIG_ATMEL_MCI 1
#define CFG_DCACHE_LINESZ 32
#define CFG_ICACHE_LINESZ 32
#define CONFIG_NR_DRAM_BANKS 1
/* External flash on Favr-32 */
#if 0
#define CFG_FLASH_CFI 1
#define CFG_FLASH_CFI_DRIVER 1
#endif
#define CFG_FLASH_BASE 0x00000000
#define CFG_FLASH_SIZE 0x800000
#define CFG_MAX_FLASH_BANKS 1
#define CFG_MAX_FLASH_SECT 135
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_INTRAM_BASE INTERNAL_SRAM_BASE
#define CFG_INTRAM_SIZE INTERNAL_SRAM_SIZE
#define CFG_SDRAM_BASE EBI_SDRAM_BASE
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_SIZE 65536
#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE)
#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE)
#define CFG_MALLOC_LEN (256*1024)
#define CFG_DMA_ALLOC_LEN (16384)
/* Allow 4MB for the kernel run-time image */
#define CFG_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
#define CFG_BOOTPARAMS_LEN (16 * 1024)
/* Other configuration settings that shouldn't have to change all that often */
#define CFG_PROMPT "U-Boot> "
#define CFG_CBSIZE 256
#define CFG_MAXARGS 16
#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
#define CFG_LONGHELP 1
#define CFG_MEMTEST_START EBI_SDRAM_BASE
#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x700000)
#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
#endif /* __CONFIG_H */