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ddr: fsl: incorrect logical constraint in populate_memctl_options

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(pdimm[0].data_width >= 32) || (pdimm[0].data_width <= 40)
is always true.

We should use && here.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
xypron.glpk@gmx.de 2017-04-15 15:23:49 +02:00 committed by Tom Rini
parent ea1e3f96c3
commit 0e0de24b07
1 changed files with 1 additions and 1 deletions
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2
drivers/ddr/fsl/options.c
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@ -916,7 +916,7 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm,
if ((pdimm[0].data_width >= 64) && \
(pdimm[0].data_width <= 72))
popts->data_bus_width = 0;
else if ((pdimm[0].data_width >= 32) || \
else if ((pdimm[0].data_width >= 32) && \
(pdimm[0].data_width <= 40))
popts->data_bus_width = 1;
else {