mirrors/u-boot
0
0
Fork 0
mirror of https://github.com/u-boot/u-boot.git synced 2024-11-24 12:44:23 +08:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'master' of git://git.denx.de/u-boot-video

Browse Source 
Conflicts:
	include/splash.h

Signed-off-by: Tom Rini <trini@ti.com>
This commit is contained in:
Tom Rini 2015-02-10 10:41:54 -05:00
commit 0dac731d19
17 changed files with 575 additions and 546 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
board/raspberrypi/rpi/rpi.c
View File

@ -18,6 +18,7 @@
#include <config.h>
#include <dm.h>
#include <fdt_support.h>
#include <fdt_simplefb.h>
#include <lcd.h>
#include <mmc.h>
#include <asm/gpio.h>

1
common/Makefile
View File

@ -200,6 +200,7 @@ obj-$(CONFIG_KALLSYMS) += kallsyms.o
obj-y += splash.o
obj-$(CONFIG_SPLASH_SOURCE) += splash_source.o
obj-$(CONFIG_LCD) += lcd.o lcd_console.o
obj-$(CONFIG_LCD_DT_SIMPLEFB) += lcd_simplefb.o
obj-$(CONFIG_LYNXKDI) += lynxkdi.o
obj-$(CONFIG_MENU) += menu.o
obj-$(CONFIG_MODEM_SUPPORT) += modem.o

358
common/lcd.c
View File

@ -1,5 +1,5 @@
/*
* Common LCD routines for supported CPUs
* Common LCD routines
*
* (C) Copyright 2001-2002
* Wolfgang Denk, DENX Software Engineering -- wd@denx.de
@ -7,62 +7,27 @@
* SPDX-License-Identifier: GPL-2.0+
*/
/************************************************************************/
/* ** HEADER FILES */
/************************************************************************/
/* #define DEBUG */
#include <config.h>
#include <common.h>
#include <command.h>
#include <stdarg.h>
#include <search.h>
#include <env_callback.h>
#include <linux/types.h>
#include <stdio_dev.h>
#if defined(CONFIG_POST)
#include <post.h>
#endif
#include <lcd.h>
#include <watchdog.h>
#include <asm/unaligned.h>
#include <splash.h>
#include <asm/io.h>
#include <asm/unaligned.h>
#include <fdt_support.h>
#include <video_font.h>
#if defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
defined(CONFIG_CPU_MONAHANS)
#include <asm/byteorder.h>
#endif
#if defined(CONFIG_MPC823)
#include <lcdvideo.h>
#endif
#if defined(CONFIG_ATMEL_LCD)
#include <atmel_lcdc.h>
#endif
#if defined(CONFIG_LCD_DT_SIMPLEFB)
#include <libfdt.h>
#endif
/************************************************************************/
/* ** FONT DATA */
/************************************************************************/
#include <video_font.h> /* Get font data, width and height */
/************************************************************************/
/* ** LOGO DATA */
/************************************************************************/
#ifdef CONFIG_LCD_LOGO
# include <bmp_logo.h> /* Get logo data, width and height */
# include <bmp_logo_data.h>
# if (CONSOLE_COLOR_WHITE >= BMP_LOGO_OFFSET) && (LCD_BPP != LCD_COLOR16)
# error Default Color Map overlaps with Logo Color Map
# endif
#include <bmp_logo.h>
#include <bmp_logo_data.h>
#if (CONSOLE_COLOR_WHITE >= BMP_LOGO_OFFSET) && (LCD_BPP != LCD_COLOR16)
#error Default Color Map overlaps with Logo Color Map
#endif
#endif
#ifdef CONFIG_SANDBOX
@ -75,30 +40,23 @@
#if (LCD_BPP != LCD_COLOR8) && (LCD_BPP != LCD_COLOR16) && \
(LCD_BPP != LCD_COLOR32)
# error Unsupported LCD BPP.
#error Unsupported LCD BPP.
#endif
DECLARE_GLOBAL_DATA_PTR;
static int lcd_init(void *lcdbase);
static void *lcd_logo(void);
static void lcd_logo(void);
static void lcd_setfgcolor(int color);
static void lcd_setbgcolor(int color);
static int lcd_color_fg;
static int lcd_color_bg;
int lcd_line_length;
char lcd_is_enabled = 0;
static void *lcd_base; /* Start of framebuffer memory */
static char lcd_flush_dcache; /* 1 to flush dcache after each lcd update */
/************************************************************************/
/* Flush LCD activity to the caches */
void lcd_sync(void)
{
@ -128,8 +86,6 @@ void lcd_set_flush_dcache(int flush)
lcd_flush_dcache = (flush != 0);
}
/*----------------------------------------------------------------------*/
static void lcd_stub_putc(struct stdio_dev *dev, const char c)
{
lcd_putc(c);
@ -140,9 +96,7 @@ static void lcd_stub_puts(struct stdio_dev *dev, const char *s)
lcd_puts(s);
}
/************************************************************************/
/** Small utility to check that you got the colours right */
/************************************************************************/
/* Small utility to check that you got the colours right */
#ifdef LCD_TEST_PATTERN
#define N_BLK_VERT 2
@ -176,10 +130,6 @@ static void test_pattern(void)
}
#endif /* LCD_TEST_PATTERN */
/************************************************************************/
/* ** GENERIC Initialization Routines */
/************************************************************************/
/*
* With most lcd drivers the line length is set up
* by calculating it from panel_info parameters. Some
@ -199,7 +149,7 @@ int drv_lcd_init(void)
lcd_base = map_sysmem(gd->fb_base, 0);
lcd_init(lcd_base); /* LCD initialization */
lcd_init(lcd_base);
/* Device initialization */
memset(&lcddev, 0, sizeof(lcddev));
@ -215,11 +165,13 @@ int drv_lcd_init(void)
return (rc == 0) ? 1 : rc;
}
/*----------------------------------------------------------------------*/
void lcd_clear(void)
{
short console_rows, console_cols;
int bg_color;
char *s;
ulong addr;
static int do_splash = 1;
#if LCD_BPP == LCD_COLOR8
/* Setting the palette */
lcd_setcolreg(CONSOLE_COLOR_BLACK, 0, 0, 0);
@ -269,7 +221,23 @@ void lcd_clear(void)
#endif
console_cols = panel_info.vl_col / VIDEO_FONT_WIDTH;
lcd_init_console(lcd_base, console_rows, console_cols);
lcd_init_console(lcd_logo(), console_rows, console_cols);
if (do_splash) {
s = getenv("splashimage");
if (s) {
do_splash = 0;
addr = simple_strtoul(s, NULL, 16);
if (lcd_splash(addr) == 0) {
lcd_sync();
return;
}
}
}
lcd_logo();
#if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
addr = (ulong)lcd_base + BMP_LOGO_HEIGHT * lcd_line_length;
lcd_init_console((void *)addr, console_rows, console_cols);
#endif
lcd_sync();
}
@ -279,20 +247,11 @@ static int do_lcd_clear(cmd_tbl_t *cmdtp, int flag, int argc,
lcd_clear();
return 0;
}
U_BOOT_CMD(
cls, 1, 1, do_lcd_clear,
"clear screen",
""
);
/*----------------------------------------------------------------------*/
U_BOOT_CMD(cls, 1, 1, do_lcd_clear, "clear screen", "");
static int lcd_init(void *lcdbase)
{
/* Initialize the lcd controller */
debug("[LCD] Initializing LCD frambuffer at %p\n", lcdbase);
lcd_ctrl_init(lcdbase);
/*
@ -322,10 +281,6 @@ static int lcd_init(void *lcdbase)
return 0;
}
/************************************************************************/
/* ** ROM capable initialization part - needed to reserve FB memory */
/************************************************************************/
/*
* This is called early in the system initialization to grab memory
* for the LCD controller.
@ -356,8 +311,6 @@ ulong lcd_setmem(ulong addr)
return addr;
}
/*----------------------------------------------------------------------*/
static void lcd_setfgcolor(int color)
{
lcd_color_fg = color;
@ -368,8 +321,6 @@ int lcd_getfgcolor(void)
return lcd_color_fg;
}
/*----------------------------------------------------------------------*/
static void lcd_setbgcolor(int color)
{
lcd_color_bg = color;
@ -380,91 +331,30 @@ int lcd_getbgcolor(void)
return lcd_color_bg;
}
/************************************************************************/
/* ** Chipset depending Bitmap / Logo stuff... */
/************************************************************************/
static inline ushort *configuration_get_cmap(void)
#ifdef CONFIG_LCD_LOGO
__weak void lcd_logo_set_cmap(void)
{
#if defined CONFIG_CPU_PXA
struct pxafb_info *fbi = &panel_info.pxa;
return (ushort *)fbi->palette;
#elif defined(CONFIG_MPC823)
immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
cpm8xx_t *cp = &(immr->im_cpm);
return (ushort *)&(cp->lcd_cmap[255 * sizeof(ushort)]);
#elif defined(CONFIG_ATMEL_LCD)
return (ushort *)(panel_info.mmio + ATMEL_LCDC_LUT(0));
#elif !defined(CONFIG_ATMEL_HLCD) && !defined(CONFIG_EXYNOS_FB)
return panel_info.cmap;
#elif defined(CONFIG_LCD_LOGO)
return bmp_logo_palette;
#else
return NULL;
#endif
int i;
ushort *cmap = configuration_get_cmap();
for (i = 0; i < ARRAY_SIZE(bmp_logo_palette); ++i)
*cmap++ = bmp_logo_palette[i];
}
#ifdef CONFIG_LCD_LOGO
void bitmap_plot(int x, int y)
void lcd_logo_plot(int x, int y)
{
#ifdef CONFIG_ATMEL_LCD
uint *cmap = (uint *)bmp_logo_palette;
#else
ushort *cmap = (ushort *)bmp_logo_palette;
#endif
ushort i, j;
uchar *bmap;
uchar *fb;
ushort *fb16;
#if defined(CONFIG_MPC823)
immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
cpm8xx_t *cp = &(immr->im_cpm);
#endif
uchar *bmap = &bmp_logo_bitmap[0];
unsigned bpix = NBITS(panel_info.vl_bpix);
uchar *fb = (uchar *)(lcd_base + y * lcd_line_length + x * bpix / 8);
ushort *fb16;
debug("Logo: width %d height %d colors %d cmap %d\n",
BMP_LOGO_WIDTH, BMP_LOGO_HEIGHT, BMP_LOGO_COLORS,
ARRAY_SIZE(bmp_logo_palette));
bmap = &bmp_logo_bitmap[0];
fb = (uchar *)(lcd_base + y * lcd_line_length + x * bpix / 8);
debug("Logo: width %d height %d colors %d\n",
BMP_LOGO_WIDTH, BMP_LOGO_HEIGHT, BMP_LOGO_COLORS);
if (bpix < 12) {
/* Leave room for default color map
* default case: generic system with no cmap (most likely 16bpp)
* cmap was set to the source palette, so no change is done.
* This avoids even more ifdefs in the next stanza
*/
#if defined(CONFIG_MPC823)
cmap = (ushort *) &(cp->lcd_cmap[BMP_LOGO_OFFSET * sizeof(ushort)]);
#elif defined(CONFIG_ATMEL_LCD)
cmap = (uint *)configuration_get_cmap();
#else
cmap = configuration_get_cmap();
#endif
WATCHDOG_RESET();
/* Set color map */
for (i = 0; i < ARRAY_SIZE(bmp_logo_palette); ++i) {
ushort colreg = bmp_logo_palette[i];
#ifdef CONFIG_ATMEL_LCD
uint lut_entry;
#ifdef CONFIG_ATMEL_LCD_BGR555
lut_entry = ((colreg & 0x000F) << 11) |
((colreg & 0x00F0) << 2) |
((colreg & 0x0F00) >> 7);
#else /* CONFIG_ATMEL_LCD_RGB565 */
lut_entry = ((colreg & 0x000F) << 1) |
((colreg & 0x00F0) << 3) |
((colreg & 0x0F00) << 4);
#endif
*(cmap + BMP_LOGO_OFFSET) = lut_entry;
cmap++;
#else /* !CONFIG_ATMEL_LCD */
*cmap++ = colreg;
#endif /* CONFIG_ATMEL_LCD */
}
lcd_logo_set_cmap();
WATCHDOG_RESET();
for (i = 0; i < BMP_LOGO_HEIGHT; ++i) {
@ -493,16 +383,10 @@ void bitmap_plot(int x, int y)
lcd_sync();
}
#else
static inline void bitmap_plot(int x, int y) {}
static inline void lcd_logo_plot(int x, int y) {}
#endif /* CONFIG_LCD_LOGO */
/*----------------------------------------------------------------------*/
#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
/*
* Display the BMP file located at address bmp_image.
* Only uncompressed.
*/
#ifdef CONFIG_SPLASH_SCREEN_ALIGN
#define BMP_ALIGN_CENTER 0x7FFF
@ -523,9 +407,7 @@ static void splash_align_axis(int *axis, unsigned long panel_size,
}
#endif
#ifdef CONFIG_LCD_BMP_RLE8
#define BMP_RLE8_ESCAPE 0
#define BMP_RLE8_EOL 0
#define BMP_RLE8_EOBMP 1
@ -654,32 +536,40 @@ static void lcd_display_rle8_bitmap(bmp_image_t *bmp, ushort *cmap, uchar *fb,
}
#endif
#if defined(CONFIG_MPC823)
#define FB_PUT_BYTE(fb, from) *(fb)++ = (255 - *(from)++)
#else
#define FB_PUT_BYTE(fb, from) *(fb)++ = *(from)++
#endif
__weak void fb_put_byte(uchar **fb, uchar **from)
{
*(*fb)++ = *(*from)++;
}
#if defined(CONFIG_BMP_16BPP)
#if defined(CONFIG_ATMEL_LCD_BGR555)
static inline void fb_put_word(uchar **fb, uchar **from)
{
*(*fb)++ = (((*from)[0] & 0x1f) << 2) | ((*from)[1] & 0x03);
*(*fb)++ = ((*from)[0] & 0xe0) | (((*from)[1] & 0x7c) >> 2);
*from += 2;
}
#else
static inline void fb_put_word(uchar **fb, uchar **from)
__weak void fb_put_word(uchar **fb, uchar **from)
{
*(*fb)++ = *(*from)++;
*(*fb)++ = *(*from)++;
}
#endif
#endif /* CONFIG_BMP_16BPP */
__weak void lcd_set_cmap(bmp_image_t *bmp, unsigned colors)
{
int i;
bmp_color_table_entry_t cte;
ushort *cmap = configuration_get_cmap();
for (i = 0; i < colors; ++i) {
cte = bmp->color_table[i];
*cmap = (((cte.red) << 8) & 0xf800) |
(((cte.green) << 3) & 0x07e0) |
(((cte.blue) >> 3) & 0x001f);
#if defined(CONFIG_MPC823)
cmap--;
#else
cmap++;
#endif
}
}
int lcd_display_bitmap(ulong bmp_image, int x, int y)
{
ushort *cmap = NULL;
ushort *cmap_base = NULL;
ushort i, j;
uchar *fb;
@ -727,29 +617,8 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
debug("Display-bmp: %d x %d with %d colors\n",
(int)width, (int)height, (int)colors);
if (bmp_bpix == 8) {
cmap = configuration_get_cmap();
cmap_base = cmap;
/* Set color map */
for (i = 0; i < colors; ++i) {
bmp_color_table_entry_t cte = bmp->color_table[i];
#if !defined(CONFIG_ATMEL_LCD)
ushort colreg =
( ((cte.red) << 8) & 0xf800) |
( ((cte.green) << 3) & 0x07e0) |
( ((cte.blue) >> 3) & 0x001f) ;
*cmap = colreg;
#if defined(CONFIG_MPC823)
cmap--;
#else
cmap++;
#endif
#else /* CONFIG_ATMEL_LCD */
lcd_setcolreg(i, cte.red, cte.green, cte.blue);
#endif
}
}
if (bmp_bpix == 8)
lcd_set_cmap(bmp, colors);
padded_width = (width & 0x3 ? (width & ~0x3) + 4 : width);
@ -768,8 +637,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
(y + height - 1) * lcd_line_length + x * bpix / 8);
switch (bmp_bpix) {
case 1: /* pass through */
case 1:
case 8: {
cmap_base = configuration_get_cmap();
#ifdef CONFIG_LCD_BMP_RLE8
u32 compression = get_unaligned_le32(&bmp->header.compression);
if (compression == BMP_BI_RLE8) {
@ -792,7 +662,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
WATCHDOG_RESET();
for (j = 0; j < width; j++) {
if (bpix != 16) {
FB_PUT_BYTE(fb, bmap);
fb_put_byte(&fb, &bmap);
} else {
*(uint16_t *)fb = cmap_base[*(bmap++)];
fb += sizeof(uint16_t) / sizeof(*fb);
@ -850,42 +720,15 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
}
#endif
static void *lcd_logo(void)
static void lcd_logo(void)
{
#ifdef CONFIG_SPLASH_SCREEN
char *s;
ulong addr;
static int do_splash = 1;
if (do_splash && (s = getenv("splashimage")) != NULL) {
int x = 0, y = 0;
do_splash = 0;
if (splash_screen_prepare())
return (void *)lcd_base;
addr = simple_strtoul (s, NULL, 16);
splash_get_pos(&x, &y);
if (bmp_display(addr, x, y) == 0)
return (void *)lcd_base;
}
#endif /* CONFIG_SPLASH_SCREEN */
bitmap_plot(0, 0);
lcd_logo_plot(0, 0);
#ifdef CONFIG_LCD_INFO
lcd_set_col(LCD_INFO_X / VIDEO_FONT_WIDTH);
lcd_set_row(LCD_INFO_Y / VIDEO_FONT_HEIGHT);
lcd_show_board_info();
#endif /* CONFIG_LCD_INFO */
#if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
return (void *)((ulong)lcd_base + BMP_LOGO_HEIGHT * lcd_line_length);
#else
return (void *)lcd_base;
#endif /* CONFIG_LCD_LOGO && !defined(CONFIG_LCD_INFO_BELOW_LOGO) */
}
#ifdef CONFIG_SPLASHIMAGE_GUARD
@ -921,48 +764,3 @@ int lcd_get_pixel_height(void)
{
return panel_info.vl_row;
}
#if defined(CONFIG_LCD_DT_SIMPLEFB)
static int lcd_dt_simplefb_configure_node(void *blob, int off)
{
#if LCD_BPP == LCD_COLOR16
return fdt_setup_simplefb_node(blob, off, gd->fb_base,
panel_info.vl_col, panel_info.vl_row,
panel_info.vl_col * 2, "r5g6b5");
#else
return -1;
#endif
}
int lcd_dt_simplefb_add_node(void *blob)
{
static const char compat[] = "simple-framebuffer";
static const char disabled[] = "disabled";
int off, ret;
off = fdt_add_subnode(blob, 0, "framebuffer");
if (off < 0)
return -1;
ret = fdt_setprop(blob, off, "status", disabled, sizeof(disabled));
if (ret < 0)
return -1;
ret = fdt_setprop(blob, off, "compatible", compat, sizeof(compat));
if (ret < 0)
return -1;
return lcd_dt_simplefb_configure_node(blob, off);
}
int lcd_dt_simplefb_enable_existing_node(void *blob)
{
int off;
off = fdt_node_offset_by_compatible(blob, -1, "simple-framebuffer");
if (off < 0)
return -1;
return lcd_dt_simplefb_configure_node(blob, off);
}
#endif

59
common/lcd_simplefb.c Normal file
View File

@ -0,0 +1,59 @@
/*
* Simplefb device tree support
*
* (C) Copyright 2015
* Stephen Warren <swarren@wwwdotorg.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <lcd.h>
#include <fdt_support.h>
#include <libfdt.h>
DECLARE_GLOBAL_DATA_PTR;
static int lcd_dt_simplefb_configure_node(void *blob, int off)
{
#if LCD_BPP == LCD_COLOR16
int vl_col = lcd_get_pixel_width();
int vl_row = lcd_get_pixel_height();
return fdt_setup_simplefb_node(blob, off, gd->fb_base, vl_col, vl_row,
vl_col * 2, "r5g6b5");
#else
return -1;
#endif
}
int lcd_dt_simplefb_add_node(void *blob)
{
static const char compat[] = "simple-framebuffer";
static const char disabled[] = "disabled";
int off, ret;
off = fdt_add_subnode(blob, 0, "framebuffer");
if (off < 0)
return -1;
ret = fdt_setprop(blob, off, "status", disabled, sizeof(disabled));
if (ret < 0)
return -1;
ret = fdt_setprop(blob, off, "compatible", compat, sizeof(compat));
if (ret < 0)
return -1;
return lcd_dt_simplefb_configure_node(blob, off);
}
int lcd_dt_simplefb_enable_existing_node(void *blob)
{
int off;
off = fdt_node_offset_by_compatible(blob, -1, "simple-framebuffer");
if (off < 0)
return -1;
return lcd_dt_simplefb_configure_node(blob, off);
}

16
common/splash.c
View File

@ -22,6 +22,7 @@
#include <common.h>
#include <splash.h>
#include <lcd.h>
__weak int splash_screen_prepare(void)
{
@ -50,3 +51,18 @@ void splash_get_pos(int *x, int *y)
}
}
#endif /* CONFIG_SPLASH_SCREEN_ALIGN */
#if defined(CONFIG_SPLASH_SCREEN) && defined(CONFIG_LCD)
int lcd_splash(ulong addr)
{
int x = 0, y = 0, ret;
ret = splash_screen_prepare();
if (ret)
return ret;
splash_get_pos(&x, &y);
return bmp_display(addr, x, y);
}
#endif

13
drivers/video/atmel_hlcdfb.c
View File

@ -13,6 +13,10 @@
#include <lcd.h>
#include <atmel_hlcdc.h>
#if defined(CONFIG_LCD_LOGO)
#include <bmp_logo.h>
#endif
/* configurable parameters */
#define ATMEL_LCDC_CVAL_DEFAULT 0xc8
#define ATMEL_LCDC_DMA_BURST_LEN 8
@ -37,6 +41,15 @@ void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
panel_info.mmio + ATMEL_LCDC_LUT(regno));
}
ushort *configuration_get_cmap(void)
{
#if defined(CONFIG_LCD_LOGO)
return bmp_logo_palette;
#else
return NULL;
#endif
}
void lcd_ctrl_init(void *lcdbase)
{
unsigned long value;

51
drivers/video/atmel_lcdfb.c
View File

@ -11,6 +11,7 @@
#include <asm/arch/gpio.h>
#include <asm/arch/clk.h>
#include <lcd.h>
#include <bmp_layout.h>
#include <atmel_lcdc.h>
/* configurable parameters */
@ -29,6 +30,46 @@
#define lcdc_readl(mmio, reg) __raw_readl((mmio)+(reg))
#define lcdc_writel(mmio, reg, val) __raw_writel((val), (mmio)+(reg))
ushort *configuration_get_cmap(void)
{
return (ushort *)(panel_info.mmio + ATMEL_LCDC_LUT(0));
}
#if defined(CONFIG_BMP_16BPP) && defined(CONFIG_ATMEL_LCD_BGR555)
void fb_put_word(uchar **fb, uchar **from)
{
*(*fb)++ = (((*from)[0] & 0x1f) << 2) | ((*from)[1] & 0x03);
*(*fb)++ = ((*from)[0] & 0xe0) | (((*from)[1] & 0x7c) >> 2);
*from += 2;
}
#endif
#ifdef CONFIG_LCD_LOGO
#include <bmp_logo.h>
void lcd_logo_set_cmap(void)
{
int i;
uint lut_entry;
ushort colreg;
uint *cmap = (uint *)configuration_get_cmap();
for (i = 0; i < BMP_LOGO_COLORS; ++i) {
colreg = bmp_logo_palette[i];
#ifdef CONFIG_ATMEL_LCD_BGR555
lut_entry = ((colreg & 0x000F) << 11) |
((colreg & 0x00F0) << 2) |
((colreg & 0x0F00) >> 7);
#else
lut_entry = ((colreg & 0x000F) << 1) |
((colreg & 0x00F0) << 3) |
((colreg & 0x0F00) << 4);
#endif
*(cmap + BMP_LOGO_OFFSET) = lut_entry;
cmap++;
}
}
#endif
void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
{
#if defined(CONFIG_ATMEL_LCD_BGR555)
@ -40,6 +81,16 @@ void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
#endif
}
void lcd_set_cmap(bmp_image_t *bmp, unsigned colors)
{
int i;
for (i = 0; i < colors; ++i) {
bmp_color_table_entry_t cte = bmp->color_table[i];
lcd_setcolreg(i, cte.red, cte.green, cte.blue);
}
}
void lcd_ctrl_init(void *lcdbase)
{
unsigned long value;

9
drivers/video/exynos_fb.c
View File

@ -37,6 +37,15 @@ vidinfo_t panel_info = {
};
#endif
ushort *configuration_get_cmap(void)
{
#if defined(CONFIG_LCD_LOGO)
return bmp_logo_palette;
#else
return NULL;
#endif
}
static void exynos_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
{
unsigned long palette_size;

29
drivers/video/mpc8xx_lcd.c
View File

@ -357,6 +357,35 @@ lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue)
/*----------------------------------------------------------------------*/
ushort *configuration_get_cmap(void)
{
immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
cpm8xx_t *cp = &(immr->im_cpm);
return (ushort *)&(cp->lcd_cmap[255 * sizeof(ushort)]);
}
#if defined(CONFIG_MPC823)
void fb_put_byte(uchar **fb, uchar **from)
{
*(*fb)++ = (255 - *(*from)++);
}
#endif
#ifdef CONFIG_LCD_LOGO
#include <bmp_logo.h>
void lcd_logo_set_cmap(void)
{
int i;
ushort *cmap;
immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
cpm8xx_t *cp = &(immr->im_cpm);
cmap = (ushort *)&(cp->lcd_cmap[BMP_LOGO_OFFSET * sizeof(ushort)]);
for (i = 0; i < BMP_LOGO_COLORS; ++i)
*cmap++ = bmp_logo_palette[i];
}
#endif
void lcd_enable (void)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;

6
drivers/video/pxa_lcd.c
View File

@ -342,6 +342,12 @@ static int pxafb_init (vidinfo_t *vid);
/* --------------- PXA chipset specific functions ------------------- */
/************************************************************************/
ushort *configuration_get_cmap(void)
{
struct pxafb_info *fbi = &panel_info.pxa;
return (ushort *)fbi->palette;
}
void lcd_ctrl_init (void *lcdbase)
{
pxafb_init_mem(lcdbase, &panel_info);

38
include/atmel_lcd.h Normal file
View File

@ -0,0 +1,38 @@
/*
* atmel_lcd.h - Atmel LCD Controller structures
*
* (C) Copyright 2001
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ATMEL_LCD_H_
#define _ATMEL_LCD_H_
typedef struct vidinfo {
ushort vl_col; /* Number of columns (i.e. 640) */
ushort vl_row; /* Number of rows (i.e. 480) */
u_long vl_clk; /* pixel clock in ps */
/* LCD configuration register */
u_long vl_sync; /* Horizontal / vertical sync */
u_long vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
u_long vl_tft; /* 0 = passive, 1 = TFT */
u_long vl_cont_pol_low; /* contrast polarity is low */
u_long vl_clk_pol; /* clock polarity */
/* Horizontal control register. */
u_long vl_hsync_len; /* Length of horizontal sync */
u_long vl_left_margin; /* Time from sync to picture */
u_long vl_right_margin; /* Time from picture to sync */
/* Vertical control register. */
u_long vl_vsync_len; /* Length of vertical sync */
u_long vl_upper_margin; /* Time from sync to picture */
u_long vl_lower_margin; /* Time from picture to sync */
u_long mmio; /* Memory mapped registers */
} vidinfo_t;
#endif

81
include/exynos_lcd.h Normal file
View File

@ -0,0 +1,81 @@
/*
* exynos_lcd.h - Exynos LCD Controller structures
*
* (C) Copyright 2001
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _EXYNOS_LCD_H_
#define _EXYNOS_LCD_H_
enum {
FIMD_RGB_INTERFACE = 1,
FIMD_CPU_INTERFACE = 2,
};
enum exynos_fb_rgb_mode_t {
MODE_RGB_P = 0,
MODE_BGR_P = 1,
MODE_RGB_S = 2,
MODE_BGR_S = 3,
};
typedef struct vidinfo {
ushort vl_col; /* Number of columns (i.e. 640) */
ushort vl_row; /* Number of rows (i.e. 480) */
ushort vl_width; /* Width of display area in millimeters */
ushort vl_height; /* Height of display area in millimeters */
/* LCD configuration register */
u_char vl_freq; /* Frequency */
u_char vl_clkp; /* Clock polarity */
u_char vl_oep; /* Output Enable polarity */
u_char vl_hsp; /* Horizontal Sync polarity */
u_char vl_vsp; /* Vertical Sync polarity */
u_char vl_dp; /* Data polarity */
u_char vl_bpix; /* Bits per pixel */
/* Horizontal control register. Timing from data sheet */
u_char vl_hspw; /* Horz sync pulse width */
u_char vl_hfpd; /* Wait before of line */
u_char vl_hbpd; /* Wait end of line */
/* Vertical control register. */
u_char vl_vspw; /* Vertical sync pulse width */
u_char vl_vfpd; /* Wait before of frame */
u_char vl_vbpd; /* Wait end of frame */
u_char vl_cmd_allow_len; /* Wait end of frame */
unsigned int win_id;
unsigned int init_delay;
unsigned int power_on_delay;
unsigned int reset_delay;
unsigned int interface_mode;
unsigned int mipi_enabled;
unsigned int dp_enabled;
unsigned int cs_setup;
unsigned int wr_setup;
unsigned int wr_act;
unsigned int wr_hold;
unsigned int logo_on;
unsigned int logo_width;
unsigned int logo_height;
int logo_x_offset;
int logo_y_offset;
unsigned long logo_addr;
unsigned int rgb_mode;
unsigned int resolution;
/* parent clock name(MPLL, EPLL or VPLL) */
unsigned int pclk_name;
/* ratio value for source clock from parent clock. */
unsigned int sclk_div;
unsigned int dual_lcd_enabled;
} vidinfo_t;
void init_panel_info(vidinfo_t *vid);
#endif

14
include/fdt_simplefb.h Normal file
View File

@ -0,0 +1,14 @@
/*
* Simplefb device tree support
*
* (C) Copyright 2015
* Stephen Warren <swarren@wwwdotorg.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _FDT_SIMPLEFB_H_
#define _FDT_SIMPLEFB_H_
int lcd_dt_simplefb_add_node(void *blob);
int lcd_dt_simplefb_enable_existing_node(void *blob);
#endif

311
include/lcd.h
View File

@ -13,21 +13,19 @@
#ifndef _LCD_H_
#define _LCD_H_
#include <lcd_console.h>
#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
#include <bmp_layout.h>
#include <asm/byteorder.h>
#endif
extern char lcd_is_enabled;
extern int lcd_line_length;
extern struct vidinfo panel_info;
void lcd_ctrl_init(void *lcdbase);
void lcd_enable(void);
/* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue);
void lcd_initcolregs(void);
/* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp,
void **alloc_addr);
int bmp_display(ulong addr, int x, int y);
@ -41,227 +39,38 @@ int bmp_display(ulong addr, int x, int y);
void lcd_set_flush_dcache(int flush);
#if defined CONFIG_MPC823
/*
* LCD controller stucture for MPC823 CPU
*/
typedef struct vidinfo {
ushort vl_col; /* Number of columns (i.e. 640) */
ushort vl_row; /* Number of rows (i.e. 480) */
ushort vl_width; /* Width of display area in millimeters */
ushort vl_height; /* Height of display area in millimeters */
/* LCD configuration register */
u_char vl_clkp; /* Clock polarity */
u_char vl_oep; /* Output Enable polarity */
u_char vl_hsp; /* Horizontal Sync polarity */
u_char vl_vsp; /* Vertical Sync polarity */
u_char vl_dp; /* Data polarity */
u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */
u_char vl_clor; /* Color, 0 = mono, 1 = color */
u_char vl_tft; /* 0 = passive, 1 = TFT */
/* Horizontal control register. Timing from data sheet */
ushort vl_wbl; /* Wait between lines */
/* Vertical control register */
u_char vl_vpw; /* Vertical sync pulse width */
u_char vl_lcdac; /* LCD AC timing */
u_char vl_wbf; /* Wait between frames */
} vidinfo_t;
#include <mpc823_lcd.h>
#elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
defined CONFIG_CPU_MONAHANS
/*
* PXA LCD DMA descriptor
*/
struct pxafb_dma_descriptor {
u_long fdadr; /* Frame descriptor address register */
u_long fsadr; /* Frame source address register */
u_long fidr; /* Frame ID register */
u_long ldcmd; /* Command register */
};
/*
* PXA LCD info
*/
struct pxafb_info {
/* Misc registers */
u_long reg_lccr3;
u_long reg_lccr2;
u_long reg_lccr1;
u_long reg_lccr0;
u_long fdadr0;
u_long fdadr1;
/* DMA descriptors */
struct pxafb_dma_descriptor * dmadesc_fblow;
struct pxafb_dma_descriptor * dmadesc_fbhigh;
struct pxafb_dma_descriptor * dmadesc_palette;
u_long screen; /* physical address of frame buffer */
u_long palette; /* physical address of palette memory */
u_int palette_size;
};
/*
* LCD controller stucture for PXA CPU
*/
typedef struct vidinfo {
ushort vl_col; /* Number of columns (i.e. 640) */
ushort vl_row; /* Number of rows (i.e. 480) */
ushort vl_width; /* Width of display area in millimeters */
ushort vl_height; /* Height of display area in millimeters */
/* LCD configuration register */
u_char vl_clkp; /* Clock polarity */
u_char vl_oep; /* Output Enable polarity */
u_char vl_hsp; /* Horizontal Sync polarity */
u_char vl_vsp; /* Vertical Sync polarity */
u_char vl_dp; /* Data polarity */
u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */
u_char vl_clor; /* Color, 0 = mono, 1 = color */
u_char vl_tft; /* 0 = passive, 1 = TFT */
/* Horizontal control register. Timing from data sheet */
ushort vl_hpw; /* Horz sync pulse width */
u_char vl_blw; /* Wait before of line */
u_char vl_elw; /* Wait end of line */
/* Vertical control register. */
u_char vl_vpw; /* Vertical sync pulse width */
u_char vl_bfw; /* Wait before of frame */
u_char vl_efw; /* Wait end of frame */
/* PXA LCD controller params */
struct pxafb_info pxa;
} vidinfo_t;
#include <pxa_lcd.h>
#elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD)
typedef struct vidinfo {
ushort vl_col; /* Number of columns (i.e. 640) */
ushort vl_row; /* Number of rows (i.e. 480) */
u_long vl_clk; /* pixel clock in ps */
/* LCD configuration register */
u_long vl_sync; /* Horizontal / vertical sync */
u_long vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
u_long vl_tft; /* 0 = passive, 1 = TFT */
u_long vl_cont_pol_low; /* contrast polarity is low */
u_long vl_clk_pol; /* clock polarity */
/* Horizontal control register. */
u_long vl_hsync_len; /* Length of horizontal sync */
u_long vl_left_margin; /* Time from sync to picture */
u_long vl_right_margin; /* Time from picture to sync */
/* Vertical control register. */
u_long vl_vsync_len; /* Length of vertical sync */
u_long vl_upper_margin; /* Time from sync to picture */
u_long vl_lower_margin; /* Time from picture to sync */
u_long mmio; /* Memory mapped registers */
} vidinfo_t;
#include <atmel_lcd.h>
#elif defined(CONFIG_EXYNOS_FB)
enum {
FIMD_RGB_INTERFACE = 1,
FIMD_CPU_INTERFACE = 2,
};
enum exynos_fb_rgb_mode_t {
MODE_RGB_P = 0,
MODE_BGR_P = 1,
MODE_RGB_S = 2,
MODE_BGR_S = 3,
};
typedef struct vidinfo {
ushort vl_col; /* Number of columns (i.e. 640) */
ushort vl_row; /* Number of rows (i.e. 480) */
ushort vl_width; /* Width of display area in millimeters */
ushort vl_height; /* Height of display area in millimeters */
/* LCD configuration register */
u_char vl_freq; /* Frequency */
u_char vl_clkp; /* Clock polarity */
u_char vl_oep; /* Output Enable polarity */
u_char vl_hsp; /* Horizontal Sync polarity */
u_char vl_vsp; /* Vertical Sync polarity */
u_char vl_dp; /* Data polarity */
u_char vl_bpix; /* Bits per pixel */
/* Horizontal control register. Timing from data sheet */
u_char vl_hspw; /* Horz sync pulse width */
u_char vl_hfpd; /* Wait before of line */
u_char vl_hbpd; /* Wait end of line */
/* Vertical control register. */
u_char vl_vspw; /* Vertical sync pulse width */
u_char vl_vfpd; /* Wait before of frame */
u_char vl_vbpd; /* Wait end of frame */
u_char vl_cmd_allow_len; /* Wait end of frame */
unsigned int win_id;
unsigned int init_delay;
unsigned int power_on_delay;
unsigned int reset_delay;
unsigned int interface_mode;
unsigned int mipi_enabled;
unsigned int dp_enabled;
unsigned int cs_setup;
unsigned int wr_setup;
unsigned int wr_act;
unsigned int wr_hold;
unsigned int logo_on;
unsigned int logo_width;
unsigned int logo_height;
int logo_x_offset;
int logo_y_offset;
unsigned long logo_addr;
unsigned int rgb_mode;
unsigned int resolution;
/* parent clock name(MPLL, EPLL or VPLL) */
unsigned int pclk_name;
/* ratio value for source clock from parent clock. */
unsigned int sclk_div;
unsigned int dual_lcd_enabled;
} vidinfo_t;
void init_panel_info(vidinfo_t *vid);
#include <exynos_lcd.h>
#else
typedef struct vidinfo {
ushort vl_col; /* Number of columns (i.e. 160) */
ushort vl_row; /* Number of rows (i.e. 100) */
u_char vl_bpix; /* Bits per pixel, 0 = 1 */
ushort *cmap; /* Pointer to the colormap */
void *priv; /* Pointer to driver-specific data */
} vidinfo_t;
#endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_ATMEL_LCD */
static __maybe_unused ushort *configuration_get_cmap(void)
{
return panel_info.cmap;
}
#endif
ushort *configuration_get_cmap(void);
extern vidinfo_t panel_info;
/* Video functions */
void lcd_putc(const char c);
void lcd_puts(const char *s);
void lcd_printf(const char *fmt, ...);
void lcd_clear(void);
int lcd_display_bitmap(ulong bmp_image, int x, int y);
void lcd_putc(const char c);
void lcd_puts(const char *s);
void lcd_printf(const char *fmt, ...);
void lcd_clear(void);
int lcd_display_bitmap(ulong bmp_image, int x, int y);
/**
* Get the width of the LCD in pixels
@ -319,20 +128,9 @@ void lcd_show_board_info(void);
/* Return the size of the LCD frame buffer, and the line length */
int lcd_get_size(int *line_length);
int lcd_dt_simplefb_add_node(void *blob);
int lcd_dt_simplefb_enable_existing_node(void *blob);
/* Update the LCD / flush the cache */
void lcd_sync(void);
/************************************************************************/
/* ** BITMAP DISPLAY SUPPORT */
/************************************************************************/
#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
# include <bmp_layout.h>
# include <asm/byteorder.h>
#endif
/*
* Information about displays we are using. This is for configuring
* the LCD controller and memory allocation. Someone has to know what
@ -347,38 +145,32 @@ void lcd_sync(void);
#define LCD_COLOR8 3
#define LCD_COLOR16 4
#define LCD_COLOR32 5
/*----------------------------------------------------------------------*/
#if defined(CONFIG_LCD_INFO_BELOW_LOGO)
# define LCD_INFO_X 0
# define LCD_INFO_Y (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
#define LCD_INFO_X 0
#define LCD_INFO_Y (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
#elif defined(CONFIG_LCD_LOGO)
# define LCD_INFO_X (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
# define LCD_INFO_Y VIDEO_FONT_HEIGHT
#define LCD_INFO_X (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
#define LCD_INFO_Y VIDEO_FONT_HEIGHT
#else
# define LCD_INFO_X VIDEO_FONT_WIDTH
# define LCD_INFO_Y VIDEO_FONT_HEIGHT
#define LCD_INFO_X VIDEO_FONT_WIDTH
#define LCD_INFO_Y VIDEO_FONT_HEIGHT
#endif
/* Default to 8bpp if bit depth not specified */
#ifndef LCD_BPP
# define LCD_BPP LCD_COLOR8
#define LCD_BPP LCD_COLOR8
#endif
#ifndef LCD_DF
# define LCD_DF 1
#define LCD_DF 1
#endif
/* Calculate nr. of bits per pixel and nr. of colors */
#define NBITS(bit_code) (1 << (bit_code))
#define NCOLORS(bit_code) (1 << NBITS(bit_code))
/************************************************************************/
/* ** CONSOLE CONSTANTS */
/************************************************************************/
#if LCD_BPP == LCD_COLOR8
/*
* 8bpp color definitions
*/
# define CONSOLE_COLOR_BLACK 0
# define CONSOLE_COLOR_RED 1
# define CONSOLE_COLOR_GREEN 2
@ -387,38 +179,25 @@ void lcd_sync(void);
# define CONSOLE_COLOR_MAGENTA 5
# define CONSOLE_COLOR_CYAN 6
# define CONSOLE_COLOR_GREY 14
# define CONSOLE_COLOR_WHITE 15 /* Must remain last / highest */
# define CONSOLE_COLOR_WHITE 15 /* Must remain last / highest */
#elif LCD_BPP == LCD_COLOR32
/*
* 32bpp color definitions
*/
# define CONSOLE_COLOR_RED 0x00ff0000
# define CONSOLE_COLOR_GREEN 0x0000ff00
# define CONSOLE_COLOR_YELLOW 0x00ffff00
# define CONSOLE_COLOR_BLUE 0x000000ff
# define CONSOLE_COLOR_MAGENTA 0x00ff00ff
# define CONSOLE_COLOR_CYAN 0x0000ffff
# define CONSOLE_COLOR_GREY 0x00aaaaaa
# define CONSOLE_COLOR_BLACK 0x00000000
# define CONSOLE_COLOR_WHITE 0x00ffffff /* Must remain last / highest*/
# define NBYTES(bit_code) (NBITS(bit_code) >> 3)
#else
/*
* 16bpp color definitions
*/
# define CONSOLE_COLOR_BLACK 0x0000
# define CONSOLE_COLOR_WHITE 0xffff /* Must remain last / highest */
#define CONSOLE_COLOR_RED 0x00ff0000
#define CONSOLE_COLOR_GREEN 0x0000ff00
#define CONSOLE_COLOR_YELLOW 0x00ffff00
#define CONSOLE_COLOR_BLUE 0x000000ff
#define CONSOLE_COLOR_MAGENTA 0x00ff00ff
#define CONSOLE_COLOR_CYAN 0x0000ffff
#define CONSOLE_COLOR_GREY 0x00aaaaaa
#define CONSOLE_COLOR_BLACK 0x00000000
#define CONSOLE_COLOR_WHITE 0x00ffffff /* Must remain last / highest */
#define NBYTES(bit_code) (NBITS(bit_code) >> 3)
#else /* 16bpp color definitions */
#define CONSOLE_COLOR_BLACK 0x0000
#define CONSOLE_COLOR_WHITE 0xffff /* Must remain last / highest */
#endif /* color definitions */
/************************************************************************/
#ifndef PAGE_SIZE
# define PAGE_SIZE 4096
#define PAGE_SIZE 4096
#endif
/************************************************************************/
#endif /* _LCD_H_ */

43
include/mpc823_lcd.h Normal file
View File

@ -0,0 +1,43 @@
/*
* mpc823_lcd.h - MPC823 LCD Controller structures
*
* (C) Copyright 2001
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _MPC823_LCD_H_
#define _MPC823_LCD_H_
/*
* LCD controller stucture for MPC823 CPU
*/
typedef struct vidinfo {
ushort vl_col; /* Number of columns (i.e. 640) */
ushort vl_row; /* Number of rows (i.e. 480) */
ushort vl_width; /* Width of display area in millimeters */
ushort vl_height; /* Height of display area in millimeters */
/* LCD configuration register */
u_char vl_clkp; /* Clock polarity */
u_char vl_oep; /* Output Enable polarity */
u_char vl_hsp; /* Horizontal Sync polarity */
u_char vl_vsp; /* Vertical Sync polarity */
u_char vl_dp; /* Data polarity */
u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */
u_char vl_clor; /* Color, 0 = mono, 1 = color */
u_char vl_tft; /* 0 = passive, 1 = TFT */
/* Horizontal control register. Timing from data sheet */
ushort vl_wbl; /* Wait between lines */
/* Vertical control register */
u_char vl_vpw; /* Vertical sync pulse width */
u_char vl_lcdac; /* LCD AC timing */
u_char vl_wbf; /* Wait between frames */
} vidinfo_t;
#endif

80
include/pxa_lcd.h Normal file
View File

@ -0,0 +1,80 @@
/*
* pxa_lcd.h - PXA LCD Controller structures
*
* (C) Copyright 2001
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _PXA_LCD_H_
#define _PXA_LCD_H_
/*
* PXA LCD DMA descriptor
*/
struct pxafb_dma_descriptor {
u_long fdadr; /* Frame descriptor address register */
u_long fsadr; /* Frame source address register */
u_long fidr; /* Frame ID register */
u_long ldcmd; /* Command register */
};
/*
* PXA LCD info
*/
struct pxafb_info {
/* Misc registers */
u_long reg_lccr3;
u_long reg_lccr2;
u_long reg_lccr1;
u_long reg_lccr0;
u_long fdadr0;
u_long fdadr1;
/* DMA descriptors */
struct pxafb_dma_descriptor *dmadesc_fblow;
struct pxafb_dma_descriptor *dmadesc_fbhigh;
struct pxafb_dma_descriptor *dmadesc_palette;
u_long screen; /* physical address of frame buffer */
u_long palette; /* physical address of palette memory */
u_int palette_size;
};
/*
* LCD controller stucture for PXA CPU
*/
typedef struct vidinfo {
ushort vl_col; /* Number of columns (i.e. 640) */
ushort vl_row; /* Number of rows (i.e. 480) */
ushort vl_width; /* Width of display area in millimeters */
ushort vl_height; /* Height of display area in millimeters */
/* LCD configuration register */
u_char vl_clkp; /* Clock polarity */
u_char vl_oep; /* Output Enable polarity */
u_char vl_hsp; /* Horizontal Sync polarity */
u_char vl_vsp; /* Vertical Sync polarity */
u_char vl_dp; /* Data polarity */
u_char vl_bpix;/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
u_char vl_splt;/* Split display, 0 = single-scan, 1 = dual-scan */
u_char vl_clor; /* Color, 0 = mono, 1 = color */
u_char vl_tft; /* 0 = passive, 1 = TFT */
/* Horizontal control register. Timing from data sheet */
ushort vl_hpw; /* Horz sync pulse width */
u_char vl_blw; /* Wait before of line */
u_char vl_elw; /* Wait end of line */
/* Vertical control register. */
u_char vl_vpw; /* Vertical sync pulse width */
u_char vl_bfw; /* Wait before of frame */
u_char vl_efw; /* Wait end of frame */
/* PXA LCD controller params */
struct pxafb_info pxa;
} vidinfo_t;
#endif

11
include/splash.h
View File

@ -22,6 +22,8 @@
#ifndef _SPLASH_H_
#define _SPLASH_H_
#include <errno.h>
enum splash_storage {
SPLASH_STORAGE_NAND,
SPLASH_STORAGE_SF,
@ -42,6 +44,15 @@ void splash_get_pos(int *x, int *y);
static inline void splash_get_pos(int *x, int *y) { }
#endif
#if defined(CONFIG_SPLASH_SCREEN) && defined(CONFIG_LCD)
int lcd_splash(ulong addr);
#else
static inline int lcd_splash(ulong addr)
{
return -ENOSYS;
}
#endif
#define BMP_ALIGN_CENTER 0x7FFF
#endif