diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index e7395201ade..cb3d2cc06fc 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -167,6 +167,7 @@ #define EXYNOS5420_USB_HOST_EHCI_BASE 0x12110000 #define EXYNOS5420_MMC_BASE 0x12200000 #define EXYNOS5420_SROMC_BASE 0x12250000 +#define EXYNOS5420_USB3PHY_BASE 0x12500000 #define EXYNOS5420_UART_BASE 0x12C00000 #define EXYNOS5420_I2C_BASE 0x12C60000 #define EXYNOS5420_I2C_8910_BASE 0x12E00000 @@ -187,7 +188,6 @@ #define EXYNOS5420_FIMD_BASE DEVICE_NOT_AVAILABLE #define EXYNOS5420_ADC_BASE DEVICE_NOT_AVAILABLE #define EXYNOS5420_MODEM_BASE DEVICE_NOT_AVAILABLE -#define EXYNOS5420_USB3PHY_BASE DEVICE_NOT_AVAILABLE #define EXYNOS5420_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index 20dd75c22e6..1a4e8c9c99a 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -24,8 +24,9 @@ #include #include #include -#include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -378,5 +379,8 @@ void reset_misc(void) int board_usb_cleanup(int index, enum usb_init_type init) { +#ifdef CONFIG_USB_DWC3 + dwc3_uboot_exit(index); +#endif return 0; } diff --git a/board/samsung/common/bootscripts/autoboot.cmd b/board/samsung/common/bootscripts/autoboot.cmd new file mode 100644 index 00000000000..3b4015693bb --- /dev/null +++ b/board/samsung/common/bootscripts/autoboot.cmd @@ -0,0 +1,92 @@ +# This is an example file to generate boot.scr - a boot script for U-Boot +# Generate boot.scr: +# ./tools/mkimage -c none -A arm -T script -d autoboot.cmd boot.scr +# +# It requires a list of environment variables to be defined before load: +# platform dependent: boardname, fdtfile, console +# system dependent: mmcbootdev, mmcbootpart, mmcrootdev, mmcrootpart, rootfstype +# +setenv fdtaddr "40800000" +setenv initrdname "uInitrd" +setenv initrdaddr "42000000" +setenv loaddtb "load mmc ${mmcbootdev}:${mmcbootpart} ${fdtaddr} ${fdtfile}" +setenv loadinitrd "load mmc ${mmcbootdev}:${mmcbootpart} ${initrdaddr} ${initrdname}" +setenv loadkernel "load mmc ${mmcbootdev}:${mmcbootpart} '${kerneladdr}' '${kernelname}'" +setenv kernel_args "setenv bootargs ${console} root=/dev/mmcblk${mmcrootdev}p${mmcrootpart} rootfstype=${rootfstype} rootwait ${opts}" + +#### Routine: check_dtb - check that target.dtb exists on boot partition +setenv check_dtb " +if test -e mmc '${mmcbootdev}':'${mmcbootpart}' '${fdtfile}'; then + run loaddtb; + setenv fdt_addr ${fdtaddr}; +else + echo Warning! Booting without DTB: '${fdtfile}'!; + setenv fdt_addr; +fi;" + +#### Routine: check_ramdisk - check that uInitrd exists on boot partition +setenv check_ramdisk " +if test -e mmc '${mmcbootdev}':'${mmcbootpart}' '${initrdname}'; then + echo "Found ramdisk image."; + run loadinitrd; + setenv initrd_addr ${initrdaddr}; +else + echo Warning! Booting without RAMDISK: '${initrdname}'!; + setenv initrd_addr -; +fi;" + +#### Routine: boot_fit - check that env $boardname is set and boot proper config of ITB image +setenv setboot_fit " +if test -e '${boardname}'; then + setenv fdt_addr ; + setenv initrd_addr ; + setenv kerneladdr 0x42000000; + setenv kernelname Image.itb; + setenv itbcfg \#'${boardname}'; + setenv imgbootcmd bootm; +else + echo Warning! Variable: \$boardname is undefined!; +fi" + +#### Routine: setboot_uimg - prepare env to boot uImage +setenv setboot_uimg " + setenv kerneladdr 0x40007FC0; + setenv kernelname uImage; + setenv itbcfg ; + setenv imgbootcmd bootm; + run check_dtb; + run check_ramdisk;" + +#### Routine: setboot_zimg - prepare env to boot zImage +setenv setboot_zimg " + setenv kerneladdr 0x40007FC0; + setenv kernelname zImage; + setenv itbcfg ; + setenv imgbootcmd bootz; + run check_dtb; + run check_ramdisk;" + +#### Routine: boot_img - boot the kernel after env setup +setenv boot_img " + run loadkernel; + run kernel_args; + '${imgbootcmd}' '${kerneladdr}${itbcfg}' '${initrd_addr}' '${fdt_addr}';" + +#### Routine: autoboot - choose proper boot path +setenv autoboot " +if test -e mmc 0:${mmcbootpart} Image.itb; then + echo Found kernel image: Image.itb; + run setboot_fit; + run boot_img; +elif test -e mmc 0:${mmcbootpart} zImage; then + echo Found kernel image: zImage; + run setboot_zimg; + run boot_img; +elif test -e mmc 0:${mmcbootpart} uImage; then + echo Found kernel image: uImage; + run setboot_uimg; + run boot_img; +fi;" + +#### Execute the defined autoboot macro +run autoboot diff --git a/board/samsung/common/bootscripts/bootzimg.cmd b/board/samsung/common/bootscripts/bootzimg.cmd new file mode 100644 index 00000000000..2fb4c163a73 --- /dev/null +++ b/board/samsung/common/bootscripts/bootzimg.cmd @@ -0,0 +1,10 @@ +setenv kernelname zImage; +setenv boot_kernel "setenv bootargs \"${console} root=/dev/mmcblk${mmcrootdev}p${mmcrootpart} rootfstype=${rootfstype} rootwait ${opts}\"; +load mmc ${mmcbootdev}:${mmcbootpart} 0x40007FC0 '${kernelname}'; +if load mmc ${mmcbootdev}:${mmcbootpart} 40800000 ${fdtfile}; then + bootz 0x40007FC0 - 40800000; +else + echo Warning! Booting without DTB: '${fdtfile}'!; + bootz 0x40007FC0 -; +fi;" +run boot_kernel; \ No newline at end of file diff --git a/board/samsung/smdk5420/smdk5420.c b/board/samsung/smdk5420/smdk5420.c index 82f607b24d9..88f4044d63b 100644 --- a/board/samsung/smdk5420/smdk5420.c +++ b/board/samsung/smdk5420/smdk5420.c @@ -6,19 +6,25 @@ #include #include +#include #include +#include +#include +#include +#include +#include +#include +#include +#include +#include #include #include +#include #include #include -#include -#include -#include -#include -#include -#include -#include -#include +#include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -75,3 +81,63 @@ int board_get_revision(void) { return 0; } + +#ifdef CONFIG_USB_DWC3 +static struct dwc3_device dwc3_device_data = { + .maximum_speed = USB_SPEED_SUPER, + .base = 0x12400000, + .dr_mode = USB_DR_MODE_PERIPHERAL, + .index = 0, +}; + +int usb_gadget_handle_interrupts(void) +{ + dwc3_uboot_handle_interrupt(0); + return 0; +} + +int board_usb_init(int index, enum usb_init_type init) +{ + struct exynos_usb3_phy *phy = (struct exynos_usb3_phy *) + samsung_get_base_usb3_phy(); + + if (!phy) { + error("usb3 phy not supported"); + return -ENODEV; + } + + set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN); + exynos5_usb3_phy_init(phy); + + return dwc3_uboot_init(&dwc3_device_data); +} +#endif +#ifdef CONFIG_SET_DFU_ALT_INFO +char *get_dfu_alt_system(char *interface, char *devstr) +{ + return getenv("dfu_alt_system"); +} + +char *get_dfu_alt_boot(char *interface, char *devstr) +{ + struct mmc *mmc; + char *alt_boot; + int dev_num; + + dev_num = simple_strtoul(devstr, NULL, 10); + + mmc = find_mmc_device(dev_num); + if (!mmc) + return NULL; + + if (mmc_init(mmc)) + return NULL; + + if (IS_SD(mmc)) + alt_boot = CONFIG_DFU_ALT_BOOT_SD; + else + alt_boot = CONFIG_DFU_ALT_BOOT_EMMC; + + return alt_boot; +} +#endif diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile index e455a5279c2..02bb216db7b 100644 --- a/drivers/usb/dwc3/Makefile +++ b/drivers/usb/dwc3/Makefile @@ -6,3 +6,4 @@ dwc3-y += gadget.o ep0.o obj-$(CONFIG_USB_DWC3_OMAP) += dwc3-omap.o obj-$(CONFIG_USB_DWC3_PHY_OMAP) += ti_usb_phy.o +obj-$(CONFIG_USB_DWC3_PHY_SAMSUNG) += samsung_usb_phy.o diff --git a/drivers/usb/dwc3/samsung_usb_phy.c b/drivers/usb/dwc3/samsung_usb_phy.c new file mode 100644 index 00000000000..42209865486 --- /dev/null +++ b/drivers/usb/dwc3/samsung_usb_phy.c @@ -0,0 +1,78 @@ +/** + * samsung_usb_phy.c - DesignWare USB3 (DWC3) PHY handling file + * + * Copyright (C) 2015 Samsung Electronics + * + * Author: Joonyoung Shim + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include +#include +#include + +void exynos5_usb3_phy_init(struct exynos_usb3_phy *phy) +{ + u32 reg; + + /* Reset USB 3.0 PHY */ + writel(0x0, &phy->phy_reg0); + + clrbits_le32(&phy->phy_param0, + /* Select PHY CLK source */ + PHYPARAM0_REF_USE_PAD | + /* Set Loss-of-Signal Detector sensitivity */ + PHYPARAM0_REF_LOSLEVEL_MASK); + setbits_le32(&phy->phy_param0, PHYPARAM0_REF_LOSLEVEL); + + + writel(0x0, &phy->phy_resume); + + /* + * Setting the Frame length Adj value[6:1] to default 0x20 + * See xHCI 1.0 spec, 5.2.4 + */ + setbits_le32(&phy->link_system, + LINKSYSTEM_XHCI_VERSION_CONTROL | + LINKSYSTEM_FLADJ(0x20)); + + /* Set Tx De-Emphasis level */ + clrbits_le32(&phy->phy_param1, PHYPARAM1_PCS_TXDEEMPH_MASK); + setbits_le32(&phy->phy_param1, PHYPARAM1_PCS_TXDEEMPH); + + setbits_le32(&phy->phy_batchg, PHYBATCHG_UTMI_CLKSEL); + + /* PHYTEST POWERDOWN Control */ + clrbits_le32(&phy->phy_test, + PHYTEST_POWERDOWN_SSP | + PHYTEST_POWERDOWN_HSP); + + /* UTMI Power Control */ + writel(PHYUTMI_OTGDISABLE, &phy->phy_utmi); + + /* Use core clock from main PLL */ + reg = PHYCLKRST_REFCLKSEL_EXT_REFCLK | + /* Default 24Mhz crystal clock */ + PHYCLKRST_FSEL(FSEL_CLKSEL_24M) | + PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF | + PHYCLKRST_SSC_REFCLKSEL(0) | + /* Force PortReset of PHY */ + PHYCLKRST_PORTRESET | + /* Digital power supply in normal operating mode */ + PHYCLKRST_RETENABLEN | + /* Enable ref clock for SS function */ + PHYCLKRST_REF_SSP_EN | + /* Enable spread spectrum */ + PHYCLKRST_SSC_EN | + /* Power down HS Bias and PLL blocks in suspend mode */ + PHYCLKRST_COMMONONN; + + writel(reg, &phy->phy_clk_rst); + + /* giving time to Phy clock to settle before resetting */ + udelay(10); + + reg &= ~PHYCLKRST_PORTRESET; + writel(reg, &phy->phy_clk_rst); +} diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c index d1bc5efa9b3..abe9391d3d6 100644 --- a/drivers/usb/gadget/f_mass_storage.c +++ b/drivers/usb/gadget/f_mass_storage.c @@ -671,7 +671,7 @@ static int sleep_thread(struct fsg_common *common) if (common->thread_wakeup_needed) break; - if (++i == 50000) { + if (++i == 20000) { busy_indicator(); i = 0; k++; diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index 5fd618df87b..97b7f145425 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -76,7 +76,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, break; default: printf("ERROR: wrong controller index!!\n"); - break; + return -EINVAL; }; *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index c395020919f..cf17f3d06e9 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -35,8 +35,8 @@ #undef CONFIG_ENV_SIZE #undef CONFIG_ENV_OFFSET -#define CONFIG_ENV_SIZE 4096 -#define CONFIG_ENV_OFFSET (SZ_1K * 1280) /* 1.25 MiB offset */ +#define CONFIG_ENV_SIZE (SZ_1K * 16) +#define CONFIG_ENV_OFFSET (SZ_1K * 3136) /* ~3 MiB offset */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) @@ -46,8 +46,92 @@ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_EXYNOS +/* DWC3 */ +#define CONFIG_USB_DWC3 +#define CONFIG_USB_DWC3_GADGET +#define CONFIG_USB_DWC3_PHY_SAMSUNG + +/* USB gadget */ +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Downloader */ +#define CONFIG_G_DNL_VENDOR_NUM 0x04E8 +#define CONFIG_G_DNL_PRODUCT_NUM 0x6601 +#define CONFIG_G_DNL_MANUFACTURER "Samsung" +#define CONFIG_USBDOWNLOAD_GADGET + +/* DFU */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_MMC +#define CONFIG_CMD_DFU +#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M +#define DFU_DEFAULT_POLL_TIMEOUT 300 + +/* THOR */ +#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM +#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D +#define CONFIG_THOR_FUNCTION +#define CONFIG_CMD_THOR_DOWNLOAD + +/* UMS */ +#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_CMD_USB_MASS_STORAGE + /* FIXME: MUST BE REMOVED AFTER TMU IS TURNED ON */ #undef CONFIG_EXYNOS_TMU #undef CONFIG_TMU_CMD_DTT +#define CONFIG_DFU_ALT_SYSTEM \ + "uImage fat 0 1;" \ + "zImage fat 0 1;" \ + "Image.itb fat 0 1;" \ + "uInitrd fat 0 1;" \ + "boot.scr fat 0 1;" \ + "boot.cmd fat 0 1;" \ + "exynos5422-odroidxu3.dtb fat 0 1;" \ + "boot part 0 1;" \ + "root part 0 2\0" + +#define CONFIG_DFU_ALT_BOOT_EMMC \ + "u-boot raw 0x3e 0x800 mmcpart 1;" \ + "bl1 raw 0x0 0x1e mmcpart 1;" \ + "bl2 raw 0x1e 0x1d mmcpart 1;" \ + "tzsw raw 0x83e 0x200 mmcpart 1;" \ + "params.bin raw 0x1880 0x20\0" + +#define CONFIG_DFU_ALT_BOOT_SD \ + "u-boot raw 0x3f 0x800;" \ + "bl1 raw 0x1 0x1e;" \ + "bl2 raw 0x1f 0x1d;" \ + "tzsw raw 0x83f 0x200;" \ + "params.bin raw 0x1880 0x20\0" + +/* Enable: board/samsung/common/misc.c to use set_dfu_alt_info() */ +#define CONFIG_MISC_COMMON +#define CONFIG_SET_DFU_ALT_INFO +#define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) + +/* Define new extra env settings, including DFU settings */ +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + EXYNOS_DEVICE_SETTINGS \ + EXYNOS_FDTFILE_SETTING \ + MEM_LAYOUT_ENV_SETTINGS \ + BOOTENV \ + "bootdelay=0\0" \ + "rootfstype=ext4\0" \ + "console=" CONFIG_DEFAULT_CONSOLE \ + "fdtfile=exynos5422-odroidxu3.dtb\0" \ + "boardname=odroidxu3\0" \ + "mmcbootdev=0\0" \ + "mmcrootdev=0\0" \ + "mmcbootpart=1\0" \ + "mmcrootpart=2\0" \ + "dfu_alt_system="CONFIG_DFU_ALT_SYSTEM \ + "dfu_alt_info=Autoset by THOR/DFU command run.\0" + #endif /* __CONFIG_H */ diff --git a/include/samsung-usb-phy-uboot.h b/include/samsung-usb-phy-uboot.h new file mode 100644 index 00000000000..9f37560f116 --- /dev/null +++ b/include/samsung-usb-phy-uboot.h @@ -0,0 +1,16 @@ +/* include/samsung-usb-phy-uboot.h + * + * Copyright (c) 2015 Samsung Electronics + * + * USB3 (DWC3) PHY uboot init + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __SAMSUNG_USB_PHY_UBOOT_H_ +#define __SAMSUNG_USB_PHY_UBOOT_H_ + +#include + +void exynos5_usb3_phy_init(struct exynos_usb3_phy *phy); +#endif /* __SAMSUNG_USB_PHY_UBOOT_H_ */