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spi: cadence-qspi: Remove condition for calling enable linear mode
cadence_qspi_apb_enable_linear_mode() has a weak function defined, so no need to gaurd this under if (CONFIG_IS_ENABLED(ARCH_VERSAL)). In cadence_qspi_apb_write_execute(), enable linear mode is called twice by mistake, remove extra one. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20221129114134.18909-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
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@ -735,8 +735,7 @@ int cadence_qspi_apb_read_execute(struct cadence_spi_priv *priv,
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void *buf = op->data.buf.in;
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void *buf = op->data.buf.in;
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size_t len = op->data.nbytes;
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size_t len = op->data.nbytes;
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if (CONFIG_IS_ENABLED(ARCH_VERSAL))
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cadence_qspi_apb_enable_linear_mode(true);
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cadence_qspi_apb_enable_linear_mode(true);
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if (priv->use_dac_mode && (from + len < priv->ahbsize)) {
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if (priv->use_dac_mode && (from + len < priv->ahbsize)) {
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if (len < 256 ||
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if (len < 256 ||
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@ -905,9 +904,6 @@ int cadence_qspi_apb_write_execute(struct cadence_spi_priv *priv,
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const void *buf = op->data.buf.out;
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const void *buf = op->data.buf.out;
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size_t len = op->data.nbytes;
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size_t len = op->data.nbytes;
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if (CONFIG_IS_ENABLED(ARCH_VERSAL))
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cadence_qspi_apb_enable_linear_mode(true);
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/*
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/*
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* Some flashes like the Cypress Semper flash expect a dummy 4-byte
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* Some flashes like the Cypress Semper flash expect a dummy 4-byte
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* address (all 0s) with the read status register command in DTR mode.
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* address (all 0s) with the read status register command in DTR mode.
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