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armv8: fsl-layerscape: LS1044A/1048A: enable Only 1x 10GE port

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LS1088A has four personalities, LS1088A, LS1084A, LS1048A and LS1044A.
LS1044A, LS1048A are LS1088A personalities, which support only one
1x 10GE port.
MAC1 and MAC2 are associated with 1G SGMII, 2.5G SGMII, and XFI.
Disable MAC1 to have only one 1x 10GE port for LS1044A, LS1048A.

Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Pramod Kumar 2020-01-09 08:53:16 +00:00 committed by Priyanka Jain
parent 6ce26f8fd3
commit 0b7435107b
1 changed files with 21 additions and 2 deletions
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23
arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c
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@ -1,10 +1,12 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2017 NXP
* Copyright 2017-2019 NXP
*/
#include <common.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/soc.h>
#include <asm/io.h>
struct serdes_config {
u8 ip_protocol;
@ -32,6 +34,7 @@ static struct serdes_config serdes1_cfg_tbl[] = {
{0x3A, {SGMII3, PCIE1, SGMII1, SGMII2 }, {3, 5, 3, 3 } },
{}
};
static struct serdes_config serdes2_cfg_tbl[] = {
/* SerDes 2 */
{0x0C, {PCIE1, PCIE1, PCIE1, PCIE1 }, {8, 8, 8, 8 } },
@ -48,6 +51,15 @@ static struct serdes_config *serdes_cfg_tbl[] = {
serdes2_cfg_tbl,
};
bool soc_has_mac1(void)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
unsigned int svr = gur_in32(&gur->svr);
unsigned int version = SVR_SOC_VER(svr);
return (version == SVR_LS1088A || version == SVR_LS1084A);
}
int serdes_get_number(int serdes, int cfg)
{
struct serdes_config *ptr;
@ -87,7 +99,14 @@ enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
return 0;
/*
* LS1044A/1048A support only one XFI port
* Disable MAC1 for LS1044A/1048A
*/
if (serdes == FSL_SRDS_1 && lane == 2) {
if (!soc_has_mac1())
return 0;
}
ptr = serdes_cfg_tbl[serdes];
while (ptr->ip_protocol) {
if (ptr->ip_protocol == cfg)