arm: vf610: Add clock support for DSPI

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
This commit is contained in:
Bhuvanchandra DV 2015-06-01 18:37:19 +05:30 committed by Stefano Babic
parent 30748d81d0
commit 098d85840e
3 changed files with 12 additions and 0 deletions

View File

@ -198,6 +198,11 @@ static u32 get_i2c_clk(void)
return get_ipg_clk();
}
static u32 get_dspi_clk(void)
{
return get_ipg_clk();
}
unsigned int mxc_get_clock(enum mxc_clock clk)
{
switch (clk) {
@ -215,6 +220,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
return get_fec_clk();
case MXC_I2C_CLK:
return get_i2c_clk();
case MXC_DSPI_CLK:
return get_dspi_clk();
default:
break;
}

View File

@ -17,6 +17,7 @@ enum mxc_clock {
MXC_ESDHC_CLK,
MXC_FEC_CLK,
MXC_I2C_CLK,
MXC_DSPI_CLK,
};
void enable_ocotp_clk(unsigned char enable);

View File

@ -189,6 +189,8 @@ struct anadig_reg {
#define CCM_REG_CTRL_MASK 0xffffffff
#define CCM_CCGR0_UART0_CTRL_MASK (0x3 << 14)
#define CCM_CCGR0_UART1_CTRL_MASK (0x3 << 16)
#define CCM_CCGR0_DSPI0_CTRL_MASK (0x3 << 24)
#define CCM_CCGR0_DSPI1_CTRL_MASK (0x3 << 26)
#define CCM_CCGR1_USBC0_CTRL_MASK (0x3 << 8)
#define CCM_CCGR1_PIT_CTRL_MASK (0x3 << 14)
#define CCM_CCGR1_WDOGA5_CTRL_MASK (0x3 << 28)
@ -206,6 +208,8 @@ struct anadig_reg {
#define CCM_CCGR4_GPC_CTRL_MASK (0x3 << 24)
#define CCM_CCGR4_I2C0_CTRL_MASK (0x3 << 12)
#define CCM_CCGR6_OCOTP_CTRL_MASK (0x3 << 10)
#define CCM_CCGR6_DSPI2_CTRL_MASK (0x3 << 24)
#define CCM_CCGR6_DSPI3_CTRL_MASK (0x3 << 26)
#define CCM_CCGR6_DDRMC_CTRL_MASK (0x3 << 28)
#define CCM_CCGR7_SDHC1_CTRL_MASK (0x3 << 4)
#define CCM_CCGR7_USBC1_CTRL_MASK (0x3 << 8)