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tx25: Use generic gpio_* calls
Instead of manipulating gpio registers directly, use the calls from the gpio library. Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de> Cc: John Rigby <jcrigby@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
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@ -34,14 +34,13 @@
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_FEC_MXC
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#define GPIO_FEC_RESET_B MXC_GPIO_PORT_TO_NUM(4, 7)
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#define GPIO_FEC_ENABLE_B MXC_GPIO_PORT_TO_NUM(4, 9)
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void tx25_fec_init(void)
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{
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struct iomuxc_mux_ctl *muxctl;
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struct iomuxc_pad_ctl *padctl;
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u32 val;
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u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
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struct gpio_regs *gpio4 = (struct gpio_regs *)IMX_GPIO4_BASE;
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struct gpio_regs *gpio3 = (struct gpio_regs *)IMX_GPIO3_BASE;
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u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode;
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debug("tx25_fec_init\n");
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@ -66,18 +65,15 @@ void tx25_fec_init(void)
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writel(0x0, &padctl->pad_d11);
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/* drop PHY power and assert reset (low) */
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val = readl(&gpio4->gpio_dr) & ~((1 << 7) | (1 << 9));
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writel(val, &gpio4->gpio_dr);
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val = readl(&gpio4->gpio_dir) | (1 << 7) | (1 << 9);
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writel(val, &gpio4->gpio_dir);
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gpio_direction_output(GPIO_FEC_RESET_B, 0);
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gpio_direction_output(GPIO_FEC_ENABLE_B, 0);
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mdelay(5);
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debug("resetting phy\n");
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/* turn on PHY power leaving reset asserted */
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val = readl(&gpio4->gpio_dr) | 1 << 9;
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writel(val, &gpio4->gpio_dr);
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gpio_set_value(GPIO_FEC_ENABLE_B, 1);
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mdelay(10);
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@ -107,19 +103,16 @@ void tx25_fec_init(void)
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/*
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* set each to 1 and make each an output
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*/
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val = readl(&gpio3->gpio_dr) | (1 << 10) | (1 << 11) | (1 << 12);
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writel(val, &gpio3->gpio_dr);
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val = readl(&gpio3->gpio_dir) | (1 << 10) | (1 << 11) | (1 << 12);
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writel(val, &gpio3->gpio_dir);
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gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 10), 1);
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gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 11), 1);
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gpio_direction_output(MXC_GPIO_PORT_TO_NUM(3, 12), 1);
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mdelay(22); /* this value came from RedBoot */
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/*
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* deassert PHY reset
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*/
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val = readl(&gpio4->gpio_dr) | 1 << 7;
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writel(val, &gpio4->gpio_dr);
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writel(val, &gpio4->gpio_dr);
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gpio_set_value(GPIO_FEC_RESET_B, 1);
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mdelay(5);
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