mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-25 13:14:19 +08:00
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
This commit is contained in:
Albert ARIBAUD
commit
08798026f2
10
board/gateworks/gw_ventana/Makefile
Normal file
10
board/gateworks/gw_ventana/Makefile
Normal file
@ -0,0 +1,10 @@
|
||||
#
|
||||
# Copyright (C) 2012-2013, Guennadi Liakhovetski <lg@denx.de>
|
||||
# (C) Copyright 2012-2013 Freescale Semiconductor, Inc.
|
||||
# Copyright (C) 2013, Gateworks Corporation
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y := gw_ventana.o gsc.o
|
||||
|
||||
55
board/gateworks/gw_ventana/README
Normal file
55
board/gateworks/gw_ventana/README
Normal file
@ -0,0 +1,55 @@
|
||||
U-Boot for the Gateworks Ventana Product Family boards
|
||||
|
||||
This file contains information for the port of U-Boot to the Gateworks
|
||||
Ventana Product family boards.
|
||||
|
||||
1. Boot source, boot from NAND
|
||||
------------------------------
|
||||
|
||||
The i.MX6 BOOT ROM expects some structures that provide details of NAND layout
|
||||
and bad block information (referred to as 'bootstreams') which are replicated
|
||||
multiple times in NAND. The number of replications is configurable through
|
||||
board strapping options and eFUSE settings. The Freescale 'kobs-ng'
|
||||
application from the Freescale LTIB BSP, which runs under Linux, must be used
|
||||
to program the bootstream in order to setup the replicated headers correctly.
|
||||
|
||||
The Gateworks Ventana boards with NAND flash have been factory programmed
|
||||
such that their eFUSE settings expect 2 copies of the boostream (this is
|
||||
specified by providing kobs-ng with the --search_exponent=1 argument). Once in
|
||||
Linux with MTD support for the NAND on /dev/mtd0 you can program the boostream
|
||||
with:
|
||||
|
||||
kobs-ng init -v -x --search_exponent=1 u-boot.imx
|
||||
|
||||
The kobs-ng application uses an imximage (u-boot.imx) which contains the
|
||||
Image Vector Table (IVT) and Device Configuration Data (DCD) structures that
|
||||
the i.MX6 BOOT ROM requires to boot. The kobs-ng adds the Firmware
|
||||
Configuration Block (FCB) and Discovered Bad Block Table (DBBT).
|
||||
|
||||
This information is taken from:
|
||||
http://trac.gateworks.com/wiki/ventana/bootloader#NANDFLASH
|
||||
|
||||
More details about the i.MX6 BOOT ROM can be found in the IMX6 reference manual.
|
||||
|
||||
2. Build
|
||||
--------
|
||||
|
||||
There are several Gateworks Ventana boards that share a simliar design but
|
||||
vary based on CPU, Memory configuration, and subloaded devices. Although
|
||||
the subloaded devices are handled dynamically in the bootloader using
|
||||
factory configured EEPROM data to modify the device-tree, the CPU choice
|
||||
(IMX6Q vs IMX6DL) and memory configurations are currently compile-time
|
||||
options.
|
||||
|
||||
The following Gateworks Ventana configurations exist:
|
||||
gwventanaq1gspi: MX6Q,1GB,SPI FLASH
|
||||
gwventanaq : MX6Q,512MB,NAND FLASH
|
||||
gwventanaq1g : MX6Q,1GB,NAND FLASH
|
||||
gwventanadl : MX6DL,512MB,NAND FLASH
|
||||
gwventanadl1g : MX6DL,1GB,NAND FLASH
|
||||
|
||||
To build U-Boot for the MX6Q,1GB,NAND FLASH for example:
|
||||
|
||||
make gwventanaq1g_config
|
||||
make
|
||||
|
||||
42
board/gateworks/gw_ventana/clocks.cfg
Normal file
42
board/gateworks/gw_ventana/clocks.cfg
Normal file
@ -0,0 +1,42 @@
|
||||
/*
|
||||
* Copyright (C) 2013 Boundary Devices
|
||||
* Copyright (C) 2013 Gateworks Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*
|
||||
* Device Configuration Data (DCD)
|
||||
*
|
||||
* Each entry must have the format:
|
||||
* Addr-type Address Value
|
||||
*
|
||||
* where:
|
||||
* Addr-type register length (1,2 or 4 bytes)
|
||||
* Address absolute address of the register
|
||||
* value value to be stored in the register
|
||||
*/
|
||||
|
||||
/* set the default clock gate to save power */
|
||||
DATA 4, CCM_CCGR0, 0x00C03F3F
|
||||
DATA 4, CCM_CCGR1, 0x0030FC03
|
||||
DATA 4, CCM_CCGR2, 0x0FFFC000
|
||||
DATA 4, CCM_CCGR3, 0x3FF00000
|
||||
DATA 4, CCM_CCGR4, 0xFFFFF300 /* enable NAND/GPMI/BCH clocks */
|
||||
DATA 4, CCM_CCGR5, 0x0F0000C3
|
||||
DATA 4, CCM_CCGR6, 0x000003FF
|
||||
|
||||
/* enable AXI cache for VDOA/VPU/IPU */
|
||||
DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF
|
||||
/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
|
||||
DATA 4, MX6_IOMUXC_GPR6, 0x007F007F
|
||||
DATA 4, MX6_IOMUXC_GPR7, 0x007F007F
|
||||
|
||||
/*
|
||||
* Setup CCM_CCOSR register as follows:
|
||||
*
|
||||
* cko1_en = 1 --> CKO1 enabled
|
||||
* cko1_div = 111 --> divide by 8
|
||||
* cko1_sel = 1011 --> ahb_clk_root
|
||||
*
|
||||
* This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
|
||||
*/
|
||||
DATA 4, CCM_CCOSR, 0x000000fb
|
||||
129
board/gateworks/gw_ventana/gsc.c
Normal file
129
board/gateworks/gw_ventana/gsc.c
Normal file
@ -0,0 +1,129 @@
|
||||
/*
|
||||
* Copyright (C) 2013 Gateworks Corporation
|
||||
*
|
||||
* Author: Tim Harvey <tharvey@gateworks.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <asm/errno.h>
|
||||
#include <common.h>
|
||||
#include <i2c.h>
|
||||
#include <linux/ctype.h>
|
||||
|
||||
#include "gsc.h"
|
||||
|
||||
#define MINMAX(n, percent) ((n)*(100-percent)/100), ((n)*(100+percent)/100)
|
||||
|
||||
/*
|
||||
* The Gateworks System Controller will fail to ACK a master transaction if
|
||||
* it is busy, which can occur during its 1HZ timer tick while reading ADC's.
|
||||
* When this does occur, it will never be busy long enough to fail more than
|
||||
* 2 back-to-back transfers. Thus we wrap i2c_read and i2c_write with
|
||||
* 3 retries.
|
||||
*/
|
||||
int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
|
||||
{
|
||||
int retry = 3;
|
||||
int n = 0;
|
||||
int ret;
|
||||
|
||||
while (n++ < retry) {
|
||||
ret = i2c_read(chip, addr, alen, buf, len);
|
||||
if (!ret)
|
||||
break;
|
||||
debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr,
|
||||
n, ret);
|
||||
if (ret != -ENODEV)
|
||||
break;
|
||||
mdelay(10);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
|
||||
{
|
||||
int retry = 3;
|
||||
int n = 0;
|
||||
int ret;
|
||||
|
||||
while (n++ < retry) {
|
||||
ret = i2c_write(chip, addr, alen, buf, len);
|
||||
if (!ret)
|
||||
break;
|
||||
debug("%s: 0x%02x 0x%02x retry%d: %d\n", __func__, chip, addr,
|
||||
n, ret);
|
||||
if (ret != -ENODEV)
|
||||
break;
|
||||
mdelay(10);
|
||||
}
|
||||
mdelay(1);
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_GSC
|
||||
static void read_hwmon(const char *name, uint reg, uint size, uint low,
|
||||
uint high)
|
||||
{
|
||||
unsigned char buf[3];
|
||||
uint ui;
|
||||
|
||||
printf("%-8s:", name);
|
||||
memset(buf, 0, sizeof(buf));
|
||||
if (gsc_i2c_read(GSC_HWMON_ADDR, reg, 1, buf, size)) {
|
||||
puts("fRD\n");
|
||||
} else {
|
||||
ui = buf[0] | (buf[1]<<8) | (buf[2]<<16);
|
||||
if (ui == 0xffffff)
|
||||
printf("invalid");
|
||||
else if (ui < low)
|
||||
printf("%d Failed - Low", ui);
|
||||
else if (ui > high)
|
||||
printf("%d Failed - High", ui);
|
||||
else
|
||||
printf("%d", ui);
|
||||
}
|
||||
puts("\n");
|
||||
}
|
||||
|
||||
int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
||||
{
|
||||
const char *model = getenv("model");
|
||||
|
||||
i2c_set_bus_num(0);
|
||||
read_hwmon("Temp", GSC_HWMON_TEMP, 2, 0, 9000);
|
||||
read_hwmon("VIN", GSC_HWMON_VIN, 3, 8000, 60000);
|
||||
read_hwmon("VBATT", GSC_HWMON_VBATT, 3, 1800, 3500);
|
||||
read_hwmon("VDD_3P3", GSC_HWMON_VDD_3P3, 3, MINMAX(3300, 10));
|
||||
read_hwmon("VDD_HIGH", GSC_HWMON_VDD_HIGH, 3, MINMAX(3000, 10));
|
||||
read_hwmon("VDD_DDR", GSC_HWMON_VDD_DDR, 3, MINMAX(1500, 10));
|
||||
read_hwmon("VDD_5P0", GSC_HWMON_VDD_5P0, 3, MINMAX(5000, 10));
|
||||
read_hwmon("VDD_2P5", GSC_HWMON_VDD_2P5, 3, MINMAX(2500, 10));
|
||||
read_hwmon("VDD_1P8", GSC_HWMON_VDD_1P8, 3, MINMAX(1800, 10));
|
||||
|
||||
switch (model[3]) {
|
||||
case '1': /* GW51xx */
|
||||
read_hwmon("VDD_CORE", GSC_HWMON_VDD_CORE, 3, MINMAX(1175, 10));
|
||||
read_hwmon("VDD_SOC", GSC_HWMON_VDD_SOC, 3, MINMAX(1175, 10));
|
||||
break;
|
||||
case '2': /* GW52xx */
|
||||
case '3': /* GW53xx */
|
||||
read_hwmon("VDD_CORE", GSC_HWMON_VDD_CORE, 3, MINMAX(1175, 10));
|
||||
read_hwmon("VDD_SOC", GSC_HWMON_VDD_SOC, 3, MINMAX(1175, 10));
|
||||
read_hwmon("VDD_1P0", GSC_HWMON_VDD_1P0, 3, MINMAX(1000, 10));
|
||||
break;
|
||||
case '4': /* GW54xx */
|
||||
read_hwmon("VDD_CORE", GSC_HWMON_VDD_CORE, 3, MINMAX(1375, 10));
|
||||
read_hwmon("VDD_SOC", GSC_HWMON_VDD_SOC, 3, MINMAX(1375, 10));
|
||||
read_hwmon("VDD_1P0", GSC_HWMON_VDD_1P0, 3, MINMAX(1000, 10));
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
U_BOOT_CMD(gsc, 1, 1, do_gsc,
|
||||
"GSC test",
|
||||
""
|
||||
);
|
||||
|
||||
#endif /* CONFIG_CMD_GSC */
|
||||
64
board/gateworks/gw_ventana/gsc.h
Normal file
64
board/gateworks/gw_ventana/gsc.h
Normal file
@ -0,0 +1,64 @@
|
||||
/*
|
||||
* Copyright (C) 2013 Gateworks Corporation
|
||||
*
|
||||
* Author: Tim Harvey <tharvey@gateworks.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/* i2c slave addresses */
|
||||
#define GSC_SC_ADDR 0x20
|
||||
#define GSC_RTC_ADDR 0x68
|
||||
#define GSC_HWMON_ADDR 0x29
|
||||
#define GSC_EEPROM_ADDR 0x51
|
||||
|
||||
/* System Controller registers */
|
||||
enum {
|
||||
GSC_SC_CTRL0 = 0x00,
|
||||
GSC_SC_CTRL1 = 0x01,
|
||||
GSC_SC_STATUS = 0x0a,
|
||||
GSC_SC_FWVER = 0x0e,
|
||||
};
|
||||
|
||||
/* System Controller Control1 bits */
|
||||
enum {
|
||||
GSC_SC_CTRL1_WDDIS = 7, /* 1 = disable watchdog */
|
||||
};
|
||||
|
||||
/* System Controller Interrupt bits */
|
||||
enum {
|
||||
GSC_SC_IRQ_PB = 0, /* Pushbutton switch */
|
||||
GSC_SC_IRQ_SECURE = 1, /* Secure Key erase operation complete */
|
||||
GSC_SC_IRQ_EEPROM_WP = 2, /* EEPROM write violation */
|
||||
GSC_SC_IRQ_GPIO = 4, /* GPIO change */
|
||||
GSC_SC_IRQ_TAMPER = 5, /* Tamper detect */
|
||||
GSC_SC_IRQ_WATCHDOG = 6, /* Watchdog trip */
|
||||
GSC_SC_IRQ_PBLONG = 7, /* Pushbutton long hold */
|
||||
};
|
||||
|
||||
/* Hardware Monitor registers */
|
||||
enum {
|
||||
GSC_HWMON_TEMP = 0x00,
|
||||
GSC_HWMON_VIN = 0x02,
|
||||
GSC_HWMON_VDD_3P3 = 0x05,
|
||||
GSC_HWMON_VBATT = 0x08,
|
||||
GSC_HWMON_VDD_5P0 = 0x0b,
|
||||
GSC_HWMON_VDD_CORE = 0x0e,
|
||||
GSC_HWMON_VDD_HIGH = 0x14,
|
||||
GSC_HWMON_VDD_DDR = 0x17,
|
||||
GSC_HWMON_VDD_SOC = 0x11,
|
||||
GSC_HWMON_VDD_1P8 = 0x1d,
|
||||
GSC_HWMON_VDD_2P5 = 0x23,
|
||||
GSC_HWMON_VDD_1P0 = 0x20,
|
||||
};
|
||||
|
||||
/*
|
||||
* I2C transactions to the GSC are done via these functions which
|
||||
* perform retries in the case of a busy GSC NAK'ing the transaction
|
||||
*/
|
||||
int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len);
|
||||
int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len);
|
||||
#endif
|
||||
|
||||
1263
board/gateworks/gw_ventana/gw_ventana.c
Normal file
1263
board/gateworks/gw_ventana/gw_ventana.c
Normal file
File diff suppressed because it is too large
Load Diff
44
board/gateworks/gw_ventana/gw_ventana.cfg
Normal file
44
board/gateworks/gw_ventana/gw_ventana.cfg
Normal file
@ -0,0 +1,44 @@
|
||||
/*
|
||||
* Copyright (C) 2013 Gateworks Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*
|
||||
* Refer doc/README.imximage for more details about how-to configure
|
||||
* and create imximage boot image
|
||||
*
|
||||
* The syntax is taken as close as possible with the kwbimage
|
||||
*/
|
||||
|
||||
/* image version */
|
||||
IMAGE_VERSION 2
|
||||
|
||||
/*
|
||||
* Boot Device : one of
|
||||
* spi, sd, nand, sata
|
||||
*/
|
||||
#ifdef CONFIG_SPI_FLASH
|
||||
BOOT_FROM spi
|
||||
#else
|
||||
BOOT_FROM nand
|
||||
#endif
|
||||
|
||||
#define __ASSEMBLY__
|
||||
#include <config.h>
|
||||
#include "asm/arch/mx6-ddr.h"
|
||||
#include "asm/arch/iomux.h"
|
||||
#include "asm/arch/crm_regs.h"
|
||||
|
||||
/* Memory configuration (size is overridden via eeprom config) */
|
||||
#include "../../boundary/nitrogen6x/ddr-setup.cfg"
|
||||
#if defined(CONFIG_MX6Q) && CONFIG_DDR_MB == 1024
|
||||
#include "../../boundary/nitrogen6x/1066mhz_4x128mx16.cfg"
|
||||
#elif defined(CONFIG_MX6DL) && CONFIG_DDR_MB == 1024
|
||||
#include "../../boundary/nitrogen6x/800mhz_4x128mx16.cfg"
|
||||
#elif defined(CONFIG_MX6DL) && CONFIG_DDR_MB == 512
|
||||
#include "../../boundary/nitrogen6x/800mhz_2x128mx16.cfg"
|
||||
#elif defined(CONFIG_MX6Q) && CONFIG_DDR_MB == 512
|
||||
#include "../../boundary/nitrogen6x/800mhz_2x128mx16.cfg"
|
||||
#else
|
||||
#error "Unsupported CPU/Memory configuration"
|
||||
#endif
|
||||
#include "clocks.cfg"
|
||||
106
board/gateworks/gw_ventana/ventana_eeprom.h
Normal file
106
board/gateworks/gw_ventana/ventana_eeprom.h
Normal file
@ -0,0 +1,106 @@
|
||||
/*
|
||||
* Copyright (C) 2013 Gateworks Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef _VENTANA_EEPROM_
|
||||
#define _VENTANA_EEPROM_
|
||||
|
||||
struct ventana_board_info {
|
||||
u8 mac0[6]; /* 0x00: MAC1 */
|
||||
u8 mac1[6]; /* 0x06: MAC2 */
|
||||
u8 res0[12]; /* 0x0C: reserved */
|
||||
u32 serial; /* 0x18: Serial Number (read only) */
|
||||
u8 res1[4]; /* 0x1C: reserved */
|
||||
u8 mfgdate[4]; /* 0x20: MFG date (read only) */
|
||||
u8 res2[7]; /* 0x24 */
|
||||
/* sdram config */
|
||||
u8 sdram_size; /* 0x2B: enum (512,1024,2048) MB */
|
||||
u8 sdram_speed; /* 0x2C: enum (100,133,166,200,267,333,400) MHz */
|
||||
u8 sdram_width; /* 0x2D: enum (32,64) bit */
|
||||
/* cpu config */
|
||||
u8 cpu_speed; /* 0x2E: enum (800,1000,1200) MHz */
|
||||
u8 cpu_type; /* 0x2F: enum (imx6q,imx6d,imx6dl,imx6s) */
|
||||
u8 model[16]; /* 0x30: model string */
|
||||
/* FLASH config */
|
||||
u8 nand_flash_size; /* 0x40: enum (4,8,16,32,64,128) MB */
|
||||
u8 spi_flash_size; /* 0x41: enum (4,8,16,32,64,128) MB */
|
||||
|
||||
/* Config1: SoC Peripherals */
|
||||
u8 config[8]; /* 0x42: loading options */
|
||||
|
||||
u8 res3[4]; /* 0x4A */
|
||||
|
||||
u8 chksum[2]; /* 0x4E */
|
||||
};
|
||||
|
||||
/* config bits */
|
||||
enum {
|
||||
EECONFIG_ETH0,
|
||||
EECONFIG_ETH1,
|
||||
EECONFIG_HDMI_OUT,
|
||||
EECONFIG_SATA,
|
||||
EECONFIG_PCIE,
|
||||
EECONFIG_SSI0,
|
||||
EECONFIG_SSI1,
|
||||
EECONFIG_LCD,
|
||||
EECONFIG_LVDS0,
|
||||
EECONFIG_LVDS1,
|
||||
EECONFIG_USB0,
|
||||
EECONFIG_USB1,
|
||||
EECONFIG_SD0,
|
||||
EECONFIG_SD1,
|
||||
EECONFIG_SD2,
|
||||
EECONFIG_SD3,
|
||||
EECONFIG_UART0,
|
||||
EECONFIG_UART1,
|
||||
EECONFIG_UART2,
|
||||
EECONFIG_UART3,
|
||||
EECONFIG_UART4,
|
||||
EECONFIG_IPU0,
|
||||
EECONFIG_IPU1,
|
||||
EECONFIG_FLEXCAN,
|
||||
EECONFIG_MIPI_DSI,
|
||||
EECONFIG_MIPI_CSI,
|
||||
EECONFIG_TZASC0,
|
||||
EECONFIG_TZASC1,
|
||||
EECONFIG_I2C0,
|
||||
EECONFIG_I2C1,
|
||||
EECONFIG_I2C2,
|
||||
EECONFIG_VPU,
|
||||
EECONFIG_CSI0,
|
||||
EECONFIG_CSI1,
|
||||
EECONFIG_CAAM,
|
||||
EECONFIG_MEZZ,
|
||||
EECONFIG_RES1,
|
||||
EECONFIG_RES2,
|
||||
EECONFIG_RES3,
|
||||
EECONFIG_RES4,
|
||||
EECONFIG_ESPCI0,
|
||||
EECONFIG_ESPCI1,
|
||||
EECONFIG_ESPCI2,
|
||||
EECONFIG_ESPCI3,
|
||||
EECONFIG_ESPCI4,
|
||||
EECONFIG_ESPCI5,
|
||||
EECONFIG_RES5,
|
||||
EECONFIG_RES6,
|
||||
EECONFIG_GPS,
|
||||
EECONFIG_SPIFL0,
|
||||
EECONFIG_SPIFL1,
|
||||
EECONFIG_GSPBATT,
|
||||
EECONFIG_HDMI_IN,
|
||||
EECONFIG_VID_OUT,
|
||||
EECONFIG_VID_IN,
|
||||
EECONFIG_NAND,
|
||||
EECONFIG_RES8,
|
||||
EECONFIG_RES9,
|
||||
EECONFIG_RES10,
|
||||
EECONFIG_RES11,
|
||||
EECONFIG_RES12,
|
||||
EECONFIG_RES13,
|
||||
EECONFIG_RES14,
|
||||
EECONFIG_RES15,
|
||||
};
|
||||
|
||||
#endif
|
||||
@ -25,6 +25,8 @@
|
||||
#include <miiphy.h>
|
||||
#include <netdev.h>
|
||||
#include <linux/fb.h>
|
||||
#include <phy.h>
|
||||
#include <input.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
@ -55,7 +57,7 @@ static iomux_v3_cfg_t const uart1_pads[] = {
|
||||
MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
|
||||
};
|
||||
|
||||
iomux_v3_cfg_t const usdhc1_pads[] = {
|
||||
static iomux_v3_cfg_t const usdhc1_pads[] = {
|
||||
MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
|
||||
MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
|
||||
MX6_PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
|
||||
|
||||
@ -322,6 +322,11 @@ Active arm armv7 mx6 freescale mx6qsabreauto
|
||||
Active arm armv7 mx6 freescale mx6sabresd mx6dlsabresd mx6sabresd:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL Fabio Estevam <fabio.estevam@freescale.com>
|
||||
Active arm armv7 mx6 freescale mx6sabresd mx6qsabresd mx6sabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Fabio Estevam <fabio.estevam@freescale.com>
|
||||
Active arm armv7 mx6 freescale mx6slevk mx6slevk mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL Fabio Estevam <fabio.estevam@freescale.com>
|
||||
Active arm armv7 mx6 gateworks gw_ventana gwventanadl gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6DL,DDR_MB=512 Tim Harvey <tharvey@gateworks.com>
|
||||
Active arm armv7 mx6 gateworks gw_ventana gwventanadl1g gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6DL,DDR_MB=1024 Tim Harvey <tharvey@gateworks.com>
|
||||
Active arm armv7 mx6 gateworks gw_ventana gwventanaq gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=512 Tim Harvey <tharvey@gateworks.com>
|
||||
Active arm armv7 mx6 gateworks gw_ventana gwventanaq1g gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=1024 Tim Harvey <tharvey@gateworks.com>
|
||||
Active arm armv7 mx6 gateworks gw_ventana gwventanaq1gspi gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=1024,SPI_FLASH Tim Harvey <tharvey@gateworks.com>
|
||||
Active arm armv7 mx6 solidrun hummingboard hummingboard_solo hummingboard:IMX_CONFIG=board/solidrun/hummingboard/solo.cfg,MX6S,DDR_MB=512 Jon Nettleton <jon.nettleton@gmail.com>
|
||||
Active arm armv7 omap3 - overo omap3_overo - Steve Sakoman <sakoman@gmail.com>
|
||||
Active arm armv7 omap3 - pandora omap3_pandora - Grazvydas Ignotas <notasas@gmail.com>
|
||||
|
||||
@ -9,5 +9,6 @@ obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o
|
||||
obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o
|
||||
obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o
|
||||
obj-$(CONFIG_POWER_MAX77686) += pmic_max77686.o
|
||||
obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o
|
||||
obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o
|
||||
obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
|
||||
|
||||
32
drivers/power/pmic/pmic_pfuze100.c
Normal file
32
drivers/power/pmic/pmic_pfuze100.c
Normal file
@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (C) 2014 Gateworks Corporation
|
||||
* Tim Harvey <tharvey@gateworks.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <errno.h>
|
||||
#include <i2c.h>
|
||||
#include <power/pmic.h>
|
||||
#include <power/pfuze100_pmic.h>
|
||||
|
||||
int pmic_init(unsigned char bus)
|
||||
{
|
||||
static const char name[] = "PFUZE100_PMIC";
|
||||
struct pmic *p = pmic_alloc();
|
||||
|
||||
if (!p) {
|
||||
printf("%s: POWER allocation error!\n", __func__);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
p->name = name;
|
||||
p->interface = PMIC_I2C;
|
||||
p->number_of_regs = PMIC_NUM_OF_REGS;
|
||||
p->hw.i2c.addr = CONFIG_POWER_PFUZE100_I2C_ADDR;
|
||||
p->hw.i2c.tx_num = 1;
|
||||
p->bus = bus;
|
||||
|
||||
return 0;
|
||||
}
|
||||
425
include/configs/gw_ventana.h
Normal file
425
include/configs/gw_ventana.h
Normal file
@ -0,0 +1,425 @@
|
||||
/*
|
||||
* Copyright (C) 2013 Gateworks Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#include "mx6_common.h"
|
||||
#define CONFIG_MX6
|
||||
#define CONFIG_DISPLAY_CPUINFO /* display cpu info */
|
||||
#define CONFIG_DISPLAY_BOARDINFO_LATE /* display board info (after reloc) */
|
||||
|
||||
#define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */
|
||||
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/imx-common/gpio.h>
|
||||
|
||||
/* ATAGs */
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_INITRD_TAG
|
||||
#define CONFIG_SERIAL_TAG
|
||||
#define CONFIG_REVISION_TAG
|
||||
|
||||
/* Size of malloc() pool */
|
||||
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
|
||||
|
||||
/* Init Functions */
|
||||
#define CONFIG_BOARD_EARLY_INIT_F
|
||||
#define CONFIG_MISC_INIT_R
|
||||
|
||||
/* GPIO */
|
||||
#define CONFIG_MXC_GPIO
|
||||
|
||||
/* Serial */
|
||||
#define CONFIG_MXC_UART
|
||||
#define CONFIG_MXC_UART_BASE UART2_BASE
|
||||
|
||||
#ifdef CONFIG_SPI_FLASH
|
||||
|
||||
/* SPI */
|
||||
#define CONFIG_CMD_SF
|
||||
#ifdef CONFIG_CMD_SF
|
||||
#define CONFIG_MXC_SPI
|
||||
#define CONFIG_SPI_FLASH_MTD
|
||||
#define CONFIG_SPI_FLASH_BAR
|
||||
#define CONFIG_SPI_FLASH_WINBOND
|
||||
#define CONFIG_SF_DEFAULT_BUS 0
|
||||
#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))
|
||||
/* GPIO 3-19 (21248) */
|
||||
#define CONFIG_SF_DEFAULT_SPEED 30000000
|
||||
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
|
||||
#endif
|
||||
|
||||
#else
|
||||
/* Enable NAND support */
|
||||
#define CONFIG_CMD_TIME
|
||||
#define CONFIG_CMD_NAND
|
||||
#define CONFIG_CMD_NAND_TRIMFFS
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_MXS
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x40000000
|
||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
|
||||
#define CONFIG_SYS_NAND_ONFI_DETECTION
|
||||
|
||||
/* DMA stuff, needed for GPMI/MXS NAND support */
|
||||
#define CONFIG_APBH_DMA
|
||||
#define CONFIG_APBH_DMA_BURST
|
||||
#define CONFIG_APBH_DMA_BURST8
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_SPI_FLASH */
|
||||
|
||||
/* Flattened Image Tree Suport */
|
||||
#define CONFIG_FIT
|
||||
#define CONFIG_FIT_VERBOSE
|
||||
|
||||
/* I2C Configs */
|
||||
#define CONFIG_CMD_I2C
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_MXC
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
|
||||
/* MMC Configs */
|
||||
#define CONFIG_FSL_ESDHC
|
||||
#define CONFIG_FSL_USDHC
|
||||
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
|
||||
#define CONFIG_SYS_FSL_USDHC_NUM 1
|
||||
#define CONFIG_MMC
|
||||
#define CONFIG_CMD_MMC
|
||||
#define CONFIG_GENERIC_MMC
|
||||
#define CONFIG_BOUNCE_BUFFER
|
||||
|
||||
/* Filesystem support */
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_UBIFS
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
||||
/* Network config - Allow larger/faster download for TFTP/NFS */
|
||||
#define CONFIG_IP_DEFRAG
|
||||
#define CONFIG_TFTP_BLOCKSIZE 4096
|
||||
#define CONFIG_NFS_READ_SIZE 4096
|
||||
|
||||
/*
|
||||
* SATA Configs
|
||||
*/
|
||||
#define CONFIG_CMD_SATA
|
||||
#ifdef CONFIG_CMD_SATA
|
||||
#define CONFIG_DWC_AHSATA
|
||||
#define CONFIG_SYS_SATA_MAX_DEVICE 1
|
||||
#define CONFIG_DWC_AHSATA_PORT_ID 0
|
||||
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
|
||||
#define CONFIG_LBA48
|
||||
#define CONFIG_LIBATA
|
||||
#endif
|
||||
|
||||
/*
|
||||
* PCI express
|
||||
*/
|
||||
#define CONFIG_CMD_PCI
|
||||
#ifdef CONFIG_CMD_PCI
|
||||
#define CONFIG_PCI
|
||||
#define CONFIG_PCI_PNP
|
||||
#define CONFIG_PCI_SCAN_SHOW
|
||||
#define CONFIG_PCIE_IMX
|
||||
#endif
|
||||
|
||||
/*
|
||||
* PMIC
|
||||
*/
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_I2C
|
||||
#define CONFIG_POWER_PFUZE100
|
||||
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
|
||||
|
||||
/* Various command support */
|
||||
#include <config_cmd_default.h>
|
||||
#undef CONFIG_CMD_IMLS
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_MII
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
|
||||
#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
|
||||
#define CONFIG_CMD_SETEXPR
|
||||
#define CONFIG_CMD_BOOTZ
|
||||
#define CONFIG_CMD_GSC
|
||||
#define CONFIG_CMD_UBI
|
||||
#define CONFIG_RBTREE
|
||||
#define CONFIG_LZO
|
||||
#define CONFIG_CMD_FUSE /* eFUSE read/write support */
|
||||
#ifdef CONFIG_CMD_FUSE
|
||||
#define CONFIG_MXC_OCOTP
|
||||
#endif
|
||||
|
||||
|
||||
/* Ethernet support */
|
||||
#define CONFIG_FEC_MXC
|
||||
#define CONFIG_MII
|
||||
#define IMX_FEC_BASE ENET_BASE_ADDR
|
||||
#define CONFIG_FEC_XCV_TYPE RGMII
|
||||
#define CONFIG_ETHPRIME "FEC"
|
||||
#define CONFIG_FEC_MXC_PHYADDR 0
|
||||
#define CONFIG_PHYLIB
|
||||
#define CONFIG_ARP_TIMEOUT 200UL
|
||||
|
||||
/* USB Configs */
|
||||
#define CONFIG_CMD_USB
|
||||
#define CONFIG_USB_EHCI
|
||||
#define CONFIG_USB_EHCI_MX6
|
||||
#define CONFIG_USB_STORAGE
|
||||
#define CONFIG_USB_HOST_ETHER
|
||||
#define CONFIG_USB_ETHER_ASIX
|
||||
#define CONFIG_USB_ETHER_SMSC95XX
|
||||
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
|
||||
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
|
||||
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
|
||||
#define CONFIG_MXC_USB_FLAGS 0
|
||||
#define CONFIG_USB_KEYBOARD
|
||||
#define CONFIG_CI_UDC
|
||||
#define CONFIG_USBD_HS
|
||||
#define CONFIG_USB_GADGET_DUALSPEED
|
||||
#define CONFIG_USB_ETHER
|
||||
#define CONFIG_USB_ETH_CDC
|
||||
#define CONFIG_NETCONSOLE
|
||||
#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
|
||||
#define CONFIG_USB_HUB_MIN_POWER_ON_DELAY 1200
|
||||
|
||||
/* serial console (ttymxc1,115200) */
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
/* Miscellaneous configurable options */
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT "Ventana > "
|
||||
#define CONFIG_SYS_CBSIZE 1024
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
#define CONFIG_HWCONFIG
|
||||
|
||||
/* Print Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_MAXARGS 16
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
|
||||
/* Memory configuration */
|
||||
#define CONFIG_SYS_MEMTEST_START 0x10000000
|
||||
#define CONFIG_SYS_MEMTEST_END 0x10010000
|
||||
#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
|
||||
#define CONFIG_SYS_TEXT_BASE 0x17800000
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x12000000
|
||||
|
||||
/* Physical Memory Map */
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
|
||||
|
||||
#define CONFIG_SYS_INIT_SP_OFFSET \
|
||||
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP_ADDR \
|
||||
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
||||
|
||||
/* FLASH and environment organization */
|
||||
#define CONFIG_SYS_NO_FLASH /* no NOR flash */
|
||||
|
||||
/*
|
||||
* MTD Command for mtdparts
|
||||
*/
|
||||
#define CONFIG_CMD_MTDPARTS
|
||||
#define CONFIG_MTD_DEVICE
|
||||
#define CONFIG_MTD_PARTITIONS
|
||||
#ifdef CONFIG_SPI_FLASH
|
||||
#define MTDIDS_DEFAULT "nor0=nor"
|
||||
#define MTDPARTS_DEFAULT \
|
||||
"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
|
||||
#else
|
||||
#define MTDIDS_DEFAULT "nand0=nand"
|
||||
#define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
|
||||
#endif
|
||||
|
||||
/* Persistent Environment Config */
|
||||
#define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
|
||||
#ifdef CONFIG_SPI_FLASH
|
||||
#define CONFIG_ENV_IS_IN_SPI_FLASH
|
||||
#else
|
||||
#define CONFIG_ENV_IS_IN_NAND
|
||||
#endif
|
||||
#if defined(CONFIG_ENV_IS_IN_MMC)
|
||||
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
|
||||
#define CONFIG_ENV_SIZE (8 * 1024)
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0
|
||||
#elif defined(CONFIG_ENV_IS_IN_NAND)
|
||||
#define CONFIG_ENV_OFFSET (16 << 20)
|
||||
#define CONFIG_ENV_SECT_SIZE (128 << 10)
|
||||
#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
|
||||
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 << 10))
|
||||
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
|
||||
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
|
||||
#define CONFIG_ENV_OFFSET (512 * 1024)
|
||||
#define CONFIG_ENV_SECT_SIZE (64 * 1024)
|
||||
#define CONFIG_ENV_SIZE (8 * 1024)
|
||||
#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
|
||||
#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
|
||||
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
|
||||
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
|
||||
#endif
|
||||
|
||||
/* Environment */
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
|
||||
#define CONFIG_IPADDR 192.168.1.1
|
||||
#define CONFIG_SERVERIP 192.168.1.146
|
||||
#define HWCONFIG_DEFAULT \
|
||||
"hwconfig=rs232;" \
|
||||
"dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
|
||||
"console=ttymxc1\0" \
|
||||
"bootdevs=usb mmc sata flash\0" \
|
||||
HWCONFIG_DEFAULT \
|
||||
"video=\0" \
|
||||
\
|
||||
"mtdparts=" MTDPARTS_DEFAULT "\0" \
|
||||
"mtdids=" MTDIDS_DEFAULT "\0" \
|
||||
\
|
||||
"fdt_high=0xffffffff\0" \
|
||||
"fdt_addr=0x18000000\0" \
|
||||
"loadfdt=" \
|
||||
"if ${fsload} ${fdt_addr} boot/${fdt_file}; then " \
|
||||
"echo Loaded DTB from boot/${fdt_file}; " \
|
||||
"elif ${fsload} ${fdt_addr} boot/${fdt_file1}; then " \
|
||||
"echo Loaded DTB from boot/${fdt_file1}; " \
|
||||
"elif ${fsload} ${fdt_addr} boot/${fdt_file2}; then " \
|
||||
"echo Loaded DTB from boot/${fdt_file2}; " \
|
||||
"fi\0" \
|
||||
\
|
||||
"script=boot/6x_bootscript-ventana\0" \
|
||||
"loadscript=" \
|
||||
"if ${fsload} ${loadaddr} ${script}; then " \
|
||||
"source; " \
|
||||
"fi\0" \
|
||||
\
|
||||
"uimage=boot/uImage\0" \
|
||||
"mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
|
||||
"mmc_boot=" \
|
||||
"setenv fsload 'ext2load mmc 0:1'; " \
|
||||
"mmc dev 0 && mmc rescan && " \
|
||||
"run loadscript; " \
|
||||
"if ${fsload} ${loadaddr} ${uimage}; then " \
|
||||
"setenv bootargs console=${console},${baudrate} " \
|
||||
"root=/dev/mmcblk0p1 rootfstype=ext4 " \
|
||||
"rootwait rw ${video} ${extra}; " \
|
||||
"if run loadfdt && fdt addr ${fdt_addr}; then " \
|
||||
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||
"else " \
|
||||
"bootm; " \
|
||||
"fi; " \
|
||||
"fi\0" \
|
||||
\
|
||||
"sata_boot=" \
|
||||
"setenv fsload 'ext2load sata 0:1'; sata init && " \
|
||||
"run loadscript; " \
|
||||
"if ${fsload} ${loadaddr} ${uimage}; then " \
|
||||
"setenv bootargs console=${console},${baudrate} " \
|
||||
"root=/dev/sda1 rootfstype=ext4 " \
|
||||
"rootwait rw ${video} ${extra}; " \
|
||||
"if run loadfdt && fdt addr ${fdt_addr}; then " \
|
||||
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||
"else " \
|
||||
"bootm; " \
|
||||
"fi; " \
|
||||
"fi\0" \
|
||||
"usb_boot=" \
|
||||
"setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \
|
||||
"run loadscript; " \
|
||||
"if ${fsload} ${loadaddr} ${uimage}; then " \
|
||||
"setenv bootargs console=${console},${baudrate} " \
|
||||
"root=/dev/sda1 rootfstype=ext4 " \
|
||||
"rootwait rw ${video} ${extra}; " \
|
||||
"if run loadfdt && fdt addr ${fdt_addr}; then " \
|
||||
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||
"else " \
|
||||
"bootm; " \
|
||||
"fi; " \
|
||||
"fi\0"
|
||||
|
||||
#ifdef CONFIG_SPI_FLASH
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
CONFIG_EXTRA_ENV_SETTINGS_COMMON \
|
||||
"image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
|
||||
"image_uboot=ventana/u-boot_spi.imx\0" \
|
||||
\
|
||||
"spi_koffset=0x90000\0" \
|
||||
"spi_klen=0x200000\0" \
|
||||
\
|
||||
"spi_updateuboot=echo Updating uboot from " \
|
||||
"${serverip}:${image_uboot}...; " \
|
||||
"tftpboot ${loadaddr} ${image_uboot} && " \
|
||||
"sf probe && sf erase 0 80000 && " \
|
||||
"sf write ${loadaddr} 400 ${filesize}\0" \
|
||||
"spi_update=echo Updating OS from ${serverip}:${image_os} " \
|
||||
"to ${spi_koffset} ...; " \
|
||||
"tftp ${loadaddr} ${image_os} && " \
|
||||
"sf probe && " \
|
||||
"sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
|
||||
\
|
||||
"flash_boot=" \
|
||||
"if sf probe && " \
|
||||
"sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
|
||||
"setenv bootargs console=${console},${baudrate} " \
|
||||
"root=/dev/mtdblock3 " \
|
||||
"rootfstype=squashfs,jffs2 " \
|
||||
"${video} ${extra}; " \
|
||||
"bootm; " \
|
||||
"fi\0"
|
||||
#else
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
CONFIG_EXTRA_ENV_SETTINGS_COMMON \
|
||||
"image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
|
||||
\
|
||||
"nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
|
||||
"tftp ${loadaddr} ${image_rootfs} && " \
|
||||
"nand erase.part rootfs && " \
|
||||
"nand write ${loadaddr} rootfs ${filesize}\0" \
|
||||
\
|
||||
"flash_boot=" \
|
||||
"setenv fsload 'ubifsload'; " \
|
||||
"ubi part rootfs && ubifsmount ubi0:rootfs; " \
|
||||
"run loadscript; " \
|
||||
"if ${fsload} ${loadaddr} ${uimage}; then " \
|
||||
"setenv bootargs console=${console},${baudrate} " \
|
||||
"root=ubi0:rootfs ubi.mtd=2 " \
|
||||
"rootfstype=ubifs ${video} ${extra}; " \
|
||||
"if run loadfdt && fdt addr ${fdt_addr}; then " \
|
||||
"ubifsumount; " \
|
||||
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||
"else " \
|
||||
"ubifsumount; bootm; " \
|
||||
"fi; " \
|
||||
"fi\0"
|
||||
#endif
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"for btype in ${bootdevs}; do " \
|
||||
"echo; echo Attempting ${btype} boot...; " \
|
||||
"if run ${btype}_boot; then; fi; " \
|
||||
"done"
|
||||
|
||||
/* Device Tree Support */
|
||||
#define CONFIG_OF_BOARD_SETUP
|
||||
#define CONFIG_OF_LIBFDT
|
||||
#define CONFIG_FDT_FIXUP_PARTITIONS
|
||||
|
||||
#ifndef CONFIG_SYS_DCACHE_OFF
|
||||
#define CONFIG_CMD_CACHE
|
||||
#endif
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
@ -62,6 +62,7 @@
|
||||
/* No NOR flash present */
|
||||
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
|
||||
#define CONFIG_ENV_SIZE (8 * 1024)
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0
|
||||
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
@ -69,7 +70,7 @@
|
||||
|
||||
/* U-Boot general configuration */
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
/* Print buffer sz */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||
sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
@ -132,12 +133,104 @@
|
||||
#define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
||||
|
||||
#define CONFIG_DEFAULT_FDT_FILE "imx25-pdk.dtb"
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"script=boot.scr\0" \
|
||||
"uimage=uImage\0" \
|
||||
"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
|
||||
"image=zImage\0" \
|
||||
"console=ttymxc0\0" \
|
||||
"splashpos=m,m\0" \
|
||||
"fdt_high=0xffffffff\0" \
|
||||
"initrd_high=0xffffffff\0" \
|
||||
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
|
||||
"fdt_addr=0x82000000\0" \
|
||||
"boot_fdt=try\0" \
|
||||
"ip_dyn=yes\0" \
|
||||
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
|
||||
"mmcpart=1\0" \
|
||||
"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
|
||||
"update_sd_firmware_filename=u-boot.imx\0" \
|
||||
"update_sd_firmware=" \
|
||||
"if test ${ip_dyn} = yes; then " \
|
||||
"setenv get_cmd dhcp; " \
|
||||
"else " \
|
||||
"setenv get_cmd tftp; " \
|
||||
"fi; " \
|
||||
"if mmc dev ${mmcdev}; then " \
|
||||
"if ${get_cmd} ${update_sd_firmware_filename}; then " \
|
||||
"setexpr fw_sz ${filesize} / 0x200; " \
|
||||
"setexpr fw_sz ${fw_sz} + 1; " \
|
||||
"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
|
||||
"fi; " \
|
||||
"fi\0" \
|
||||
"mmcargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"root=${mmcroot}\0" \
|
||||
"loadbootscript=" \
|
||||
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
||||
"bootscript=echo Running bootscript from mmc ...; " \
|
||||
"source\0" \
|
||||
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
|
||||
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
|
||||
"mmcboot=echo Booting from mmc ...; " \
|
||||
"run mmcargs; " \
|
||||
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||
"if run loadfdt; then " \
|
||||
"bootz ${loadaddr} - ${fdt_addr}; " \
|
||||
"else " \
|
||||
"if test ${boot_fdt} = try; then " \
|
||||
"bootz; " \
|
||||
"else " \
|
||||
"echo WARN: Cannot load the DT; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else " \
|
||||
"bootz; " \
|
||||
"fi;\0" \
|
||||
"netargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"root=/dev/nfs " \
|
||||
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
||||
"bootcmd=run netargs; dhcp ${uimage}; bootm\0" \
|
||||
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
||||
"netboot=echo Booting from net ...; " \
|
||||
"run netargs; " \
|
||||
"if test ${ip_dyn} = yes; then " \
|
||||
"setenv get_cmd dhcp; " \
|
||||
"else " \
|
||||
"setenv get_cmd tftp; " \
|
||||
"fi; " \
|
||||
"${get_cmd} ${image}; " \
|
||||
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
|
||||
"bootz ${loadaddr} - ${fdt_addr}; " \
|
||||
"else " \
|
||||
"if test ${boot_fdt} = try; then " \
|
||||
"bootz; " \
|
||||
"else " \
|
||||
"echo WARN: Cannot load the DT; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else " \
|
||||
"bootz; " \
|
||||
"fi;\0"
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
||||
"if run loadbootscript; then " \
|
||||
"run bootscript; " \
|
||||
"else " \
|
||||
"if run loadimage; then " \
|
||||
"run mmcboot; " \
|
||||
"else run netboot; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else run netboot; fi"
|
||||
|
||||
/* Miscellaneous configurable options */
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
|
||||
/* Print Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_MAXARGS 16
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
||||
@ -612,6 +612,8 @@ struct fb_videomode {
|
||||
u32 flag;
|
||||
};
|
||||
|
||||
int board_video_skip(void);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _LINUX_FB_H */
|
||||
|
||||
@ -354,4 +354,6 @@ struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
|
||||
int mmc_legacy_init(int verbose);
|
||||
#endif
|
||||
|
||||
int board_mmc_init(bd_t *bis);
|
||||
|
||||
#endif /* _MMC_H_ */
|
||||
|
||||
@ -234,6 +234,8 @@ int phy_smsc_init(void);
|
||||
int phy_teranetics_init(void);
|
||||
int phy_vitesse_init(void);
|
||||
|
||||
int board_phy_config(struct phy_device *phydev);
|
||||
|
||||
/* PHY UIDs for various PHYs that are referenced in external code */
|
||||
#define PHY_UID_TN2020 0x00a19410
|
||||
|
||||
|
||||
96
include/power/pfuze100_pmic.h
Normal file
96
include/power/pfuze100_pmic.h
Normal file
@ -0,0 +1,96 @@
|
||||
/*
|
||||
* Copyright (C) 2014 Gateworks Corporation
|
||||
* Tim Harvey <tharvey@gateworks.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __PFUZE100_PMIC_H_
|
||||
#define __PFUZE100_PMIC_H_
|
||||
|
||||
/* PFUZE100 registers */
|
||||
enum {
|
||||
PFUZE100_DEVICEID = 0x00,
|
||||
PFUZE100_REVID = 0x03,
|
||||
PFUZE100_FABID = 0x04,
|
||||
|
||||
PFUZE100_SW1ABVOL = 0x20,
|
||||
PFUZE100_SW1CVOL = 0x2e,
|
||||
PFUZE100_SW2VOL = 0x35,
|
||||
PFUZE100_SW3AVOL = 0x3c,
|
||||
PFUZE100_SW3BVOL = 0x43,
|
||||
PFUZE100_SW4VOL = 0x4a,
|
||||
PFUZE100_SWBSTCON1 = 0x66,
|
||||
PFUZE100_VREFDDRCON = 0x6a,
|
||||
PFUZE100_VSNVSVOL = 0x6b,
|
||||
PFUZE100_VGEN1VOL = 0x6c,
|
||||
PFUZE100_VGEN2VOL = 0x6d,
|
||||
PFUZE100_VGEN3VOL = 0x6e,
|
||||
PFUZE100_VGEN4VOL = 0x6f,
|
||||
PFUZE100_VGEN5VOL = 0x70,
|
||||
PFUZE100_VGEN6VOL = 0x71,
|
||||
|
||||
PMIC_NUM_OF_REGS = 0x7f,
|
||||
};
|
||||
|
||||
/*
|
||||
* LDO Configuration
|
||||
*/
|
||||
|
||||
/* VGEN1/2 Voltage Configuration */
|
||||
#define LDOA_0_80V 0
|
||||
#define LDOA_0_85V 1
|
||||
#define LDOA_0_90V 2
|
||||
#define LDOA_0_95V 3
|
||||
#define LDOA_1_00V 4
|
||||
#define LDOA_1_05V 5
|
||||
#define LDOA_1_10V 6
|
||||
#define LDOA_1_15V 7
|
||||
#define LDOA_1_20V 8
|
||||
#define LDOA_1_25V 9
|
||||
#define LDOA_1_30V 10
|
||||
#define LDOA_1_35V 11
|
||||
#define LDOA_1_40V 12
|
||||
#define LDOA_1_45V 13
|
||||
#define LDOA_1_50V 14
|
||||
#define LDOA_1_55V 15
|
||||
|
||||
/* VGEN3/4/5/6 Voltage Configuration */
|
||||
#define LDOB_1_80V 0
|
||||
#define LDOB_1_90V 1
|
||||
#define LDOB_2_00V 2
|
||||
#define LDOB_2_10V 3
|
||||
#define LDOB_2_20V 4
|
||||
#define LDOB_2_30V 5
|
||||
#define LDOB_2_40V 6
|
||||
#define LDOB_2_50V 7
|
||||
#define LDOB_2_60V 8
|
||||
#define LDOB_2_70V 9
|
||||
#define LDOB_2_80V 10
|
||||
#define LDOB_2_90V 11
|
||||
#define LDOB_3_00V 12
|
||||
#define LDOB_3_10V 13
|
||||
#define LDOB_3_20V 14
|
||||
#define LDOB_3_30V 15
|
||||
|
||||
#define LDO_VOL_MASK 0xf
|
||||
#define LDO_EN 4
|
||||
|
||||
/*
|
||||
* Boost Regulator
|
||||
*/
|
||||
|
||||
/* SWBST Output Voltage */
|
||||
#define SWBST_5_00V 0
|
||||
#define SWBST_5_05V 1
|
||||
#define SWBST_5_10V 2
|
||||
#define SWBST_5_15V 3
|
||||
|
||||
#define SWBST_VOL_MASK 0x3
|
||||
#define SWBST_MODE_MASK 0x6
|
||||
#define SWBST_MODE_OFF (2 << 0)
|
||||
#define SWBST_MODE_PFM (2 << 1)
|
||||
#define SWBST_MODE_AUTO (2 << 2)
|
||||
#define SWBST_MODE_APS (2 << 3)
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user