From a69214dc719862b8433608d7e914e51464dfd14c Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Tue, 29 Apr 2014 14:37:56 -0700 Subject: [PATCH 001/105] video: mxc_ipuv3_fb: stash frame buffer pointer in global data. This patch updates the i.MX video driver to store the frame-buffer address in the fb_base field of the global data structure *gd. By doing this, you can find the frame buffer address using the 'bdinfo' command: U-Boot > bdinfo arch_number = 0x00000EB9 ... FB base = 0x4F35F1C0 This is very useful when debugging display connections. Signed-off-by: Eric Nelson Acked-by: Otavio Salvador Acked-by: Marek Vasut --- drivers/video/mxc_ipuv3_fb.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c index 3e21fb23067..f75d77064ea 100644 --- a/drivers/video/mxc_ipuv3_fb.c +++ b/drivers/video/mxc_ipuv3_fb.c @@ -13,6 +13,7 @@ #include #include +#include #include #include #include @@ -24,6 +25,8 @@ #include "mxcfb.h" #include "ipu_regs.h" +DECLARE_GLOBAL_DATA_PTR; + static int mxcfb_map_video_memory(struct fb_info *fbi); static int mxcfb_unmap_video_memory(struct fb_info *fbi); @@ -415,6 +418,8 @@ static int mxcfb_map_video_memory(struct fb_info *fbi) fbi->screen_size = fbi->fix.smem_len; + gd->fb_base = fbi->fix.smem_start; + /* Clear the screen */ memset((char *)fbi->screen_base, 0, fbi->fix.smem_len); From e1ae71d8f4dd8e3f366f341e8a309e95e79945a0 Mon Sep 17 00:00:00 2001 From: Thomas Diener Date: Wed, 23 Apr 2014 07:52:45 +0200 Subject: [PATCH 002/105] logos: Update of the syteco company logo Signed-off-by: Thomas Diener Signed-off-by: Anatolij Gustschin --- tools/logos/syteco.bmp | Bin 11414 -> 11414 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/tools/logos/syteco.bmp b/tools/logos/syteco.bmp index 9a994fe3e3812bdc2d63f7045d2740d931b2a42a..14031f2c8c5eaee2e961a89b684ac3c986329673 100644 GIT binary patch literal 11414 zcmeI0OOD(i5Qb^bSc;U3%p&U?AnW81xk)eQ1UXONtWyOB*Nc}y-K~+4JO&D=kDmh5 z^Xt#QAI_(r@6LTd?h~Hh@Lb$CUypzOeh&{+q5;$0xhp*P`}KOg-)^@%rcjTz^Eov* zW8kaC!1^lb(wNp&Hk>>IIef1C2#}>Ec@Wlcz9MY+T;T+f%AAT2MYgDf{X{C4<q(wd-%lT4O19R|VCB879E9D7IX+K{q}aEuX- zArOJ#7AAIPLAGjWO7(DW4SMKf%EySraLZEmO|6pS_|hnhL5_nSGVrd@6!B)>G#2|%tw1z5jv_?bQ+g_Ji--mG!N0n?uRv*l0XnSY$s5mF)=;q`I zqMUk=;D9V1EtsAiAO6&T367x1^YsXdyaER*GLs`+i0OxnhovfoFEmCf`L{hXeivZgS)u<}7-kE{?_I$T=(3E08{p z#n7YVE^m_{!yNJQoOfwk1jr}{9{aYVS}g||bgX~MzdaA?k+lB30iZKIZM>4L&+*vF^m&uoB3W0ewe00socj*7zwrA7zc=^Q_v1f*zJ*`xcs`%*@pwS;?jzeRD@&naCCtPjCEmR=eG!^ zQa#o$6?*72Za#nZ-J!3uVH0wB!+kgJR%EA9Aq12N0O(PQ6eZ z$UlR1&A~BJAO?q0Ht&BQ^&pBvVkAH;4hgb*DpU|ea%c>HA5&XnatM%u`(qfa3l0mz z0>RTB%VAF#qXYSRB?sP6xgtpp8mxKWY_v`ft;lE&fTC{zc{EXkA}`|*TXPu)+dZQZ zgA|@|G<1>F8VBm0_P&(XUdBNj6{-u)I1x zeAfRI96^!S>k$>J)NRItNOh05iELAIfp)pd)w*{-%RbN;>-EZcML*E7Dy$EK2 z$8j8R?b=?CzP9E7ul#}*K(s!AY~2{ zgq@kJTQ#USJV*tH0RpQ?tSVR84!UwXYWVjRRoIBr5JVzIL=MTiRfCLU2dUx^iU^FJ z{1KDSt&W3%NQ^#?xSH;Z($MZ;!O@pbG0K9I29A9yiP6K5&8&OnTX0Se*g#-Qz+~i0*OpRzmO&p8Kk#d&nS0HU1i=ju(U3yG{baTYZ zbK0dnB0zdMFzwrpO1&JUlOuePN-phj2GYk7Fh(fS#St;if{=@D566LV9^}}v+N=(L v-!AOjQj8HG2a<6m=FVaZmJGf;QwXdp^U*bbS~I1ozV-x>`b|atPencepjJ52 From 264e0e591bbd1c66d6bd5fb8f2438f17c3ba17ea Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 18 Apr 2014 11:15:55 -0600 Subject: [PATCH 003/105] config: enable CMD_BMP when API+LCD is enabled When both CONFIG_API and CONFIG_LCD are enabled, the API code calls lcd_display_bitmap(). That isn't compiled unless either CONFIG_CMD_BMP or CONFIG_SPLASH_SCREEN is enabled. In order to prevent build problems, have config_fallbacks.h enable CONFIG_CMD_BMP when both API and LCD are enabled. Signed-off-by: Stephen Warren Reviewed-by: Simon Glass --- include/config_fallbacks.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index e6fb47be0bd..b304a4103de 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -71,6 +71,10 @@ #define CONFIG_LIB_RAND #endif +#if defined(CONFIG_API) && defined(CONFIG_LCD) +#define CONFIG_CMD_BMP +#endif + #ifndef CONFIG_SYS_PROMPT #define CONFIG_SYS_PROMPT "=> " #endif From 1161f98db687a1cb263cbacdc7eb548a0354218d Mon Sep 17 00:00:00 2001 From: "Wu, Josh" Date: Mon, 10 Mar 2014 16:40:41 +0800 Subject: [PATCH 004/105] at91: video: atmel_hlcdfb.c: fix bad timing configuration The right correspondance between LCD margins and LCD timings is: * upper margin -> vertical back porch * lower margin -> vertical front porch * left margin -> horizontal back porch * right margin -> horizontal front porch Signed-off-by: Josh Wu --- drivers/video/atmel_hlcdfb.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c index 853303b5e53..bb4d7d8c147 100644 --- a/drivers/video/atmel_hlcdfb.c +++ b/drivers/video/atmel_hlcdfb.c @@ -128,12 +128,12 @@ void lcd_ctrl_init(void *lcdbase) value |= LCDC_LCDCFG1_HSPW(panel_info.vl_hsync_len - 1); lcdc_writel(®s->lcdc_lcdcfg1, value); - value = LCDC_LCDCFG2_VBPW(panel_info.vl_lower_margin); - value |= LCDC_LCDCFG2_VFPW(panel_info.vl_upper_margin - 1); + value = LCDC_LCDCFG2_VBPW(panel_info.vl_upper_margin); + value |= LCDC_LCDCFG2_VFPW(panel_info.vl_lower_margin - 1); lcdc_writel(®s->lcdc_lcdcfg2, value); - value = LCDC_LCDCFG3_HBPW(panel_info.vl_right_margin - 1); - value |= LCDC_LCDCFG3_HFPW(panel_info.vl_left_margin - 1); + value = LCDC_LCDCFG3_HBPW(panel_info.vl_left_margin - 1); + value |= LCDC_LCDCFG3_HFPW(panel_info.vl_right_margin - 1); lcdc_writel(®s->lcdc_lcdcfg3, value); /* Display size */ From 5146fc2b37a3098f0973b2f2339e069adfc7d272 Mon Sep 17 00:00:00 2001 From: "Jesper B. Christensen" Date: Fri, 25 Apr 2014 15:46:17 +0200 Subject: [PATCH 005/105] i2c: zynq: Fixed compilation errors when using DEBUG Signed-off-by: Jesper B. Christensen Signed-off-by: Michal Simek --- drivers/i2c/zynq_i2c.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/zynq_i2c.c b/drivers/i2c/zynq_i2c.c index f1f65131a2a..b3264af4526 100644 --- a/drivers/i2c/zynq_i2c.c +++ b/drivers/i2c/zynq_i2c.c @@ -142,7 +142,7 @@ static u32 zynq_i2c_wait(struct zynq_i2c_registers *zynq_i2c, u32 mask) break; } #ifdef DEBUG - zynq_i2c_debug_status(zynq_i2c)); + zynq_i2c_debug_status(zynq_i2c); #endif /* Clear interrupt status flags */ writel(int_status & mask, &zynq_i2c->interrupt_status); @@ -235,7 +235,7 @@ static int zynq_i2c_read(struct i2c_adapter *adap, u8 dev, uint addr, clrbits_le32(&zynq_i2c->control, ZYNQ_I2C_CONTROL_HOLD); #ifdef DEBUG - zynq_i2c_debug_status(); + zynq_i2c_debug_status(zynq_i2c); #endif return 0; } From 891655ebc14bf617e7aa2385596e7768c053cb62 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 25 Apr 2014 13:45:08 +0200 Subject: [PATCH 006/105] serial: zynq: Remove sparse warnings Warnings: drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_init' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_setbrg' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_getc' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_tstc' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_putc' was not declared. Should it be static? drivers/serial/serial_zynq.c:181:1: warning: symbol 'uart_zynq0_puts' was not declared. Should it be static? drivers/serial/serial_zynq.c:182:22: warning: symbol 'uart_zynq_serial0_device' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_init' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_setbrg' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_getc' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_tstc' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_putc' was not declared. Should it be static? drivers/serial/serial_zynq.c:184:1: warning: symbol 'uart_zynq1_puts' was not declared. Should it be static? drivers/serial/serial_zynq.c:185:22: warning: symbol 'uart_zynq_serial1_device' was not declared. Should it be static? Signed-off-by: Michal Simek --- drivers/serial/serial_zynq.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 53a8af02d64..3ce9a2731e9 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -153,17 +153,17 @@ static int uart_zynq_serial_getc(const int port) /* Multi serial device functions */ #define DECLARE_PSSERIAL_FUNCTIONS(port) \ - int uart_zynq##port##_init(void) \ + static int uart_zynq##port##_init(void) \ { return uart_zynq_serial_init(port); } \ - void uart_zynq##port##_setbrg(void) \ + static void uart_zynq##port##_setbrg(void) \ { return uart_zynq_serial_setbrg(port); } \ - int uart_zynq##port##_getc(void) \ + static int uart_zynq##port##_getc(void) \ { return uart_zynq_serial_getc(port); } \ - int uart_zynq##port##_tstc(void) \ + static int uart_zynq##port##_tstc(void) \ { return uart_zynq_serial_tstc(port); } \ - void uart_zynq##port##_putc(const char c) \ + static void uart_zynq##port##_putc(const char c) \ { uart_zynq_serial_putc(c, port); } \ - void uart_zynq##port##_puts(const char *s) \ + static void uart_zynq##port##_puts(const char *s) \ { uart_zynq_serial_puts(s, port); } /* Serial device descriptor */ @@ -179,10 +179,10 @@ static int uart_zynq_serial_getc(const int port) } DECLARE_PSSERIAL_FUNCTIONS(0); -struct serial_device uart_zynq_serial0_device = +static struct serial_device uart_zynq_serial0_device = INIT_PSSERIAL_STRUCTURE(0, "ttyPS0"); DECLARE_PSSERIAL_FUNCTIONS(1); -struct serial_device uart_zynq_serial1_device = +static struct serial_device uart_zynq_serial1_device = INIT_PSSERIAL_STRUCTURE(1, "ttyPS1"); #ifdef CONFIG_OF_CONTROL From 09865465821fd35eabedcd9f102f1d576c626ad8 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 25 Apr 2014 13:46:28 +0200 Subject: [PATCH 007/105] serial: zynq: Fix typo in suffix function name 's/zynq_serial_initalize/zynq_serial_initialize/g' serial_initialize is used by all serial drivers. Signed-off-by: Michal Simek --- drivers/serial/serial.c | 4 ++-- drivers/serial/serial_zynq.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index df05bde4610..c4fb59cfb31 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -117,7 +117,7 @@ serial_initfunc(ns16550_serial_initialize); serial_initfunc(pxa_serial_initialize); serial_initfunc(s3c24xx_serial_initialize); serial_initfunc(s5p_serial_initialize); -serial_initfunc(zynq_serial_initalize); +serial_initfunc(zynq_serial_initialize); serial_initfunc(bfin_serial_initialize); serial_initfunc(bfin_jtag_initialize); serial_initfunc(mpc512x_serial_initialize); @@ -214,7 +214,7 @@ void serial_initialize(void) bfin_serial_initialize(); bfin_jtag_initialize(); uartlite_serial_initialize(); - zynq_serial_initalize(); + zynq_serial_initialize(); au1x00_serial_initialize(); asc_serial_initialize(); jz_serial_initialize(); diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 3ce9a2731e9..1ff27d5f488 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -223,7 +223,7 @@ __weak struct serial_device *default_serial_console(void) } #endif -void zynq_serial_initalize(void) +void zynq_serial_initialize(void) { serial_register(&uart_zynq_serial0_device); serial_register(&uart_zynq_serial1_device); From 1c1c7506de1051df6d81c51a06a57be6406b534c Mon Sep 17 00:00:00 2001 From: Daniel Hellstrom Date: Thu, 8 May 2014 19:16:14 +0200 Subject: [PATCH 008/105] leon: use CONFIG_SYS_HZ to config timer prescaler Before it was hardcoded to 1000 ticks per second. Signed-off-by: Daniel Hellstrom --- arch/sparc/cpu/leon2/cpu_init.c | 17 +++++++++-------- arch/sparc/cpu/leon3/cpu_init.c | 17 +++++++++-------- 2 files changed, 18 insertions(+), 16 deletions(-) diff --git a/arch/sparc/cpu/leon2/cpu_init.c b/arch/sparc/cpu/leon2/cpu_init.c index de310fbbbb7..04d9158575f 100644 --- a/arch/sparc/cpu/leon2/cpu_init.c +++ b/arch/sparc/cpu/leon2/cpu_init.c @@ -13,6 +13,9 @@ #include +#define TIMER_BASE_CLK 1000000 +#define US_PER_TICK (1000000 / CONFIG_SYS_HZ) + DECLARE_GLOBAL_DATA_PTR; /* reset CPU (jump to 0, without reset) */ @@ -90,7 +93,7 @@ void cpu_wait_ticks(unsigned long ticks) while (get_timer(start) < ticks) ; } -/* initiate and setup timer0 interrupt to 1MHz +/* initiate and setup timer0 interrupt to configured HZ. Base clock is 1MHz. * Return irq number for timer int or a negative number for * dealing with self */ @@ -98,9 +101,9 @@ int timer_interrupt_init_cpu(void) { LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS; - /* 1ms ticks */ + /* SYS_HZ ticks per second */ leon2->Timer_Counter_1 = 0; - leon2->Timer_Reload_1 = 999; /* (((1000000 / 100) - 1)) */ + leon2->Timer_Reload_1 = (TIMER_BASE_CLK / CONFIG_SYS_HZ) - 1; leon2->Timer_Control_1 = (LEON2_TIMER_CTRL_EN | LEON2_TIMER_CTRL_RS | LEON2_TIMER_CTRL_LD); @@ -112,14 +115,12 @@ int timer_interrupt_init_cpu(void) */ unsigned long cpu_usec2ticks(unsigned long usec) { - /* timer set to 1kHz ==> 1 clk tick = 1 msec */ - if (usec < 1000) + if (usec < US_PER_TICK) return 1; - return (usec / 1000); + return usec / US_PER_TICK; } unsigned long cpu_ticks2usec(unsigned long ticks) { - /* 1tick = 1usec */ - return ticks * 1000; + return ticks * US_PER_TICK; } diff --git a/arch/sparc/cpu/leon3/cpu_init.c b/arch/sparc/cpu/leon3/cpu_init.c index 4720f42a93f..57ffa967366 100644 --- a/arch/sparc/cpu/leon3/cpu_init.c +++ b/arch/sparc/cpu/leon3/cpu_init.c @@ -14,6 +14,9 @@ #include +#define TIMER_BASE_CLK 1000000 +#define US_PER_TICK (1000000 / CONFIG_SYS_HZ) + DECLARE_GLOBAL_DATA_PTR; /* reset CPU (jump to 0, without reset) */ @@ -203,15 +206,15 @@ void cpu_wait_ticks(unsigned long ticks) while (get_timer(start) < ticks) ; } -/* initiate and setup timer0 interrupt to 1MHz +/* initiate and setup timer0 interrupt to configured HZ. Base clock is 1MHz. * Return irq number for timer int or a negative number for * dealing with self */ int timer_interrupt_init_cpu(void) { - /* 1ms ticks */ + /* SYS_HZ ticks per second */ gptimer->e[0].val = 0; - gptimer->e[0].rld = 999; /* (((1000000 / 100) - 1)) */ + gptimer->e[0].rld = (TIMER_BASE_CLK / CONFIG_SYS_HZ) - 1; gptimer->e[0].ctrl = (LEON3_GPTIMER_EN | LEON3_GPTIMER_RL | LEON3_GPTIMER_LD | LEON3_GPTIMER_IRQEN); @@ -224,14 +227,12 @@ int timer_interrupt_init_cpu(void) */ unsigned long cpu_usec2ticks(unsigned long usec) { - /* timer set to 1kHz ==> 1 clk tick = 1 msec */ - if (usec < 1000) + if (usec < US_PER_TICK) return 1; - return (usec / 1000); + return usec / US_PER_TICK; } unsigned long cpu_ticks2usec(unsigned long ticks) { - /* 1tick = 1usec */ - return ticks * 1000; + return ticks * US_PER_TICK; } From 4148b3d0dd62c71c13545d3c5374d015c23b544b Mon Sep 17 00:00:00 2001 From: Daniel Hellstrom Date: Thu, 8 May 2014 18:52:37 +0200 Subject: [PATCH 009/105] leon: implement missing get_tbclk() Without this patch SPARC/LEON does not build. Reported-by: Tom Rini Signed-off-by: Daniel Hellstrom --- arch/sparc/cpu/leon2/cpu_init.c | 5 +++++ arch/sparc/cpu/leon3/cpu_init.c | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/arch/sparc/cpu/leon2/cpu_init.c b/arch/sparc/cpu/leon2/cpu_init.c index 04d9158575f..6e07fe6bb40 100644 --- a/arch/sparc/cpu/leon2/cpu_init.c +++ b/arch/sparc/cpu/leon2/cpu_init.c @@ -110,6 +110,11 @@ int timer_interrupt_init_cpu(void) return LEON2_TIMER1_IRQNO; } +ulong get_tbclk(void) +{ + return TIMER_BASE_CLK; +} + /* * This function is intended for SHORT delays only. */ diff --git a/arch/sparc/cpu/leon3/cpu_init.c b/arch/sparc/cpu/leon3/cpu_init.c index 57ffa967366..2f41d8847bd 100644 --- a/arch/sparc/cpu/leon3/cpu_init.c +++ b/arch/sparc/cpu/leon3/cpu_init.c @@ -222,6 +222,11 @@ int timer_interrupt_init_cpu(void) return gptimer_irq; } +ulong get_tbclk(void) +{ + return TIMER_BASE_CLK; +} + /* * This function is intended for SHORT delays only. */ From fd37dac9eb37b543fb1b82a733729514a67bd801 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 25 Oct 2013 23:01:31 -0600 Subject: [PATCH 010/105] sandbox: Support 'env import' and 'env export' Adjust the code for these commands so that they work on sandbox. Signed-off-by: Simon Glass (Adjusted to fix minor merge comflict, when applied) Change-Id: I987dee6194cd5c83f82604caf894fc85e4eb71a8 --- common/cmd_nvedit.c | 31 ++++++++++++++++++------------- 1 file changed, 18 insertions(+), 13 deletions(-) diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index c53601cf745..f4e306ceba9 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -33,6 +33,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -846,7 +847,8 @@ static int do_env_export(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { char buf[32]; - char *addr, *cmd, *res; + ulong addr; + char *ptr, *cmd, *res; size_t size = 0; ssize_t len; env_t *envp; @@ -891,10 +893,11 @@ NXTARG: ; if (argc < 1) return CMD_RET_USAGE; - addr = (char *)simple_strtoul(argv[0], NULL, 16); + addr = simple_strtoul(argv[0], NULL, 16); + ptr = map_sysmem(addr, size); if (size) - memset(addr, '\0', size); + memset(ptr, '\0', size); argc--; argv++; @@ -902,7 +905,7 @@ NXTARG: ; if (sep) { /* export as text file */ len = hexport_r(&env_htab, sep, H_MATCH_KEY | H_MATCH_IDENT, - &addr, size, argc, argv); + &ptr, size, argc, argv); if (len < 0) { error("Cannot export environment: errno = %d\n", errno); return 1; @@ -913,12 +916,12 @@ NXTARG: ; return 0; } - envp = (env_t *)addr; + envp = (env_t *)ptr; if (chk) /* export as checksum protected block */ res = (char *)envp->data; else /* export as raw binary data */ - res = addr; + res = ptr; len = hexport_r(&env_htab, '\0', H_MATCH_KEY | H_MATCH_IDENT, @@ -960,7 +963,8 @@ sep_err: static int do_env_import(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - char *cmd, *addr; + ulong addr; + char *cmd, *ptr; char sep = '\n'; int chk = 0; int fmt = 0; @@ -1004,7 +1008,8 @@ static int do_env_import(cmd_tbl_t *cmdtp, int flag, if (!fmt) printf("## Warning: defaulting to text format\n"); - addr = (char *)simple_strtoul(argv[0], NULL, 16); + addr = simple_strtoul(argv[0], NULL, 16); + ptr = map_sysmem(addr, 0); if (argc == 2) { size = simple_strtoul(argv[1], NULL, 16); @@ -1012,7 +1017,7 @@ static int do_env_import(cmd_tbl_t *cmdtp, int flag, puts("## Error: external checksum format must pass size\n"); return CMD_RET_FAILURE; } else { - char *s = addr; + char *s = ptr; size = 0; @@ -1032,7 +1037,7 @@ static int do_env_import(cmd_tbl_t *cmdtp, int flag, if (chk) { uint32_t crc; - env_t *ep = (env_t *)addr; + env_t *ep = (env_t *)ptr; size -= offsetof(env_t, data); memcpy(&crc, &ep->crc, sizeof(crc)); @@ -1041,11 +1046,11 @@ static int do_env_import(cmd_tbl_t *cmdtp, int flag, puts("## Error: bad CRC, import failed\n"); return 1; } - addr = (char *)ep->data; + ptr = (char *)ep->data; } - if (himport_r(&env_htab, addr, size, sep, del ? 0 : H_NOCLEAR, - 0, NULL) == 0) { + if (himport_r(&env_htab, ptr, size, sep, del ? 0 : H_NOCLEAR, 0, + NULL) == 0) { error("Environment import failed: errno = %d\n", errno); return 1; } From 1992dbfdb9886c3dfc4a505091895c851f736f3a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 25 Oct 2013 23:01:32 -0600 Subject: [PATCH 011/105] Make 'run' use run_command_list() instead of run_command() In the case where an environment variable spans multiple lines, we should use run_command_list() so that all lines are executed. This shold be backwards compatible with existing behaviour for existing scripts. Signed-off-by: Simon Glass --- common/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/main.c b/common/main.c index e54f63b9562..9bee7bdc6b0 100644 --- a/common/main.c +++ b/common/main.c @@ -1550,7 +1550,7 @@ int do_run (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) return 1; } - if (run_command(arg, flag) != 0) + if (run_command_list(arg, -1, flag) != 0) return 1; } return 0; From ad0e4639545b0928a3673114962ee1f3e56402d7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 22 Mar 2014 17:12:58 -0600 Subject: [PATCH 012/105] sandbox: Provide a build option to avoid using SDL Some machines do not have SDL libraries installed, and it is still useful to build sandbox without LCD/keyboard support. Add an option for this, used as follows: make sandbox_config all NO_SDL=1 Signed-off-by: Simon Glass --- arch/sandbox/config.mk | 6 ++++++ include/configs/sandbox.h | 16 ++++++++++++++-- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk index e094ae2d053..c3f889fb1cb 100644 --- a/arch/sandbox/config.mk +++ b/arch/sandbox/config.mk @@ -18,3 +18,9 @@ cmd_u-boot__ = $(CC) -o $@ -T u-boot.lds \ $(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map CONFIG_ARCH_DEVICE_TREE := sandbox + +# Define this to avoid linking with SDL, which requires SDL libraries +# This can solve 'sdl-config: Command not found' errors +ifneq ($(NO_SDL),) +PLATFORM_CPPFLAGS += -DSANDBOX_NO_SDL +endif diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index fa62cb6cd5b..6bb2546eda5 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -140,8 +140,6 @@ #define CONFIG_CROS_EC #define CONFIG_CMD_CROS_EC #define CONFIG_CROS_EC_SANDBOX -#define CONFIG_KEYBOARD -#define CONFIG_CROS_EC_KEYB #define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_BOARD_LATE_INIT @@ -149,7 +147,12 @@ #define CONFIG_SOUND_SANDBOX #define CONFIG_CMD_SOUND +#ifndef SANDBOX_NO_SDL #define CONFIG_SANDBOX_SDL +#endif + +/* LCD and keyboard require SDL support */ +#ifdef CONFIG_SANDBOX_SDL #define CONFIG_LCD #define CONFIG_VIDEO_SANDBOX_SDL #define CONFIG_CMD_BMP @@ -158,9 +161,18 @@ #define CONFIG_SYS_CONSOLE_IS_IN_ENV #define LCD_BPP LCD_COLOR16 +#define CONFIG_CROS_EC_KEYB +#define CONFIG_KEYBOARD + #define CONFIG_EXTRA_ENV_SETTINGS "stdin=serial,cros-ec-keyb\0" \ "stdout=serial,lcd\0" \ "stderr=serial,lcd\0" +#else + +#define CONFIG_EXTRA_ENV_SETTINGS "stdin=serial\0" \ + "stdout=serial,lcd\0" \ + "stderr=serial,lcd\0" +#endif #define CONFIG_GZIP_COMPRESSED #define CONFIG_BZIP2 From 75b3c3aa843911f152098acf8eb551d6bb9d4f13 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 22 Mar 2014 17:12:59 -0600 Subject: [PATCH 013/105] sandbox: Update and expand the README Now that sandbox has a good base of features, the README is quite out of date. Update it, and document the new features. Signed-off-by: Simon Glass --- README | 11 ++ board/sandbox/sandbox/README.sandbox | 222 ++++++++++++++++++++++++++- 2 files changed, 226 insertions(+), 7 deletions(-) diff --git a/README b/README index b973344184f..4178987e7c8 100644 --- a/README +++ b/README @@ -264,6 +264,17 @@ e.g. "make cogent_mpc8xx_config". And also configure the cogent directory according to the instructions in cogent/README. +Sandbox Environment: +-------------------- + +U-Boot can be built natively to run on a Linux host using the 'sandbox' +board. This allows feature development which is not board- or architecture- +specific to be undertaken on a native platform. The sandbox is also used to +run some of U-Boot's tests. + +See board/sandbox/sandbox/README.sandbox for more details. + + Configuration Options: ---------------------- diff --git a/board/sandbox/sandbox/README.sandbox b/board/sandbox/sandbox/README.sandbox index 69895574ffd..529c447a5b3 100644 --- a/board/sandbox/sandbox/README.sandbox +++ b/board/sandbox/sandbox/README.sandbox @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011 The Chromium OS Authors. + * Copyright (c) 2014 The Chromium OS Authors. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -26,9 +26,168 @@ machines. Note that standalone/API support is not available at present. -The serial driver is a very simple implementation which reads and writes to -the console. It does not set the terminal into raw mode, so cursor keys and -history will not work yet. + +Basic Operation +--------------- + +To run sandbox U-Boot use something like: + + make sandbox_config all + ./u-boot + +Note: + If you get errors about 'sdl-config: Command not found' you may need to + install libsdl1.2-dev or similar to get SDL support. Alternatively you can + build sandbox without SDL (i.e. no display/keyboard support) by removing + the CONFIG_SANDBOX_SDL line in include/configs/sandbox.h or using: + + make sandbox_config all NO_SDL=1 + ./u-boot + + +U-Boot will start on your computer, showing a sandbox emulation of the serial +console: + + +U-Boot 2014.04 (Mar 20 2014 - 19:06:00) + +DRAM: 128 MiB +Using default environment + +In: serial +Out: lcd +Err: lcd +=> + +You can issue commands as your would normally. If the command you want is +not supported you can add it to include/configs/sandbox.h. + +To exit, type 'reset' or press Ctrl-C. + + +Console / LCD support +--------------------- + +Assuming that CONFIG_SANDBOX_SDL is defined when building, you can run the +sandbox with LCD and keyboard emulation, using something like: + + ./u-boot -d u-boot.dtb -l + +This will start U-Boot with a window showing the contents of the LCD. If +that window has the focus then you will be able to type commands as you +would on the console. You can adjust the display settings in the device +tree file - see arch/sandbox/dts/sandbox.dts. + + +Command-line Options +-------------------- + +Various options are available, mostly for test purposes. Use -h to see +available options. Some of these are described below. + +The terminal is normally in what is called 'raw-with-sigs' mode. This means +that you can use arrow keys for command editing and history, but if you +press Ctrl-C, U-Boot will exit instead of handling this as a keypress. + +Other options are 'raw' (so Ctrl-C is handled within U-Boot) and 'cooked' +(where the terminal is in cooked mode and cursor keys will not work, Ctrl-C +will exit). + +As mentioned above, -l causes the LCD emulation window to be shown. + +A device tree binary file can be provided with -d. If you edit the source +(it is stored at arch/sandbox/dts/sandbox.dts) you must rebuild U-Boot to +recreate the binary file. + +To execute commands directly, use the -c option. You can specify a single +command, or multiple commands separated by a semicolon, as is normal in +U-Boot. Be careful with quoting as the shall will normally process and +swallow quotes. When -c is used, U-Boot exists after the command is complete, +but you can force it to go to interactive mode instead with -i. + + +Memory Emulation +---------------- + +Memory emulation is supported, with the size set by CONFIG_SYS_SDRAM_SIZE. +The -m option can be used to read memory from a file on start-up and write +it when shutting down. This allows preserving of memory contents across +test runs. You can tell U-Boot to remove the memory file after it is read +(on start-up) with the --rm_memory option. + +To access U-Boot's emulated memory within the code, use map_sysmem(). This +function is used throughout U-Boot to ensure that emulated memory is used +rather than the U-Boot application memory. This provides memory starting +at 0 and extending to the size of the emulation. + + +Storing State +------------- + +With sandbox you can write drivers which emulate the operation of drivers on +real devices. Some of these drivers may want to record state which is +preserved across U-Boot runs. This is particularly useful for testing. For +example, the contents of a SPI flash chip should not disappear just because +U-Boot exits. + +State is stored in a device tree file in a simple format which is driver- +specific. You then use the -s option to specify the state file. Use -r to +make U-Boot read the state on start-up (otherwise it starts empty) and -w +to write it on exit (otherwise the stored state is left unchanged and any +changes U-Boot made will be lost). You can also use -n to tell U-Boot to +ignore any problems with missing state. This is useful when first running +since the state file will be empty. + +The device tree file has one node for each driver - the driver can store +whatever properties it likes in there. See 'Writing Sandbox Drivers' below +for more details on how to get drivers to read and write their state. + + +Running and Booting +------------------- + +Since there is no machine architecture, sandbox U-Boot cannot actually boot +a kernel, but it does support the bootm command. Filesystems, memory +commands, hashing, FIT images, verified boot and many other features are +supported. + +When 'bootm' runs a kernel, sandbox will exit, as U-Boot does on a real +machine. Of course in this case, no kernel is run. + +It is also possible to tell U-Boot that it has jumped from a temporary +previous U-Boot binary, with the -j option. That binary is automatically +removed by the U-Boot that gets the -j option. This allows you to write +tests which emulate the action of chain-loading U-Boot, typically used in +a situation where a second 'updatable' U-Boot is stored on your board. It +is very risky to overwrite or upgrade the only U-Boot on a board, since a +power or other failure will brick the board and require return to the +manufacturer in the case of a consumer device. + + +Supported Drivers +----------------- + +U-Boot sandbox supports these emulations: + +- Block devices +- Chrome OS EC +- GPIO +- Host filesystem (access files on the host from within U-Boot) +- Keyboard (Chrome OS) +- LCD +- Serial (for console only) +- Sound (incomplete - see sandbox_sdl_sound_init() for details) +- SPI +- SPI flash +- TPM (Trusted Platform Module) + +Notable omissions are networking and I2C. + +A wide range of commands is implemented. Filesystems which use a block +device are supported. + +Also sandbox uses generic board (CONFIG_SYS_GENERIC_BOARD) and supports +driver model (CONFIG_DM) and associated commands. SPI Emulation @@ -85,7 +244,56 @@ CONFIG_SPI_IDLE_VAL The idle value on the SPI bus -Tests ------ +Writing Sandbox Drivers +----------------------- -So far we have no tests, but when we do these will be documented here. +Generally you should put your driver in a file containing the word 'sandbox' +and put it in the same directory as other drivers of its type. You can then +implement the same hooks as the other drivers. + +To access U-Boot's emulated memory, use map_sysmem() as mentioned above. + +If your driver needs to store configuration or state (such as SPI flash +contents or emulated chip registers), you can use the device tree as +described above. Define handlers for this with the SANDBOX_STATE_IO macro. +See arch/sandbox/include/asm/state.h for documentation. In short you provide +a node name, compatible string and functions to read and write the state. +Since writing the state can expand the device tree, you may need to use +state_setprop() which does this automatically and avoids running out of +space. See existing code for examples. + + +Testing +------- + +U-Boot sandbox can be used to run various tests, mostly in the test/ +directory. These include: + + command_ut + - Unit tests for command parsing and handling + compression + - Unit tests for U-Boot's compression algorithms, useful for + security checking. It supports gzip, bzip2, lzma and lzo. + driver model + - test/dm/test-dm.sh to run these. + image + - Unit tests for images: + test/image/test-imagetools.sh - multi-file images + test/image/test-fit.py - FIT images + tracing + - test/trace/test-trace.sh tests the tracing system (see README.trace) + verified boot + - See test/vboot/vboot_test.sh for this + +If you change or enhance any of the above subsystems, you shold write or +expand a test and include it with your patch series submission. Test +coverage in U-Boot is limited, as we need to work to improve it. + +Note that many of these tests are implemented as commands which you can +run natively on your board if desired (and enabled). + +It would be useful to have a central script to run all of these. + +-- +Simon Glass +Updated 22-Mar-14 From 757f64a89ba5bb04661b3f43444ca57fa6db1132 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 20 Apr 2014 10:50:13 -0600 Subject: [PATCH 014/105] patman: Deal with 'git apply' failures correctly This sort of failure is rare, but the code to deal with it is wrong. Fix it. Signed-off-by: Simon Glass --- tools/patman/gitutil.py | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py index 5dcbaa3bd79..3ea256de2e2 100644 --- a/tools/patman/gitutil.py +++ b/tools/patman/gitutil.py @@ -11,6 +11,7 @@ import subprocess import sys import terminal +import checkpatch import settings @@ -193,6 +194,7 @@ def ApplyPatch(verbose, fname): Args: fname: filename of patch file to apply """ + col = terminal.Color() cmd = ['git', 'am', fname] pipe = subprocess.Popen(cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE) @@ -203,8 +205,8 @@ def ApplyPatch(verbose, fname): print line match = re_error.match(line) if match: - print GetWarningMsg('warning', match.group(1), int(match.group(2)), - 'Patch failed') + print checkpatch.GetWarningMsg(col, 'warning', match.group(1), + int(match.group(2)), 'Patch failed') return pipe.returncode == 0, stdout def ApplyPatches(verbose, args, start_point): From 102061bd8b0b174e1cf811dfd35641d8a9e4eba3 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 20 Apr 2014 10:50:14 -0600 Subject: [PATCH 015/105] patman: Avoid duplicate sign-offs Keep track of all Signed-off-by tags in a commit and silently suppress any duplicates. Signed-off-by: Simon Glass --- tools/patman/README | 1 + tools/patman/commit.py | 14 ++++++++++++++ tools/patman/patchstream.py | 10 ++++++++-- 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/tools/patman/README b/tools/patman/README index b3aba136b86..5fb508b80df 100644 --- a/tools/patman/README +++ b/tools/patman/README @@ -192,6 +192,7 @@ END A sign-off is added automatically to your patches (this is probably a bug). If you put this tag in your patches, it will override the default signoff that patman automatically adds. + Multiple duplicate signoffs will be removed. Tested-by: Their Name Reviewed-by: Their Name diff --git a/tools/patman/commit.py b/tools/patman/commit.py index 89cce7f88a2..3e0adb8f7e2 100644 --- a/tools/patman/commit.py +++ b/tools/patman/commit.py @@ -29,6 +29,7 @@ class Commit: self.tags = [] self.changes = {} self.cc_list = [] + self.signoff_set = set() self.notes = [] def AddChange(self, version, info): @@ -72,3 +73,16 @@ class Commit: cc_list: List of aliases or email addresses """ self.cc_list += cc_list + + def CheckDuplicateSignoff(self, signoff): + """Check a list of signoffs we have send for this patch + + Args: + signoff: Signoff line + Returns: + True if this signoff is new, False if we have already seen it. + """ + if signoff in self.signoff_set: + return False + self.signoff_set.add(signoff) + return True diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py index c4017e0e6d6..9f5682cd0f5 100644 --- a/tools/patman/patchstream.py +++ b/tools/patman/patchstream.py @@ -21,7 +21,7 @@ re_remove = re.compile('^BUG=|^TEST=|^BRANCH=|^Change-Id:|^Review URL:' re_allowed_after_test = re.compile('^Signed-off-by:') # Signoffs -re_signoff = re.compile('^Signed-off-by:') +re_signoff = re.compile('^Signed-off-by: *(.*)') # The start of the cover letter re_cover = re.compile('^Cover-letter:') @@ -159,6 +159,7 @@ class PatchStream: commit_tag_match = re_commit_tag.match(line) commit_match = re_commit.match(line) if self.is_log else None cover_cc_match = re_cover_cc.match(line) + signoff_match = re_signoff.match(line) tag_match = None if self.state == STATE_PATCH_HEADER: tag_match = re_tag.match(line) @@ -223,7 +224,7 @@ class PatchStream: if is_blank: # Blank line ends this change list self.in_change = 0 - elif line == '---' or re_signoff.match(line): + elif line == '---': self.in_change = 0 out = self.ProcessLine(line) else: @@ -272,6 +273,11 @@ class PatchStream: else: self.tags.append(line); + # Suppress duplicate signoffs + elif signoff_match: + if self.commit.CheckDuplicateSignoff(signoff_match.group(1)): + out = [line] + # Well that means this is an ordinary line else: pos = 1 From 258060905e04fe2eb509756ef3b37e23e220a2d6 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 21 Apr 2014 18:39:35 +0900 Subject: [PATCH 016/105] sandbox: move source files from board/ to arch/sandbox/ Prior to commit 33a02da0, all boards must have board/${BOARD}/ or board/${VENDOR}/${BOARD}/ directory. Now this rule is obsolete. It looks weird that sandbox defines "vendor" and "board" just for meeting the old U-Boot directory structure. Signed-off-by: Masahiro Yamada Cc: Simon Glass --- arch/sandbox/lib/Makefile | 2 +- {board/sandbox/sandbox => arch/sandbox/lib}/sandbox.c | 0 board/sandbox/sandbox/Makefile | 7 ------- boards.cfg | 2 +- {board/sandbox/sandbox => doc}/README.sandbox | 0 5 files changed, 2 insertions(+), 9 deletions(-) rename {board/sandbox/sandbox => arch/sandbox/lib}/sandbox.c (100%) delete mode 100644 board/sandbox/sandbox/Makefile rename {board/sandbox/sandbox => doc}/README.sandbox (100%) diff --git a/arch/sandbox/lib/Makefile b/arch/sandbox/lib/Makefile index 4c1a38d6bcb..6480ebfca67 100644 --- a/arch/sandbox/lib/Makefile +++ b/arch/sandbox/lib/Makefile @@ -8,4 +8,4 @@ # -obj-y += interrupts.o +obj-y += interrupts.o sandbox.o diff --git a/board/sandbox/sandbox/sandbox.c b/arch/sandbox/lib/sandbox.c similarity index 100% rename from board/sandbox/sandbox/sandbox.c rename to arch/sandbox/lib/sandbox.c diff --git a/board/sandbox/sandbox/Makefile b/board/sandbox/sandbox/Makefile deleted file mode 100644 index a0b9880d6e3..00000000000 --- a/board/sandbox/sandbox/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# Copyright (c) 2011 The Chromium OS Authors. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := sandbox.o diff --git a/boards.cfg b/boards.cfg index 983c657f544..8f5ee645968 100644 --- a/boards.cfg +++ b/boards.cfg @@ -1179,7 +1179,7 @@ Active powerpc ppc4xx - xilinx ppc405-generic Active powerpc ppc4xx - xilinx ppc405-generic xilinx-ppc405-generic_flash xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1 Ricardo Ribalda Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic_flash xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda -Active sandbox sandbox - sandbox sandbox sandbox - Simon Glass +Active sandbox sandbox - - sandbox - Simon Glass Active sh sh2 - renesas rsk7203 rsk7203 - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu Active sh sh2 - renesas rsk7264 rsk7264 - Phil Edworthy Active sh sh2 - renesas rsk7269 rsk7269 - - diff --git a/board/sandbox/sandbox/README.sandbox b/doc/README.sandbox similarity index 100% rename from board/sandbox/sandbox/README.sandbox rename to doc/README.sandbox From 097c5de5f4a64d3b121dc1dbe020f7f2545dabdb Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 21 Apr 2014 18:50:41 +0900 Subject: [PATCH 017/105] sandbox: ignore sandbox.dtb Signed-off-by: Masahiro Yamada Cc: Simon Glass Acked-by: Simon Glass --- arch/sandbox/dts/.gitignore | 1 + 1 file changed, 1 insertion(+) create mode 100644 arch/sandbox/dts/.gitignore diff --git a/arch/sandbox/dts/.gitignore b/arch/sandbox/dts/.gitignore new file mode 100644 index 00000000000..b60ed208c77 --- /dev/null +++ b/arch/sandbox/dts/.gitignore @@ -0,0 +1 @@ +*.dtb From 3e41c54ad8099951d57c3c5a0f5ebc6e8becf70c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 12 May 2014 08:54:13 -0400 Subject: [PATCH 018/105] Prepare v2014.07-rc1 Signed-off-by: Tom Rini --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 840c39b43b8..a58a5cd5c15 100644 --- a/Makefile +++ b/Makefile @@ -6,9 +6,9 @@ # VERSION = 2014 -PATCHLEVEL = 04 +PATCHLEVEL = 07 SUBLEVEL = -EXTRAVERSION = +EXTRAVERSION = -rc1 NAME = # *DOCUMENTATION* From 8e2615752ee6d5daf8ce2e1e599a0512750f24b9 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 4 Apr 2014 20:09:58 +0900 Subject: [PATCH 019/105] bd_info: remove bi_barudrate member from struct bd_info gd->bd->bi_baudrate is a copy of gd->baudrate. Since baudrate is a common feature for all architectures, keep gd->baudrate only. It is true that bi_baudrate was passed to the kernel in that structure but it was a long time ago. Signed-off-by: Masahiro Yamada Cc: Tom Rini Cc: Simon Glass Cc: Wolfgang Denk Cc: Heiko Schocher Acked-by: Michal Simek (For microblaze) --- arch/arm/include/asm/u-boot.h | 1 - arch/arm/lib/board.c | 1 - arch/avr32/include/asm/u-boot.h | 1 - arch/avr32/lib/board.c | 1 - arch/blackfin/include/asm/u-boot.h | 1 - arch/blackfin/lib/board.c | 2 -- arch/m68k/include/asm/u-boot.h | 1 - arch/m68k/lib/board.c | 1 - arch/microblaze/include/asm/u-boot.h | 1 - arch/microblaze/lib/board.c | 1 - arch/mips/include/asm/u-boot.h | 1 - arch/mips/lib/board.c | 1 - arch/nds32/include/asm/u-boot.h | 1 - arch/nds32/lib/board.c | 1 - arch/nios2/include/asm/u-boot.h | 1 - arch/nios2/lib/board.c | 1 - arch/openrisc/include/asm/u-boot.h | 1 - arch/openrisc/lib/board.c | 1 - arch/powerpc/cpu/mpc85xx/fdt.c | 2 +- arch/powerpc/include/asm/u-boot.h | 1 - arch/powerpc/lib/board.c | 1 - arch/sh/include/asm/u-boot.h | 1 - arch/sh/lib/board.c | 1 - arch/sparc/include/asm/u-boot.h | 1 - arch/sparc/lib/board.c | 1 - board/muas3001/muas3001.c | 4 +++- board/mvblue/mvblue.c | 5 ++--- common/board_f.c | 9 --------- common/cmd_bdinfo.c | 28 ++++++++++++++-------------- drivers/serial/serial.c | 10 +++------- include/asm-generic/u-boot.h | 1 - 31 files changed, 23 insertions(+), 61 deletions(-) diff --git a/arch/arm/include/asm/u-boot.h b/arch/arm/include/asm/u-boot.h index cb81232b832..43cc4946838 100644 --- a/arch/arm/include/asm/u-boot.h +++ b/arch/arm/include/asm/u-boot.h @@ -27,7 +27,6 @@ #ifndef __ASSEMBLY__ typedef struct bd_info { - unsigned int bi_baudrate; /* serial console baudrate */ ulong bi_arch_number; /* unique id for this board */ ulong bi_boot_params; /* where this board expects params */ unsigned long bi_arm_freq; /* arm frequency */ diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 92e85c4db51..9b473b5eaba 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -445,7 +445,6 @@ void board_init_f(ulong bootflag) post_run(NULL, POST_ROM | post_bootmode_get(0)); #endif - gd->bd->bi_baudrate = gd->baudrate; /* Ram ist board specific, so move it to board code ... */ dram_init_banksize(); display_dram_config(); /* and display it */ diff --git a/arch/avr32/include/asm/u-boot.h b/arch/avr32/include/asm/u-boot.h index bff17d5ed26..6aef8087490 100644 --- a/arch/avr32/include/asm/u-boot.h +++ b/arch/avr32/include/asm/u-boot.h @@ -7,7 +7,6 @@ #define __ASM_U_BOOT_H__ 1 typedef struct bd_info { - unsigned int bi_baudrate; unsigned char bi_phy_id[4]; unsigned long bi_board_number; void *bi_boot_params; diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c index 28c2ec09efd..7680102f523 100644 --- a/arch/avr32/lib/board.c +++ b/arch/avr32/lib/board.c @@ -220,7 +220,6 @@ void board_init_f(ulong board_type) */ bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; bd->bi_dram[0].size = sdram_size; - bd->bi_baudrate = gd->baudrate; memcpy(new_gd, gd, sizeof(gd_t)); diff --git a/arch/blackfin/include/asm/u-boot.h b/arch/blackfin/include/asm/u-boot.h index fc36ced519e..acaeee9053e 100644 --- a/arch/blackfin/include/asm/u-boot.h +++ b/arch/blackfin/include/asm/u-boot.h @@ -13,7 +13,6 @@ #define _U_BOOT_H_ 1 typedef struct bd_info { - unsigned int bi_baudrate; /* serial console baudrate */ unsigned long bi_boot_params; /* where this board expects params */ unsigned long bi_memstart; /* start of DRAM memory */ phys_size_t bi_memsize; /* size of DRAM memory in bytes */ diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c index 62342014a47..87842557dfd 100644 --- a/arch/blackfin/lib/board.c +++ b/arch/blackfin/lib/board.c @@ -69,7 +69,6 @@ static int display_banner(void) static int init_baudrate(void) { gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); - gd->bd->bi_baudrate = gd->baudrate; return 0; } @@ -92,7 +91,6 @@ static void display_global_data(void) printf(" |-env_valid: %lx\n", gd->env_valid); printf(" |-jt(%p): %p\n", gd->jt, *(gd->jt)); printf(" \\-bd: %p\n", gd->bd); - printf(" |-bi_baudrate: %x\n", bd->bi_baudrate); printf(" |-bi_boot_params: %lx\n", bd->bi_boot_params); printf(" |-bi_memstart: %lx\n", bd->bi_memstart); printf(" |-bi_memsize: %lx\n", bd->bi_memsize); diff --git a/arch/m68k/include/asm/u-boot.h b/arch/m68k/include/asm/u-boot.h index 99de31aff5f..983cb2d9671 100644 --- a/arch/m68k/include/asm/u-boot.h +++ b/arch/m68k/include/asm/u-boot.h @@ -44,7 +44,6 @@ typedef struct bd_info { unsigned long bi_vcofreq; /* vco Freq in MHz */ unsigned long bi_flbfreq; /* Flexbus Freq in MHz */ #endif - unsigned int bi_baudrate; /* Console Baudrate */ } bd_t; #endif /* __ASSEMBLY__ */ diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c index e75b6a98dd5..318ca01ea7f 100644 --- a/arch/m68k/lib/board.c +++ b/arch/m68k/lib/board.c @@ -342,7 +342,6 @@ board_init_f (ulong bootflag) bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ #endif - bd->bi_baudrate = gd->baudrate; /* Console Baudrate */ #ifdef CONFIG_SYS_EXTBDINFO strncpy (bd->bi_s_version, "1.2", sizeof (bd->bi_s_version)); diff --git a/arch/microblaze/include/asm/u-boot.h b/arch/microblaze/include/asm/u-boot.h index ab3f23202d6..54d415ebb5b 100644 --- a/arch/microblaze/include/asm/u-boot.h +++ b/arch/microblaze/include/asm/u-boot.h @@ -24,7 +24,6 @@ typedef struct bd_info { unsigned long bi_flashoffset; /* reserved area for startup monitor */ unsigned long bi_sramstart; /* start of SRAM memory */ unsigned long bi_sramsize; /* size of SRAM memory */ - unsigned int bi_baudrate; /* Console Baudrate */ ulong bi_boot_params; /* where this board expects params */ } bd_t; diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index fafeeaebd63..600c80ab766 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -78,7 +78,6 @@ void board_init_f(ulong not_used) memset((void *)bd, 0, GENERATED_BD_INFO_SIZE); gd->bd = bd; gd->baudrate = CONFIG_BAUDRATE; - bd->bi_baudrate = CONFIG_BAUDRATE; bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ diff --git a/arch/mips/include/asm/u-boot.h b/arch/mips/include/asm/u-boot.h index 0eb170ded8e..4909a2a5c4b 100644 --- a/arch/mips/include/asm/u-boot.h +++ b/arch/mips/include/asm/u-boot.h @@ -23,7 +23,6 @@ #else /* !CONFIG_SYS_GENERIC_BOARD */ typedef struct bd_info { - unsigned int bi_baudrate; /* serial console baudrate */ unsigned long bi_arch_number; /* unique id for this board */ unsigned long bi_boot_params; /* where this board expects params */ unsigned long bi_memstart; /* start of DRAM memory */ diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c index 3200d87e30a..3feb0207120 100644 --- a/arch/mips/lib/board.c +++ b/arch/mips/lib/board.c @@ -204,7 +204,6 @@ void board_init_f(ulong bootflag) */ bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM */ bd->bi_memsize = gd->ram_size; /* size of DRAM in bytes */ - bd->bi_baudrate = gd->baudrate; /* Console Baudrate */ memcpy(id, (void *)gd, sizeof(gd_t)); diff --git a/arch/nds32/include/asm/u-boot.h b/arch/nds32/include/asm/u-boot.h index 8170d28f7c2..44e72d414b9 100644 --- a/arch/nds32/include/asm/u-boot.h +++ b/arch/nds32/include/asm/u-boot.h @@ -23,7 +23,6 @@ #include typedef struct bd_info { - unsigned int bi_baudrate; /* serial console baudrate */ unsigned long bi_arch_number; /* unique id for this board */ unsigned long bi_boot_params; /* where this board expects params */ unsigned long bi_memstart; /* start of DRAM memory */ diff --git a/arch/nds32/lib/board.c b/arch/nds32/lib/board.c index 2d4c6231a37..4c06a4866b1 100644 --- a/arch/nds32/lib/board.c +++ b/arch/nds32/lib/board.c @@ -255,7 +255,6 @@ void board_init_f(ulong bootflag) addr_sp &= ~0x07; debug("New Stack Pointer is: %08lx\n", addr_sp); - gd->bd->bi_baudrate = gd->baudrate; /* Ram isn't board specific, so move it to board code ... */ dram_init_banksize(); display_dram_config(); /* and display it */ diff --git a/arch/nios2/include/asm/u-boot.h b/arch/nios2/include/asm/u-boot.h index 6849b4ae9f2..51f6c30ef76 100644 --- a/arch/nios2/include/asm/u-boot.h +++ b/arch/nios2/include/asm/u-boot.h @@ -23,7 +23,6 @@ typedef struct bd_info { unsigned long bi_flashoffset; /* reserved area for startup monitor */ unsigned long bi_sramstart; /* start of SRAM memory */ unsigned long bi_sramsize; /* size of SRAM memory */ - unsigned int bi_baudrate; /* Console Baudrate */ } bd_t; /* For image.h:image_check_target_arch() */ diff --git a/arch/nios2/lib/board.c b/arch/nios2/lib/board.c index bb1a8a73407..f24218ff1c1 100644 --- a/arch/nios2/lib/board.c +++ b/arch/nios2/lib/board.c @@ -92,7 +92,6 @@ void board_init(void) bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; #endif - bd->bi_baudrate = CONFIG_BAUDRATE; for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { WATCHDOG_RESET(); diff --git a/arch/openrisc/include/asm/u-boot.h b/arch/openrisc/include/asm/u-boot.h index 5c288a85ffc..cdb8ff996ed 100644 --- a/arch/openrisc/include/asm/u-boot.h +++ b/arch/openrisc/include/asm/u-boot.h @@ -16,7 +16,6 @@ #define _U_BOOT_H_ typedef struct bd_info { - unsigned int bi_baudrate; /* serial console baudrate */ unsigned long bi_arch_number; /* unique id for this board */ unsigned long bi_boot_params; /* where this board expects params */ unsigned long bi_memstart; /* start of DRAM memory */ diff --git a/arch/openrisc/lib/board.c b/arch/openrisc/lib/board.c index 391d1e19c51..234668538ca 100644 --- a/arch/openrisc/lib/board.c +++ b/arch/openrisc/lib/board.c @@ -84,7 +84,6 @@ void board_init(void) bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; #endif - bd->bi_baudrate = CONFIG_BAUDRATE; for (i = 0; i < ARRAY_SIZE(init_sequence); i++) { WATCHDOG_RESET(); diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 0cc21c7f680..ed80a841804 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -674,7 +674,7 @@ void ft_cpu_setup(void *blob, bd_t *bd) #ifdef CONFIG_CPM2 do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart", - "current-speed", bd->bi_baudrate, 1); + "current-speed", gd->baudrate, 1); do_fixup_by_compat_u32(blob, "fsl,cpm2-brg", "clock-frequency", bd->bi_brgfreq, 1); diff --git a/arch/powerpc/include/asm/u-boot.h b/arch/powerpc/include/asm/u-boot.h index f4d4a6b3003..e1b566fa568 100644 --- a/arch/powerpc/include/asm/u-boot.h +++ b/arch/powerpc/include/asm/u-boot.h @@ -64,7 +64,6 @@ typedef struct bd_info { unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ #endif - unsigned int bi_baudrate; /* Console Baudrate */ #if defined(CONFIG_405) || \ defined(CONFIG_405GP) || \ defined(CONFIG_405EP) || \ diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 8b03d3aa07b..57b4a09b04e 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -547,7 +547,6 @@ void board_init_f(ulong bootflag) bd->bi_ipbfreq = gd->arch.ipb_clk; bd->bi_pcifreq = gd->pci_clk; #endif /* CONFIG_MPC5xxx */ - bd->bi_baudrate = gd->baudrate; /* Console Baudrate */ #ifdef CONFIG_SYS_EXTBDINFO strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); diff --git a/arch/sh/include/asm/u-boot.h b/arch/sh/include/asm/u-boot.h index 81d51612824..ea37c244970 100644 --- a/arch/sh/include/asm/u-boot.h +++ b/arch/sh/include/asm/u-boot.h @@ -20,7 +20,6 @@ typedef struct bd_info { unsigned long bi_flashoffset; /* reserved area for startup monitor */ unsigned long bi_sramstart; /* start of SRAM memory */ unsigned long bi_sramsize; /* size of SRAM memory */ - unsigned int bi_baudrate; /* Console Baudrate */ unsigned long bi_boot_params; /* where this board expects params */ } bd_t; diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c index 8498153d4ea..1eb7afb89e5 100644 --- a/arch/sh/lib/board.c +++ b/arch/sh/lib/board.c @@ -155,7 +155,6 @@ void sh_generic_init(void) bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; #endif - bd->bi_baudrate = CONFIG_BAUDRATE; for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { WATCHDOG_RESET(); diff --git a/arch/sparc/include/asm/u-boot.h b/arch/sparc/include/asm/u-boot.h index 66cf4b023d6..5f12e581316 100644 --- a/arch/sparc/include/asm/u-boot.h +++ b/arch/sparc/include/asm/u-boot.h @@ -40,7 +40,6 @@ typedef struct bd_info { unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ unsigned long bi_intfreq; /* Internal Freq, in MHz */ unsigned long bi_busfreq; /* Bus Freq, in MHz */ - unsigned int bi_baudrate; /* Console Baudrate */ } bd_t; #endif /* __ASSEMBLY__ */ diff --git a/arch/sparc/lib/board.c b/arch/sparc/lib/board.c index c778ba26e73..b311a946c05 100644 --- a/arch/sparc/lib/board.c +++ b/arch/sparc/lib/board.c @@ -173,7 +173,6 @@ void board_init_f(ulong bootflag) bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; #endif - bd->bi_baudrate = CONFIG_BAUDRATE; bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */ gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ diff --git a/board/muas3001/muas3001.c b/board/muas3001/muas3001.c index 42b0a035c7d..08eb5e82903 100644 --- a/board/muas3001/muas3001.c +++ b/board/muas3001/muas3001.c @@ -286,6 +286,8 @@ int board_early_init_r (void) } #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) +DECLARE_GLOBAL_DATA_PTR; + /* * update "memory" property in the blob */ @@ -314,7 +316,7 @@ void ft_blob_update (void *blob, bd_t *bd) /* baudrate */ nodeoffset = fdt_path_offset (blob, "/soc/cpm/serial"); if (nodeoffset >= 0) { - speed = cpu_to_be32 (bd->bi_baudrate); + speed = cpu_to_be32 (gd->baudrate); ret = fdt_setprop (blob, nodeoffset, "current-speed", &speed, sizeof (unsigned long)); if (ret < 0) diff --git a/board/mvblue/mvblue.c b/board/mvblue/mvblue.c index 69abb06251e..63503e89da1 100644 --- a/board/mvblue/mvblue.c +++ b/board/mvblue/mvblue.c @@ -58,7 +58,6 @@ int checkboard (void) u32 BoardType = get_BoardType (); char *BoardName[2] = { "mvBlueBOX", "mvBlueLYNX" }; char *p; - bd_t *bd = gd->bd; hw_watchdog_reset (); @@ -71,8 +70,8 @@ int checkboard (void) if ((p = getenv ("console_nr")) != NULL) { unsigned long con_nr = simple_strtoul (p, NULL, 10) & 3; - bd->bi_baudrate &= ~3; - bd->bi_baudrate |= con_nr & 3; + gd->baudrate &= ~3; + gd->baudrate |= con_nr & 3; } return 0; } diff --git a/common/board_f.c b/common/board_f.c index cbdf06f812e..aea6bff5551 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -708,14 +708,6 @@ static int init_post(void) } #endif -static int setup_baud_rate(void) -{ - /* Ick, can we get rid of this line? */ - gd->bd->bi_baudrate = gd->baudrate; - - return 0; -} - static int setup_dram_config(void) { /* Ram is board specific, so move it to board code ... */ @@ -954,7 +946,6 @@ static init_fnc_t init_sequence_f[] = { INIT_FUNC_WATCHDOG_RESET setup_board_part2, #endif - setup_baud_rate, display_new_sp, #ifdef CONFIG_SYS_EXTBDINFO setup_board_extra, diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index 238cadb1e1f..f283a1616e9 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -148,7 +148,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_mhz("ethspeed", bd->bi_ethspeed); #endif printf("IP addr = %s\n", getenv("ipaddr")); - printf("baudrate = %6u bps\n", bd->bi_baudrate); + printf("baudrate = %6u bps\n", gd->baudrate); print_num("relocaddr", gd->relocaddr); board_detail(); return 0; @@ -176,7 +176,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %u bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", gd->baudrate); return 0; } @@ -198,7 +198,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #if defined(CONFIG_CMD_NET) print_eths(); #endif - printf("baudrate = %u bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", gd->baudrate); return 0; } @@ -231,7 +231,7 @@ int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %6u bps\n", bd->bi_baudrate); + printf("baudrate = %6u bps\n", gd->baudrate); return 0; } @@ -277,7 +277,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %u bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", gd->baudrate); return 0; } @@ -304,7 +304,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); - printf("baudrate = %u bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", gd->baudrate); return 0; } @@ -324,7 +324,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); - printf("baudrate = %u bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", gd->baudrate); return 0; } @@ -344,7 +344,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); - printf("baudrate = %u bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", gd->baudrate); return 0; } @@ -368,7 +368,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #if defined(CONFIG_CMD_NET) print_eths(); #endif - printf("baudrate = %u bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", gd->baudrate); #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) print_num("TLB addr", gd->arch.tlb_addr); #endif @@ -406,7 +406,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %u bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", gd->baudrate); return 0; } @@ -440,7 +440,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("ip_addr = %s\n", getenv("ipaddr")); print_mhz("ethspeed", bd->bi_ethspeed); #endif - printf("baudrate = %u bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", gd->baudrate); return 0; } @@ -490,7 +490,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %u bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", gd->baudrate); return 0; } @@ -512,7 +512,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %u bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", gd->baudrate); return 0; } @@ -530,7 +530,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %d bps\n", bd->bi_baudrate); + printf("baudrate = %d bps\n", gd->baudrate); return 0; } diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index c4fb59cfb31..fd61a5e5458 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -74,9 +74,6 @@ static int on_baudrate(const char *name, const char *value, enum env_op op, } gd->baudrate = baudrate; -#if defined(CONFIG_PPC) || defined(CONFIG_MCF52x2) - gd->bd->bi_baudrate = baudrate; -#endif serial_setbrg(); @@ -502,12 +499,11 @@ int uart_post_test(int flags) unsigned char c; int ret, saved_baud, b; struct serial_device *saved_dev, *s; - bd_t *bd = gd->bd; /* Save current serial state */ ret = 0; saved_dev = serial_current; - saved_baud = bd->bi_baudrate; + saved_baud = gd->baudrate; for (s = serial_devices; s; s = s->next) { /* If this driver doesn't support loop back, skip it */ @@ -530,7 +526,7 @@ int uart_post_test(int flags) /* Test every available baud rate */ for (b = 0; b < ARRAY_SIZE(bauds); ++b) { - bd->bi_baudrate = bauds[b]; + gd->baudrate = bauds[b]; serial_setbrg(); /* @@ -572,7 +568,7 @@ int uart_post_test(int flags) done: /* Restore previous serial state */ serial_current = saved_dev; - bd->bi_baudrate = saved_baud; + gd->baudrate = saved_baud; serial_reinit_all(); serial_setbrg(); diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h index c18e4ca27a3..62cb1eabc1f 100644 --- a/include/asm-generic/u-boot.h +++ b/include/asm-generic/u-boot.h @@ -66,7 +66,6 @@ typedef struct bd_info { unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ #endif - unsigned int bi_baudrate; /* Console Baudrate */ #if defined(CONFIG_405) || \ defined(CONFIG_405GP) || \ defined(CONFIG_405EP) || \ From 8abd053cf07a1e4264d59c671e05a602fc7a31ad Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 8 Apr 2014 11:12:46 +0900 Subject: [PATCH 020/105] fs: fat: Fix cache align error message in fatwrite Use of malloc of do_fat_write() causes cache error on ARM v7 platforms. Perhaps, the same problem will occur at any other CPUs. This replaces malloc with memalign to fix cache buffer alignment. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Yoshiyuki Ito Tested-by: Hector Palacios --- fs/fat/fat_write.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index 9f5e9118522..cef138ec965 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -952,7 +952,7 @@ static int do_fat_write(const char *filename, void *buffer, } mydata->fatbufnum = -1; - mydata->fatbuf = malloc(FATBUFSIZE); + mydata->fatbuf = memalign(ARCH_DMA_MINALIGN, FATBUFSIZE); if (mydata->fatbuf == NULL) { debug("Error: allocating memory\n"); return -1; From d57dee5787ad96d2c80bf36f443276592d39ee21 Mon Sep 17 00:00:00 2001 From: "Karicheri, Muralidharan" Date: Wed, 9 Apr 2014 15:38:46 -0400 Subject: [PATCH 021/105] serial: nsl16550: add hw flow control support keystone serial hw support hw flow control. This patch enables hw flow control for keystone EVMs as an optional feature based on CONFIG_SERIAL_HW_FLOW_CONTROL. Signed-off-by: Murali Karicheri --- README | 4 ++++ drivers/serial/ns16550.c | 6 ++++++ include/ns16550.h | 1 + 3 files changed, 11 insertions(+) diff --git a/README b/README index 80a1bfaad2a..61c2caca316 100644 --- a/README +++ b/README @@ -751,6 +751,10 @@ The following options need to be configured: boot loader that has already initialized the UART. Define this variable to flush the UART at init time. + CONFIG_SERIAL_HW_FLOW_CONTROL + + Define this variable to enable hw flow control in serial driver. + Current user of this option is drivers/serial/nsl16550.c driver - Console Interface: Depending on board, define exactly one serial port diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 8a134549433..f26979dbe15 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -33,6 +33,12 @@ #if defined(CONFIG_K2HK_EVM) #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) +#undef UART_MCRVAL +#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL +#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) +#else +#define UART_MCRVAL (UART_MCR_RTS) +#endif #endif #ifndef CONFIG_SYS_NS16550_IER diff --git a/include/ns16550.h b/include/ns16550.h index 51cb5b4a66d..17f829f6f9b 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -100,6 +100,7 @@ typedef struct NS16550 *NS16550_t; #define UART_MCR_OUT1 0x04 /* Out 1 */ #define UART_MCR_OUT2 0x08 /* Out 2 */ #define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ +#define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS */ #define UART_MCR_DMA_EN 0x04 #define UART_MCR_TX_DFR 0x08 From 02aa4c538838edc918ff4e7e9e4121259552ef70 Mon Sep 17 00:00:00 2001 From: Xiaobo Xie Date: Fri, 11 Apr 2014 16:03:11 +0800 Subject: [PATCH 022/105] AR8035/phy: Enable autonegotiation function for ar8035 Function "genphy_parse_link()" used "if (mii_reg & BMSR_ANEGCAPABLE)" before, but used "if (phydev->supported & SUPPORTED_Autoneg)" now. So assign "phydev->supported" to "phydev->drv->features" for ar8035 to enable autonegotiation. Then removed the genphy_config_aneg() function. Signed-off-by: Xie Xiaobo --- drivers/net/phy/atheros.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index abd4e5b463e..d509e30d359 100644 --- a/drivers/net/phy/atheros.c +++ b/drivers/net/phy/atheros.c @@ -31,9 +31,7 @@ static int ar8035_config(struct phy_device *phydev) regval = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, (regval|0x0100)); - genphy_config_aneg(phydev); - - phy_reset(phydev); + phydev->supported = phydev->drv->features; return 0; } From 597fe041a85fe3b1bf6044adf5e132f7a5457000 Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Fri, 11 Apr 2014 16:14:17 +0800 Subject: [PATCH 023/105] net/phy: enable get_phy_id redefinable As some PHYs have non-standard PHY ID registers, PHY Id can't be read correctly by current get_phy_id function, so we enable get_phy_id redefinable to permit specific PHY driver having own specific get_phy_id function. Signed-off-by: Shengzhou Liu --- drivers/net/phy/phy.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index c691fbbbc61..230ed97dd12 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -18,6 +18,7 @@ #include #include #include +#include /* Generic PHY support and helper functions */ @@ -577,7 +578,7 @@ static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, * Description: Reads the ID registers of the PHY at @addr on the * @bus, stores it in @phy_id and returns zero on success. */ -static int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) +int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) { int phy_reg; From 1d64377177d802436329d54b69183a9ca0d33247 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 18 Apr 2014 17:46:13 +0900 Subject: [PATCH 024/105] cmd_time: do not show ticks The command "time" shows the execution time of the command given to the argument, like this: time: 45.293 seconds, 45293 ticks Since we adopted CONFIG_SYS_HZ = 1000 for all boards, we always have a simple formula: "1 tick = 0.0001 second". Showing ticks looks almost redundant. Signed-off-by: Masahiro Yamada --- common/cmd_time.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/common/cmd_time.c b/common/cmd_time.c index 5180cb46a87..de57e3b9dd5 100644 --- a/common/cmd_time.c +++ b/common/cmd_time.c @@ -21,8 +21,7 @@ static void report_time(ulong cycles) printf("\ntime:"); if (minutes) printf(" %lu minutes,", minutes); - printf(" %lu.%03lu seconds, %lu ticks\n", - seconds, milliseconds, cycles); + printf(" %lu.%03lu seconds\n", seconds, milliseconds); } static int do_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) From c85bb5a01a5a87c4937665816b17e281f9552413 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 18 Apr 2014 19:09:47 +0900 Subject: [PATCH 025/105] rand: do not surround function declarations by #ifdef Signed-off-by: Masahiro Yamada --- include/common.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/common.h b/include/common.h index 5fb0bb2d3d4..2adf5f90b8c 100644 --- a/include/common.h +++ b/include/common.h @@ -820,12 +820,10 @@ char * strmhz(char *buf, unsigned long hz); #include /* lib/rand.c */ -#if defined(CONFIG_LIB_RAND) || defined(CONFIG_LIB_HW_RAND) #define RAND_MAX -1U void srand(unsigned int seed); unsigned int rand(void); unsigned int rand_r(unsigned int *seedp); -#endif /* common/console.c */ int console_init_f(void); /* Before relocation; uses the serial stuff */ From da384a9d7628c77140023e7c095f79ecfe5a4e2d Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 18 Apr 2014 19:09:48 +0900 Subject: [PATCH 026/105] net: rename and refactor eth_rand_ethaddr() function Some functions in include/net.h are ported from include/linux/etherdevice.h of Linux Kernel. For ex. is_zero_ether_addr() is_multicast_ether_addr() is_broadcast_ether_addr() is_valid_ether_addr(); So, we should use the same function name as that of Linux Kernel, eth_rand_addr(), for consistency. Besides, eth_rand_addr() has been implemented as an inline function. So it should not be surrounded by #ifdef CONFIG_RANDOM_MACADDR. Signed-off-by: Masahiro Yamada Acked-by: Joe Hershberger --- board/buffalo/lsxl/lsxl.c | 2 +- drivers/net/dm9000x.c | 2 +- drivers/net/ftmac110.c | 2 +- include/net.h | 36 +++++++++++++++++++----------------- net/eth.c | 22 ---------------------- 5 files changed, 22 insertions(+), 42 deletions(-) diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c index eca1683a6fe..659a124b227 100644 --- a/board/buffalo/lsxl/lsxl.c +++ b/board/buffalo/lsxl/lsxl.c @@ -231,7 +231,7 @@ static void rescue_mode(void) printf("Entering rescue mode..\n"); #ifdef CONFIG_RANDOM_MACADDR if (!eth_getenv_enetaddr("ethaddr", enetaddr)) { - eth_random_enetaddr(enetaddr); + eth_random_addr(enetaddr); if (eth_setenv_enetaddr("ethaddr", enetaddr)) { printf("Failed to set ethernet address\n"); set_led(LED_ALARM_BLINKING); diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c index b68d808c742..4de9d41642e 100644 --- a/drivers/net/dm9000x.c +++ b/drivers/net/dm9000x.c @@ -345,7 +345,7 @@ static int dm9000_init(struct eth_device *dev, bd_t *bd) if (!is_valid_ether_addr(dev->enetaddr)) { #ifdef CONFIG_RANDOM_MACADDR printf("Bad MAC address (uninitialized EEPROM?), randomizing\n"); - eth_random_enetaddr(dev->enetaddr); + eth_random_addr(dev->enetaddr); printf("MAC: %pM\n", dev->enetaddr); #else printf("WARNING: Bad MAC address (uninitialized EEPROM?)\n"); diff --git a/drivers/net/ftmac110.c b/drivers/net/ftmac110.c index 8eee272cf14..98c4f09629b 100644 --- a/drivers/net/ftmac110.c +++ b/drivers/net/ftmac110.c @@ -425,7 +425,7 @@ int ftmac110_initialize(bd_t *bis) dev->recv = ftmac110_recv; if (!eth_getenv_enetaddr_by_index("eth", card_nr, dev->enetaddr)) - eth_random_enetaddr(dev->enetaddr); + eth_random_addr(dev->enetaddr); /* allocate tx descriptors (it must be 16 bytes aligned) */ chip->txd = dma_alloc_coherent( diff --git a/include/net.h b/include/net.h index 0802fad8761..735b0b9d26f 100644 --- a/include/net.h +++ b/include/net.h @@ -130,23 +130,6 @@ extern int eth_setenv_enetaddr(char *name, const uchar *enetaddr); extern int eth_getenv_enetaddr_by_index(const char *base_name, int index, uchar *enetaddr); -#ifdef CONFIG_RANDOM_MACADDR -/* - * The u-boot policy does not allow hardcoded ethernet addresses. Under the - * following circumstances a random generated address is allowed: - * - in emergency cases, where you need a working network connection to set - * the ethernet address. - * Eg. you want a rescue boot and don't have a serial port to access the - * CLI to set environment variables. - * - * In these cases, we generate a random locally administered ethernet address. - * - * Args: - * enetaddr - returns 6 byte hardware address - */ -extern void eth_random_enetaddr(uchar *enetaddr); -#endif - extern int usb_eth_initialize(bd_t *bi); extern int eth_init(bd_t *bis); /* Initialize the device */ extern int eth_send(void *packet, int length); /* Send a packet */ @@ -674,6 +657,25 @@ static inline int is_valid_ether_addr(const u8 *addr) return !is_multicast_ether_addr(addr) && !is_zero_ether_addr(addr); } +/** + * eth_random_addr - Generate software assigned random Ethernet address + * @addr: Pointer to a six-byte array containing the Ethernet address + * + * Generate a random Ethernet address (MAC) that is not multicast + * and has the local assigned bit set. + */ +static inline void eth_random_addr(uchar *addr) +{ + int i; + unsigned int seed = get_timer(0); + + for (i = 0; i < 6; i++) + addr[i] = rand_r(&seed); + + addr[0] &= 0xfe; /* clear multicast bit */ + addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ +} + /* Convert an IP address to a string */ extern void ip_to_string(IPaddr_t x, char *s); diff --git a/net/eth.c b/net/eth.c index 32bd10c8290..99386e3e631 100644 --- a/net/eth.c +++ b/net/eth.c @@ -63,28 +63,6 @@ static int eth_mac_skip(int index) return ((skip_state = getenv(enetvar)) != NULL); } -#ifdef CONFIG_RANDOM_MACADDR -void eth_random_enetaddr(uchar *enetaddr) -{ - uint32_t rval; - - srand(get_timer(0)); - - rval = rand(); - enetaddr[0] = rval & 0xff; - enetaddr[1] = (rval >> 8) & 0xff; - enetaddr[2] = (rval >> 16) & 0xff; - - rval = rand(); - enetaddr[3] = rval & 0xff; - enetaddr[4] = (rval >> 8) & 0xff; - enetaddr[5] = (rval >> 16) & 0xff; - - /* make sure it's local and unicast */ - enetaddr[0] = (enetaddr[0] | 0x02) & ~0x01; -} -#endif - /* * CPU and board-specific Ethernet initializations. Aliased function * signals caller to move on From c42f56d96d1ec642496ee0fdf741dc13fbbec2e2 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 18 Apr 2014 19:09:49 +0900 Subject: [PATCH 027/105] blackfin: replace bfin_gen_rand_mac() with eth_random_addr() bfin_gen_rand_mac() uses __DATE__ as the seed for random ethernet address. This makes the build non-deterministic. In the first place, it should not be implemented as a Bfin-specific function. Use eth_random_addr() instead. Signed-off-by: Masahiro Yamada Cc: Sonic Zhang --- arch/blackfin/include/asm/net.h | 28 --------------------------- board/bct-brettl2/bct-brettl2.c | 3 +-- board/bf518f-ezbrd/bf518f-ezbrd.c | 3 +-- board/bf526-ezbrd/bf526-ezbrd.c | 3 +-- board/bf527-ezkit/bf527-ezkit.c | 3 +-- board/bf537-minotaur/bf537-minotaur.c | 3 +-- board/bf537-pnav/bf537-pnav.c | 3 +-- board/bf537-srv1/bf537-srv1.c | 3 +-- board/bf537-stamp/bf537-stamp.c | 3 +-- board/cm-bf527/cm-bf527.c | 3 +-- board/cm-bf537e/cm-bf537e.c | 3 +-- board/cm-bf537u/cm-bf537u.c | 3 +-- board/dnp5370/dnp5370.c | 3 +-- board/ip04/ip04.c | 3 +-- board/tcm-bf518/tcm-bf518.c | 3 +-- board/tcm-bf537/tcm-bf537.c | 3 +-- include/configs/bct-brettl2.h | 1 + include/configs/bf518f-ezbrd.h | 2 +- include/configs/bf526-ezbrd.h | 2 +- include/configs/bf527-ezkit.h | 2 +- include/configs/bf537-minotaur.h | 1 + include/configs/bf537-pnav.h | 2 +- include/configs/bf537-srv1.h | 2 +- include/configs/bf537-stamp.h | 2 +- include/configs/cm-bf527.h | 2 +- include/configs/cm-bf537e.h | 2 +- include/configs/cm-bf537u.h | 2 +- include/configs/dnp5370.h | 2 ++ include/configs/ip04.h | 1 + include/configs/tcm-bf518.h | 2 +- include/configs/tcm-bf537.h | 2 +- 31 files changed, 31 insertions(+), 69 deletions(-) delete mode 100644 arch/blackfin/include/asm/net.h diff --git a/arch/blackfin/include/asm/net.h b/arch/blackfin/include/asm/net.h deleted file mode 100644 index 97cb46691e4..00000000000 --- a/arch/blackfin/include/asm/net.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * net.h - misc Blackfin network helpers - * - * Copyright (c) 2008-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#ifndef __ASM_BFIN_RAND_MAC__ -#define __ASM_BFIN_RAND_MAC__ - -/* If the board does not have a real MAC assigned to it, then generate a - * locally administrated pseudo-random one based on CYCLES and compile date. - */ -static inline void bfin_gen_rand_mac(uchar *mac_addr) -{ - /* make something up */ - const char s[] = __DATE__; - size_t i; - u32 cycles; - for (i = 0; i < 6; ++i) { - asm("%0 = CYCLES;" : "=r" (cycles)); - mac_addr[i] = cycles ^ s[i]; - } - mac_addr[0] = (mac_addr[0] | 0x02) & ~0x01; /* make it local unicast */ -} - -#endif diff --git a/board/bct-brettl2/bct-brettl2.c b/board/bct-brettl2/bct-brettl2.c index de5b9ff0e75..6be9b180159 100644 --- a/board/bct-brettl2/bct-brettl2.c +++ b/board/bct-brettl2/bct-brettl2.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include @@ -33,7 +32,7 @@ int checkboard(void) static void board_init_enetaddr(uchar *mac_addr) { puts("Warning: Generating 'random' MAC address\n"); - bfin_gen_rand_mac(mac_addr); + eth_random_addr(mac_addr); eth_setenv_enetaddr("ethaddr", mac_addr); } diff --git a/board/bf518f-ezbrd/bf518f-ezbrd.c b/board/bf518f-ezbrd/bf518f-ezbrd.c index 09a2353e7d9..3a94a572eb2 100644 --- a/board/bf518f-ezbrd/bf518f-ezbrd.c +++ b/board/bf518f-ezbrd/bf518f-ezbrd.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -48,7 +47,7 @@ static void board_init_enetaddr(uchar *mac_addr) if (!valid_mac) { puts("Warning: Generating 'random' MAC address\n"); - bfin_gen_rand_mac(mac_addr); + eth_random_addr(mac_addr); } eth_setenv_enetaddr("ethaddr", mac_addr); diff --git a/board/bf526-ezbrd/bf526-ezbrd.c b/board/bf526-ezbrd/bf526-ezbrd.c index 4695b1161a0..368d6be25fb 100644 --- a/board/bf526-ezbrd/bf526-ezbrd.c +++ b/board/bf526-ezbrd/bf526-ezbrd.c @@ -12,7 +12,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; @@ -45,7 +44,7 @@ static void board_init_enetaddr(uchar *mac_addr) if (!valid_mac) { puts("Warning: Generating 'random' MAC address\n"); - bfin_gen_rand_mac(mac_addr); + eth_random_addr(mac_addr); } eth_setenv_enetaddr("ethaddr", mac_addr); diff --git a/board/bf527-ezkit/bf527-ezkit.c b/board/bf527-ezkit/bf527-ezkit.c index 211cf24ac30..88e18690e03 100644 --- a/board/bf527-ezkit/bf527-ezkit.c +++ b/board/bf527-ezkit/bf527-ezkit.c @@ -13,7 +13,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; @@ -47,7 +46,7 @@ static void board_init_enetaddr(uchar *mac_addr) if (!valid_mac) { puts("Warning: Generating 'random' MAC address\n"); - bfin_gen_rand_mac(mac_addr); + eth_random_addr(mac_addr); } eth_setenv_enetaddr("ethaddr", mac_addr); diff --git a/board/bf537-minotaur/bf537-minotaur.c b/board/bf537-minotaur/bf537-minotaur.c index 920429c12e6..ca61ef97b86 100644 --- a/board/bf537-minotaur/bf537-minotaur.c +++ b/board/bf537-minotaur/bf537-minotaur.c @@ -12,7 +12,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; @@ -27,7 +26,7 @@ int checkboard(void) static void board_init_enetaddr(uchar *mac_addr) { puts("Warning: Generating 'random' MAC address\n"); - bfin_gen_rand_mac(mac_addr); + eth_random_addr(mac_addr); eth_setenv_enetaddr("ethaddr", mac_addr); } diff --git a/board/bf537-pnav/bf537-pnav.c b/board/bf537-pnav/bf537-pnav.c index c5125288cbd..df0011026a6 100644 --- a/board/bf537-pnav/bf537-pnav.c +++ b/board/bf537-pnav/bf537-pnav.c @@ -12,7 +12,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; @@ -27,7 +26,7 @@ int checkboard(void) static void board_init_enetaddr(uchar *mac_addr) { puts("Warning: Generating 'random' MAC address\n"); - bfin_gen_rand_mac(mac_addr); + eth_random_addr(mac_addr); eth_setenv_enetaddr("ethaddr", mac_addr); } diff --git a/board/bf537-srv1/bf537-srv1.c b/board/bf537-srv1/bf537-srv1.c index 04d38910b3f..725296a4163 100644 --- a/board/bf537-srv1/bf537-srv1.c +++ b/board/bf537-srv1/bf537-srv1.c @@ -12,7 +12,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; @@ -27,7 +26,7 @@ int checkboard(void) static void board_init_enetaddr(uchar *mac_addr) { puts("Warning: Generating 'random' MAC address\n"); - bfin_gen_rand_mac(mac_addr); + eth_random_addr(mac_addr); eth_setenv_enetaddr("ethaddr", mac_addr); } diff --git a/board/bf537-stamp/bf537-stamp.c b/board/bf537-stamp/bf537-stamp.c index 5fdf8379c08..32045a9e47c 100644 --- a/board/bf537-stamp/bf537-stamp.c +++ b/board/bf537-stamp/bf537-stamp.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -48,7 +47,7 @@ static void board_init_enetaddr(uchar *mac_addr) if (!valid_mac) { puts("Warning: Generating 'random' MAC address\n"); - bfin_gen_rand_mac(mac_addr); + eth_random_addr(mac_addr); } eth_setenv_enetaddr("ethaddr", mac_addr); diff --git a/board/cm-bf527/cm-bf527.c b/board/cm-bf527/cm-bf527.c index a5f70a4f839..1533eb9c7a8 100644 --- a/board/cm-bf527/cm-bf527.c +++ b/board/cm-bf527/cm-bf527.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include "../cm-bf537e/gpio_cfi_flash.h" @@ -46,7 +45,7 @@ static void board_init_enetaddr(uchar *mac_addr) if (!valid_mac) { puts("Warning: Generating 'random' MAC address\n"); - bfin_gen_rand_mac(mac_addr); + eth_random_addr(mac_addr); } eth_setenv_enetaddr("ethaddr", mac_addr); diff --git a/board/cm-bf537e/cm-bf537e.c b/board/cm-bf537e/cm-bf537e.c index 8daf3ad06e8..e79f90f95bc 100644 --- a/board/cm-bf537e/cm-bf537e.c +++ b/board/cm-bf537e/cm-bf537e.c @@ -12,7 +12,6 @@ #include #include #include -#include #include "gpio_cfi_flash.h" DECLARE_GLOBAL_DATA_PTR; @@ -32,7 +31,7 @@ static void board_init_enetaddr(char *var) return; printf("Warning: %s: generating 'random' MAC address\n", var); - bfin_gen_rand_mac(enetaddr); + eth_random_addr(enetaddr); eth_setenv_enetaddr(var, enetaddr); } diff --git a/board/cm-bf537u/cm-bf537u.c b/board/cm-bf537u/cm-bf537u.c index 5941b5fcbe0..632cbda5c06 100644 --- a/board/cm-bf537u/cm-bf537u.c +++ b/board/cm-bf537u/cm-bf537u.c @@ -12,7 +12,6 @@ #include #include #include -#include #include "../cm-bf537e/gpio_cfi_flash.h" DECLARE_GLOBAL_DATA_PTR; @@ -32,7 +31,7 @@ static void board_init_enetaddr(char *var) return; printf("Warning: %s: generating 'random' MAC address\n", var); - bfin_gen_rand_mac(enetaddr); + eth_random_addr(enetaddr); eth_setenv_enetaddr(var, enetaddr); } diff --git a/board/dnp5370/dnp5370.c b/board/dnp5370/dnp5370.c index 4b3873bd4f3..df721c9944a 100644 --- a/board/dnp5370/dnp5370.c +++ b/board/dnp5370/dnp5370.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include @@ -55,7 +54,7 @@ static void board_init_enetaddr(uchar *mac_addr) if (!valid_mac) { puts("Warning: Generating 'random' MAC address\n"); - bfin_gen_rand_mac(mac_addr); + eth_random_addr(mac_addr); } eth_setenv_enetaddr("ethaddr", mac_addr); diff --git a/board/ip04/ip04.c b/board/ip04/ip04.c index c8ae5128b0e..ae526334267 100644 --- a/board/ip04/ip04.c +++ b/board/ip04/ip04.c @@ -13,7 +13,6 @@ #include #include #include -#include int checkboard(void) { @@ -33,7 +32,7 @@ int misc_init_r(void) uchar enetaddr[6]; if (!eth_getenv_enetaddr("ethaddr", enetaddr)) { puts("Warning: Generating 'random' MAC address\n"); - bfin_gen_rand_mac(enetaddr); + eth_random_addr(enetaddr); eth_setenv_enetaddr("ethaddr", enetaddr); } diff --git a/board/tcm-bf518/tcm-bf518.c b/board/tcm-bf518/tcm-bf518.c index 5964059dd1d..5d25fcd0a91 100644 --- a/board/tcm-bf518/tcm-bf518.c +++ b/board/tcm-bf518/tcm-bf518.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include @@ -47,7 +46,7 @@ static void board_init_enetaddr(uchar *mac_addr) if (!valid_mac) { puts("Warning: Generating 'random' MAC address\n"); - bfin_gen_rand_mac(mac_addr); + eth_random_addr(mac_addr); } eth_setenv_enetaddr("ethaddr", mac_addr); diff --git a/board/tcm-bf537/tcm-bf537.c b/board/tcm-bf537/tcm-bf537.c index 38aaae6870b..a4f0f7121b1 100644 --- a/board/tcm-bf537/tcm-bf537.c +++ b/board/tcm-bf537/tcm-bf537.c @@ -12,7 +12,6 @@ #include #include #include -#include #include "../cm-bf537e/gpio_cfi_flash.h" DECLARE_GLOBAL_DATA_PTR; @@ -32,7 +31,7 @@ static void board_init_enetaddr(char *var) return; printf("Warning: %s: generating 'random' MAC address\n", var); - bfin_gen_rand_mac(enetaddr); + eth_random_addr(enetaddr); eth_setenv_enetaddr(var, enetaddr); } diff --git a/include/configs/bct-brettl2.h b/include/configs/bct-brettl2.h index 06f095cc41b..c1eda963851 100644 --- a/include/configs/bct-brettl2.h +++ b/include/configs/bct-brettl2.h @@ -75,6 +75,7 @@ #define CONFIG_ROOTPATH "/romfs/brettl2" /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ +#define CONFIG_LIB_RAND #endif diff --git a/include/configs/bf518f-ezbrd.h b/include/configs/bf518f-ezbrd.h index 9eb85ebf3df..9e374c40244 100644 --- a/include/configs/bf518f-ezbrd.h +++ b/include/configs/bf518f-ezbrd.h @@ -89,7 +89,7 @@ #define CONFIG_PHY_ADDR 3 /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ - +#define CONFIG_LIB_RAND /* * Flash Settings diff --git a/include/configs/bf526-ezbrd.h b/include/configs/bf526-ezbrd.h index 3065d22f0bd..972eca9c174 100644 --- a/include/configs/bf526-ezbrd.h +++ b/include/configs/bf526-ezbrd.h @@ -87,7 +87,7 @@ #define CONFIG_HOSTNAME bf526-ezbrd /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ - +#define CONFIG_LIB_RAND /* * Flash Settings diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h index 748ddb3b157..92c183e27c2 100644 --- a/include/configs/bf527-ezkit.h +++ b/include/configs/bf527-ezkit.h @@ -85,7 +85,7 @@ #define CONFIG_HOSTNAME bf527-ezkit /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ - +#define CONFIG_LIB_RAND /* * Flash Settings diff --git a/include/configs/bf537-minotaur.h b/include/configs/bf537-minotaur.h index 156eeabb06d..3bc364ccfdf 100644 --- a/include/configs/bf537-minotaur.h +++ b/include/configs/bf537-minotaur.h @@ -89,6 +89,7 @@ /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:20:31:42 */ +#define CONFIG_LIB_RAND /* * Flash Settings diff --git a/include/configs/bf537-pnav.h b/include/configs/bf537-pnav.h index 3aa3d50a89b..ba74a695f88 100644 --- a/include/configs/bf537-pnav.h +++ b/include/configs/bf537-pnav.h @@ -67,7 +67,7 @@ #define CONFIG_HOSTNAME bf537-pnav /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:24:21:18 */ - +#define CONFIG_LIB_RAND /* * Flash Settings diff --git a/include/configs/bf537-srv1.h b/include/configs/bf537-srv1.h index e12d761a245..0b723cf934e 100644 --- a/include/configs/bf537-srv1.h +++ b/include/configs/bf537-srv1.h @@ -88,7 +88,7 @@ #define CONFIG_ROOTPATH "/romfs" /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:20:31:42 */ - +#define CONFIG_LIB_RAND /* * Flash Settings diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index e1705cadaee..a302f839a1e 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -67,7 +67,7 @@ #define CONFIG_HOSTNAME bf537-stamp /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ - +#define CONFIG_LIB_RAND /* * Flash Settings diff --git a/include/configs/cm-bf527.h b/include/configs/cm-bf527.h index 384d8715adc..8d3ae49913e 100644 --- a/include/configs/cm-bf527.h +++ b/include/configs/cm-bf527.h @@ -85,7 +85,7 @@ #define CONFIG_HOSTNAME cm-bf527 /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ - +#define CONFIG_LIB_RAND /* * Flash Settings diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h index 67cf801a3fe..47967d71203 100644 --- a/include/configs/cm-bf537e.h +++ b/include/configs/cm-bf537e.h @@ -73,7 +73,7 @@ #define CONFIG_HOSTNAME cm-bf537e /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ - +#define CONFIG_LIB_RAND /* * Flash Settings diff --git a/include/configs/cm-bf537u.h b/include/configs/cm-bf537u.h index 34ce75baebd..88c99821b1e 100644 --- a/include/configs/cm-bf537u.h +++ b/include/configs/cm-bf537u.h @@ -71,7 +71,7 @@ #define CONFIG_HOSTNAME cm-bf537u /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ - +#define CONFIG_LIB_RAND /* * Flash Settings diff --git a/include/configs/dnp5370.h b/include/configs/dnp5370.h index 4f2c742a5d1..3f1f9f38462 100644 --- a/include/configs/dnp5370.h +++ b/include/configs/dnp5370.h @@ -55,6 +55,8 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_PING + +#define CONFIG_LIB_RAND #endif /* diff --git a/include/configs/ip04.h b/include/configs/ip04.h index 0efa2b7b9f2..3767502faa5 100644 --- a/include/configs/ip04.h +++ b/include/configs/ip04.h @@ -77,6 +77,7 @@ #define DM9000_IO CONFIG_DM9000_BASE #define DM9000_DATA (CONFIG_DM9000_BASE + 2) +#define CONFIG_LIB_RAND /* * Flash Settings diff --git a/include/configs/tcm-bf518.h b/include/configs/tcm-bf518.h index 1ff34d517d8..a77ba697d0f 100644 --- a/include/configs/tcm-bf518.h +++ b/include/configs/tcm-bf518.h @@ -68,7 +68,7 @@ #define CONFIG_HOSTNAME tcm-bf518 /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ - +#define CONFIG_LIB_RAND /* * Flash Settings diff --git a/include/configs/tcm-bf537.h b/include/configs/tcm-bf537.h index 370d97ffe03..c4c1c579bc1 100644 --- a/include/configs/tcm-bf537.h +++ b/include/configs/tcm-bf537.h @@ -73,7 +73,7 @@ #define CONFIG_HOSTNAME tcm-bf537 /* Uncomment next line to use fixed MAC address */ /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ - +#define CONFIG_LIB_RAND /* * Flash Settings From 9995d8c8dca4dced5be7c86f75cf53d3166bdead Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 18 Apr 2014 19:09:50 +0900 Subject: [PATCH 028/105] fs: ubifs: drop __DATE__ and __TIME__ __DATE__ and __TIME__ makes the build non-deterministic. Drop the debug message using them. Signed-off-by: Masahiro Yamada --- fs/ubifs/super.c | 1 - 1 file changed, 1 deletion(-) diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c index 67f115f2e8a..748ab6792d0 100644 --- a/fs/ubifs/super.c +++ b/fs/ubifs/super.c @@ -734,7 +734,6 @@ static int mount_ubifs(struct ubifs_info *c) ubifs_msg("reserved for root: %llu bytes (%llu KiB)", c->report_rp_size, c->report_rp_size >> 10); - dbg_msg("compiled on: " __DATE__ " at " __TIME__); dbg_msg("min. I/O unit size: %d bytes", c->min_io_size); dbg_msg("LEB size: %d bytes (%d KiB)", c->leb_size, c->leb_size >> 10); From 65bb6d8deebf608ac2bd6c3eb60ad81cf5d30f60 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 18 Apr 2014 19:09:51 +0900 Subject: [PATCH 029/105] kbuild: build with -Werror=date-time if the compiler supports it Using __DATE__, __TIME__ would make the build non-deterministic. If the code needs to refer to build date/time, use U_BOOT_DATE and U_BOOT_TIME in include/generated/timestamp_autogenerated.h instead. This commit has been imported from Linux Kernel, which should be applied to U-Boot too: commit fe7c36c7bde12190341722af69358e42171162f3 Author: Josh Triplett Date: Mon Dec 23 13:56:06 2013 -0800 Makefile: Build with -Werror=date-time if the compiler supports it GCC 4.9 and newer have a new warning -Wdate-time, which warns on any use of __DATE__, __TIME__, or __TIMESTAMP__, which would make the build non-deterministic. Now that the kernel does not use any of those macros, turn on -Werror=date-time if available, to keep it that way. The kernel already (optionally) records this information at build time in a single place; other kernel code should not duplicate that. Signed-off-by: Josh Triplett Signed-off-by: Michal Marek Signed-off-by: Masahiro Yamada --- Makefile | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Makefile b/Makefile index a58a5cd5c15..125baa33641 100644 --- a/Makefile +++ b/Makefile @@ -578,6 +578,9 @@ KBUILD_AFLAGS += -Wa,-gstabs,-S endif endif +# Prohibit date/time macros, which would make the build non-deterministic +KBUILD_CFLAGS += $(call cc-option,-Werror=date-time) + ifneq ($(CONFIG_SYS_TEXT_BASE),) KBUILD_CPPFLAGS += -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) endif From 822ef00e989f1b99d8f0554d74fa0d97ce007f06 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= Date: Sun, 20 Apr 2014 10:34:15 +0200 Subject: [PATCH 030/105] lib/sha256: fix compile on some hosts MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 2842c1c24269a05142802d25520e7cb9035e456c introduced lib/sha256 into mkimage. Since then it will be compiled with HOSTCC which may produce errors on some systems. Most BSD systems (like OS X for me) do not ship a linux/string.h which will lead to take the U-Boot provided include/linux/string.h in the end. This header howver is completely wrong here. Just take the string.h if compiling with HOSTCC and linux/string.h when not. Signed-off-by: Andreas Bießmann Cc: Heiko Schocher Acked-by: Heiko Schocher --- lib/sha256.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/sha256.c b/lib/sha256.c index 3212baba5f6..b1085ea7917 100644 --- a/lib/sha256.c +++ b/lib/sha256.c @@ -8,9 +8,11 @@ #ifndef USE_HOSTCC #include +#include +#else +#include #endif /* USE_HOSTCC */ #include -#include #include /* From 96ee97a17b0d093e8af067acce76de3622ddf3a0 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 22 Apr 2014 15:45:42 -0300 Subject: [PATCH 031/105] doc: README.generic-board: Fix typo Signed-off-by: Fabio Estevam Acked-by: Simon Glass --- doc/README.generic-board | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/README.generic-board b/doc/README.generic-board index 50d3a26849d..17da0b9f877 100644 --- a/doc/README.generic-board +++ b/doc/README.generic-board @@ -17,7 +17,7 @@ architecture-specific board.c file before October 2014. Background ---------- -U-Boot has tranditionally had a board.c file for each architecture. This has +U-Boot has traditionally had a board.c file for each architecture. This has introduced quite a lot of duplication, with each architecture tending to do initialisation slightly differently. To address this, a new 'generic board init' feature was introduced a year ago in March 2013 (further motivation is From bafd67d3d0f39a19c1e32146cde8b1f4ccd6d666 Mon Sep 17 00:00:00 2001 From: Manish Badarkhe Date: Thu, 24 Apr 2014 08:55:07 +0530 Subject: [PATCH 032/105] tps6586x: staticize funtions Make funtions static which are locally used in file. Signed-off-by: Manish Badarkhe --- drivers/power/tps6586x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/power/tps6586x.c b/drivers/power/tps6586x.c index 704c2439b14..d29d969533d 100644 --- a/drivers/power/tps6586x.c +++ b/drivers/power/tps6586x.c @@ -32,7 +32,7 @@ enum { }; #define MAX_I2C_RETRY 3 -int tps6586x_read(int reg) +static int tps6586x_read(int reg) { int i; uchar data; @@ -61,7 +61,7 @@ exit: return retval; } -int tps6586x_write(int reg, uchar *data, uint len) +static int tps6586x_write(int reg, uchar *data, uint len) { int i; int retval = -1; From bf69d6642326cfecef440bb245946903454ff30e Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 25 Apr 2014 21:54:31 +0900 Subject: [PATCH 033/105] kbuild: allow null board for spl build Commit 33a02da0 supported "" for the board field of boards.cfg. But it missed to modify spl/Makefile. This commit provides the flexibility so we can use "" board in SPL too. --- spl/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/spl/Makefile b/spl/Makefile index a4d973744b3..55500fd8970 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -88,7 +88,7 @@ libs-y += $(CPUDIR)/ ifdef SOC libs-y += $(CPUDIR)/$(SOC)/ endif -libs-y += board/$(BOARDDIR)/ +libs-y += $(if $(BOARDDIR),board/$(BOARDDIR)/) libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/ libs-$(CONFIG_SPL_FRAMEWORK) += common/spl/ From 5c50a92bbea7e118ea4e4fb0945bf6707b010a80 Mon Sep 17 00:00:00 2001 From: Kristian Otnes Date: Fri, 25 Apr 2014 15:35:43 +0200 Subject: [PATCH 034/105] hush shell: Avoid string write overflow when entering max cmd length console_buffer array is defined to be CONFIG_SYS_CBSIZE + 1 long, whereas the_command array only CONFIG_SYS_CBSIZE long. Subsequent use of strcpy(the_command, console_buffer) will write final \0 terminating byte outside the_command array when entering a command of max length. Signed-off-by: Kristian Otnes cisco com> --- common/hush.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/hush.c b/common/hush.c index df10267d644..5b432247599 100644 --- a/common/hush.c +++ b/common/hush.c @@ -996,7 +996,7 @@ static void get_user_input(struct in_str *i) i->p = the_command; #else int n; - static char the_command[CONFIG_SYS_CBSIZE]; + static char the_command[CONFIG_SYS_CBSIZE + 1]; #ifdef CONFIG_BOOT_RETRY_TIME # ifndef CONFIG_RESET_TO_RETRY From 6f2ed0e9faa87a0b14ada74727297f62e02868cd Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 28 Apr 2014 10:17:10 +0900 Subject: [PATCH 035/105] cosmetic: delete misleading comment /* CONFIG_BOARDDIR */ CONFIG_BOARDDIR is not referenced in these linker scripts. The comment /* CONFIG_BOARDDIR */ is misleading. Signed-off-by: Masahiro Yamada --- arch/powerpc/cpu/mpc85xx/u-boot-nand.lds | 2 +- arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds | 2 +- arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 2 +- arch/powerpc/cpu/mpc85xx/u-boot.lds | 2 +- board/dave/PPChameleonEVB/u-boot.lds | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds index d77a6dc62d8..f933b219449 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds @@ -4,7 +4,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "config.h" /* CONFIG_BOARDDIR */ +#include "config.h" #ifndef CONFIG_SYS_MONITOR_LEN #define CONFIG_SYS_MONITOR_LEN 0x80000 diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds index 844f7e94f13..b83c55388cf 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds @@ -7,7 +7,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "config.h" /* CONFIG_BOARDDIR */ +#include "config.h" OUTPUT_ARCH(powerpc) SECTIONS diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index 8453f3a3fe8..5ae7b3eedbc 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -7,7 +7,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "config.h" /* CONFIG_BOARDDIR */ +#include "config.h" OUTPUT_ARCH(powerpc) #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds index 0b9086dfd09..2cf0b259525 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -4,7 +4,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "config.h" /* CONFIG_BOARDDIR */ +#include "config.h" #ifdef CONFIG_RESET_VECTOR_ADDRESS #define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS diff --git a/board/dave/PPChameleonEVB/u-boot.lds b/board/dave/PPChameleonEVB/u-boot.lds index 5af55e95e4e..94b7076148c 100644 --- a/board/dave/PPChameleonEVB/u-boot.lds +++ b/board/dave/PPChameleonEVB/u-boot.lds @@ -4,7 +4,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "config.h" /* CONFIG_BOARDDIR */ +#include "config.h" #ifndef RESET_VECTOR_ADDRESS #define RESET_VECTOR_ADDRESS 0xfffffffc From 488c47a141179fc3fa10779be6268e56f88ec18d Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 28 Apr 2014 10:18:34 +0900 Subject: [PATCH 036/105] config: remove platform CONFIG_SYS_HZ definition part 4 Some new boards define CONFIG_SYS_HZ again! Remove. Signed-off-by: Masahiro Yamada Acked-by: Bo Shen --- include/configs/T208xRDB.h | 1 - include/configs/ids8313.h | 1 - include/configs/sama5d3_xplained.h | 1 - 3 files changed, 3 deletions(-) diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 73d82edb80f..0be0a0feb0b 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -750,7 +750,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks*/ /* * For booting Linux, the board info and command line data diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 613f7e1a2ef..c1b3b633e96 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -474,7 +474,6 @@ #define CONFIG_ENV_FLAGS_LIST_STATIC "ethaddr:mo,eth1addr:mo" #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_HZ 1000 /* Initial Memory map for Linux*/ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 91cc7d8e583..41c946d1ec8 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -17,7 +17,6 @@ /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ -#define CONFIG_SYS_HZ 1000 #define CONFIG_AT91FAMILY #define CONFIG_ARCH_CPU_INIT From e7afb73b5057e0d65a6fc7e039c54291d569097e Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 28 Apr 2014 17:45:05 +0900 Subject: [PATCH 037/105] nand_spl: remove unused linker scripts u-boot-nand.lds Commit 345b77ba removed some nand_spl boards but it missed to delete linker scripts. These linker scripts are not used now. And one more fix: amcc/acadia does not support nand_spl anymore, so remove #if !defined(CONFIG_NAND_U_BOOT) ... #endif Signed-off-by: Masahiro Yamada Cc: Stefan Roese Acked-by: Stefan Roese --- board/amcc/acadia/acadia.c | 2 - board/amcc/acadia/u-boot-nand.lds | 87 ------------------ board/amcc/bamboo/u-boot-nand.lds | 88 ------------------ board/amcc/canyonlands/u-boot-nand.lds | 88 ------------------ board/amcc/kilauea/u-boot-nand.lds | 87 ------------------ board/amcc/sequoia/u-boot-nand.lds | 88 ------------------ board/esd/pmc440/u-boot-nand.lds | 118 ------------------------- 7 files changed, 558 deletions(-) delete mode 100644 board/amcc/acadia/u-boot-nand.lds delete mode 100644 board/amcc/bamboo/u-boot-nand.lds delete mode 100644 board/amcc/canyonlands/u-boot-nand.lds delete mode 100644 board/amcc/kilauea/u-boot-nand.lds delete mode 100644 board/amcc/sequoia/u-boot-nand.lds delete mode 100644 board/esd/pmc440/u-boot-nand.lds diff --git a/board/amcc/acadia/acadia.c b/board/amcc/acadia/acadia.c index 9c6deeabcfd..2eb18df5e78 100644 --- a/board/amcc/acadia/acadia.c +++ b/board/amcc/acadia/acadia.c @@ -39,12 +39,10 @@ int board_early_init_f(void) { unsigned int reg; -#if !defined(CONFIG_NAND_U_BOOT) /* don't reinit PLL when booting via I2C bootstrap option */ mfsdr(SDR0_PINSTP, reg); if (reg != 0xf0000000) board_pll_init_f(); -#endif acadia_gpio_init(); diff --git a/board/amcc/acadia/u-boot-nand.lds b/board/amcc/acadia/u-boot-nand.lds deleted file mode 100644 index 9a331c50a95..00000000000 --- a/board/amcc/acadia/u-boot-nand.lds +++ /dev/null @@ -1,87 +0,0 @@ -/* - * (C) Copyright 2007 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - arch/powerpc/cpu/ppc4xx/start.o (.text*) - - /* Align to next NAND block */ - . = ALIGN(0x4000); - common/env_embedded.o (.ppcenv) - /* Keep some space here for redundant env and potential bad env blocks */ - . = ALIGN(0x10000); - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - KEEP(*(.got)) - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/amcc/bamboo/u-boot-nand.lds b/board/amcc/bamboo/u-boot-nand.lds deleted file mode 100644 index 5e84369fe15..00000000000 --- a/board/amcc/bamboo/u-boot-nand.lds +++ /dev/null @@ -1,88 +0,0 @@ -/* - * (C) Copyright 2007 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - arch/powerpc/cpu/ppc4xx/start.o (.text*) - board/amcc/bamboo/init.o (.text*) - - /* Align to next NAND block */ - . = ALIGN(0x4000); - common/env_embedded.o (.ppcenv) - /* Keep some space here for redundant env and potential bad env blocks */ - . = ALIGN(0x10000); - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - KEEP(*(.got)) - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/amcc/canyonlands/u-boot-nand.lds b/board/amcc/canyonlands/u-boot-nand.lds deleted file mode 100644 index 31a2123bf12..00000000000 --- a/board/amcc/canyonlands/u-boot-nand.lds +++ /dev/null @@ -1,88 +0,0 @@ -/* - * (C) Copyright 2008 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - arch/powerpc/cpu/ppc4xx/start.o (.text) - board/amcc/canyonlands/init.o (.text*) - - /* Align to next NAND block */ - . = ALIGN(0x20000); - common/env_embedded.o (.ppcenv) - /* Keep some space here for redundant env and potential bad env blocks */ - . = ALIGN(0x80000); - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - KEEP(*(.got)) - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/amcc/kilauea/u-boot-nand.lds b/board/amcc/kilauea/u-boot-nand.lds deleted file mode 100644 index 9a331c50a95..00000000000 --- a/board/amcc/kilauea/u-boot-nand.lds +++ /dev/null @@ -1,87 +0,0 @@ -/* - * (C) Copyright 2007 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - arch/powerpc/cpu/ppc4xx/start.o (.text*) - - /* Align to next NAND block */ - . = ALIGN(0x4000); - common/env_embedded.o (.ppcenv) - /* Keep some space here for redundant env and potential bad env blocks */ - . = ALIGN(0x10000); - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - KEEP(*(.got)) - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/amcc/sequoia/u-boot-nand.lds b/board/amcc/sequoia/u-boot-nand.lds deleted file mode 100644 index f4d752c30b5..00000000000 --- a/board/amcc/sequoia/u-boot-nand.lds +++ /dev/null @@ -1,88 +0,0 @@ -/* - * (C) Copyright 2006 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - arch/powerpc/cpu/ppc4xx/start.o (.text) - board/amcc/sequoia/init.o (.text*) - - /* Align to next NAND block */ - . = ALIGN(0x4000); - common/env_embedded.o (.ppcenv) - /* Keep some space here for redundant env and potential bad env blocks */ - . = ALIGN(0x10000); - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - KEEP(*(.got)) - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/esd/pmc440/u-boot-nand.lds b/board/esd/pmc440/u-boot-nand.lds deleted file mode 100644 index bd801ccdc2a..00000000000 --- a/board/esd/pmc440/u-boot-nand.lds +++ /dev/null @@ -1,118 +0,0 @@ -/* - * (C) Copyright 2006 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - arch/powerpc/cpu/ppc4xx/start.o (.text) - - /* Align to next NAND block */ - . = ALIGN(0x4000); - common/env_embedded.o (.ppcenv) - /* Keep some space here for redundant env and potential bad env blocks */ - . = ALIGN(0x10000); - - *(.text) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - . = ALIGN(4); - } - - __bss_end = . ; - PROVIDE (end = .); -} From cd834a053b9a46a74f7d1ccd1b68d983712cdeb4 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 28 Apr 2014 11:56:30 +0200 Subject: [PATCH 038/105] tools: env: Add aes.c placeholder Add missing aes.c placeholder which includes lib/aes.c . Without this one, tools/env/ will fail to build. Signed-off-by: Marek Vasut Cc: Alexey Brodkin Cc: Masahiro Yamada Tested-by: Alexey Brodkin Tested-by: Heiko Schocher --- tools/env/aes.c | 1 + 1 file changed, 1 insertion(+) create mode 100644 tools/env/aes.c diff --git a/tools/env/aes.c b/tools/env/aes.c new file mode 100644 index 00000000000..9e42679e343 --- /dev/null +++ b/tools/env/aes.c @@ -0,0 +1 @@ +#include "../../lib/aes.c" From 717ccc1d7f77b4d1177c098749adc07205a22fa1 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 1 May 2014 10:01:08 -0400 Subject: [PATCH 039/105] cmd_bootm.c: Only say XIP image when load is image_start We say we have an XIP (in this case, image loaded at desired execution address) when the image header has been offset in the load. It's possible that in some cases executing the header is non-fatal but that's not true in many other cases. Signed-off-by: Tom Rini --- common/cmd_bootm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index c243a5bd78a..e683af36916 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -388,7 +388,7 @@ static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end, image_buf = map_sysmem(image_start, image_len); switch (comp) { case IH_COMP_NONE: - if (load == blob_start || load == image_start) { + if (load == image_start) { printf(" XIP %s ... ", type_name); no_overlap = 1; } else { From 7e18a1b9586e4d992f49bcd0728a93f8828b9f98 Mon Sep 17 00:00:00 2001 From: Ralph Siemsen Date: Thu, 1 May 2014 14:18:41 -0400 Subject: [PATCH 040/105] Trivial fix to .gitignore for spl/Makefile Trivial fix to .gitignore for spl/Makefile According to the gitignore man page: "An optional prefix "!" which negates the pattern; any matching file excluded by a previous pattern will become included again." ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ So the directory exclude "/spl/*" must come before the exception for spl/Makefile otherwise it has no effect. Signed-off-by: Ralph Siemsen Tested-by: Masahiro Yamada [on git v1.7.9.5 / v1.8.3.2] --- .gitignore | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitignore b/.gitignore index cba5eac2a03..a6b2d1c650c 100644 --- a/.gitignore +++ b/.gitignore @@ -47,8 +47,8 @@ /errlog /reloc_off -!/spl/Makefile /spl/* +!/spl/Makefile /tpl/ # From 2a1680e30e3fa8257b60cb9dbd7add32539ac470 Mon Sep 17 00:00:00 2001 From: York Sun Date: Fri, 2 May 2014 17:28:04 -0700 Subject: [PATCH 041/105] common/board_f: Initialized global data for generic board Some platforms (tested on mpc85xx, mpc86xx) use global data before calling function baord_inti_f(). The data should not be cleared later. Any arch which uses global data in generic board board_init_f() should define CONFIG_SYS_GENERIC_GLOBAL_DATA. Signed-off-by: York Sun CC: Scott Wood CC: Simon Glass CC: Albert ARIBAUD Acked-by: Simon Glass --- README | 6 ++++++ arch/arc/include/asm/config.h | 2 ++ arch/arm/include/asm/config.h | 2 ++ arch/mips/include/asm/config.h | 2 ++ arch/sandbox/include/asm/config.h | 1 + common/board_f.c | 12 +++++++----- 6 files changed, 20 insertions(+), 5 deletions(-) diff --git a/README b/README index 61c2caca316..5f895520e82 100644 --- a/README +++ b/README @@ -451,6 +451,12 @@ The following options need to be configured: supported, core will start to execute uboot when wakes up. - Generic CPU options: + CONFIG_SYS_GENERIC_GLOBAL_DATA + Defines global data is initialized in generic board board_init_f(). + If this macro is defined, global data is created and cleared in + generic board board_init_f(). Without this macro, architecture/board + should initialize global data before calling board_init_f(). + CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN Defines the endianess of the CPU. Implementation of those diff --git a/arch/arc/include/asm/config.h b/arch/arc/include/asm/config.h index 5761def1e71..3d331cc970d 100644 --- a/arch/arc/include/asm/config.h +++ b/arch/arc/include/asm/config.h @@ -7,6 +7,8 @@ #ifndef __ASM_ARC_CONFIG_H_ #define __ASM_ARC_CONFIG_H_ +#define CONFIG_SYS_GENERIC_GLOBAL_DATA + #define CONFIG_LMB #endif /*__ASM_ARC_CONFIG_H_ */ diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index abf79e5c9ed..2a20a770bcd 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -7,6 +7,8 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ +#define CONFIG_SYS_GENERIC_GLOBAL_DATA + #define CONFIG_LMB #define CONFIG_SYS_BOOT_RAMDISK_HIGH diff --git a/arch/mips/include/asm/config.h b/arch/mips/include/asm/config.h index 3a891ba6272..1c8a42bd2f6 100644 --- a/arch/mips/include/asm/config.h +++ b/arch/mips/include/asm/config.h @@ -7,6 +7,8 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ +#define CONFIG_SYS_GENERIC_GLOBAL_DATA + #define CONFIG_LMB #define CONFIG_SYS_BOOT_RAMDISK_HIGH diff --git a/arch/sandbox/include/asm/config.h b/arch/sandbox/include/asm/config.h index ec7729eb4cc..6c1bff99c2b 100644 --- a/arch/sandbox/include/asm/config.h +++ b/arch/sandbox/include/asm/config.h @@ -7,6 +7,7 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ +#define CONFIG_SYS_GENERIC_GLOBAL_DATA #define CONFIG_SANDBOX_ARCH /* Used by drivers/spi/sandbox_spi.c and arch/sandbox/include/asm/state.h */ diff --git a/common/board_f.c b/common/board_f.c index aea6bff5551..b6be386a7f7 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -961,20 +961,22 @@ static init_fnc_t init_sequence_f[] = { void board_init_f(ulong boot_flags) { -#ifndef CONFIG_X86 +#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA + /* + * For some archtectures, global data is initialized and used before + * calling this function. The data should be preserved. For others, + * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack + * here to host global data until relocation. + */ gd_t data; gd = &data; -#endif /* * Clear global data before it is accessed at debug print * in initcall_run_list. Otherwise the debug print probably * get the wrong vaule of gd->have_console. */ -#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \ - !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \ - !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86) zero_global_data(); #endif From fa39ffe5d61bd7f34b2ff579f5f6bb8f92a6b9b1 Mon Sep 17 00:00:00 2001 From: York Sun Date: Fri, 2 May 2014 17:28:05 -0700 Subject: [PATCH 042/105] common/board_f: Fix size variable DRAM size should use 64-bit variable when the size could be more than 4GB. Caught and verified on P4080DS with 4GB DDR. Signed-off-by: York Sun Acked-by: Simon Glass --- common/board_f.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/board_f.c b/common/board_f.c index b6be386a7f7..4ea4cb21bed 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -194,7 +194,7 @@ static int init_func_ram(void) static int show_dram_config(void) { - ulong size; + unsigned long long size; #ifdef CONFIG_NR_DRAM_BANKS int i; From ae95fad5af3793ae804b4390727e0f431e5514d7 Mon Sep 17 00:00:00 2001 From: Steve Rae Date: Mon, 5 May 2014 13:00:08 -0700 Subject: [PATCH 043/105] disk: part_efi: add support for the Backup GPT Check the Backup GPT table if the Primary GPT table is invalid. Renamed "Secondary GPT" to "Backup GPT" as per: UEFI Specification (Version 2.3.1, Errata A) Signed-off-by: Steve Rae --- disk/part_efi.c | 22 +++++++++++++++++++--- doc/README.gpt | 14 +++++++------- 2 files changed, 26 insertions(+), 10 deletions(-) diff --git a/disk/part_efi.c b/disk/part_efi.c index 216a2920c27..c74b7b91705 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -93,7 +93,15 @@ void print_part_efi(block_dev_desc_t * dev_desc) if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA, gpt_head, &gpt_pte) != 1) { printf("%s: *** ERROR: Invalid GPT ***\n", __func__); - return; + if (is_gpt_valid(dev_desc, (dev_desc->lba - 1), + gpt_head, &gpt_pte) != 1) { + printf("%s: *** ERROR: Invalid Backup GPT ***\n", + __func__); + return; + } else { + printf("%s: *** Using Backup GPT ***\n", + __func__); + } } debug("%s: gpt-entry at %p\n", __func__, gpt_pte); @@ -142,7 +150,15 @@ int get_partition_info_efi(block_dev_desc_t * dev_desc, int part, if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA, gpt_head, &gpt_pte) != 1) { printf("%s: *** ERROR: Invalid GPT ***\n", __func__); - return -1; + if (is_gpt_valid(dev_desc, (dev_desc->lba - 1), + gpt_head, &gpt_pte) != 1) { + printf("%s: *** ERROR: Invalid Backup GPT ***\n", + __func__); + return -1; + } else { + printf("%s: *** Using Backup GPT ***\n", + __func__); + } } if (part > le32_to_cpu(gpt_head->num_partition_entries) || @@ -252,7 +268,7 @@ int write_gpt_table(block_dev_desc_t *dev_desc, != pte_blk_cnt) goto err; - /* recalculate the values for the Second GPT Header */ + /* recalculate the values for the Backup GPT Header */ val = le64_to_cpu(gpt_h->my_lba); gpt_h->my_lba = gpt_h->alternate_lba; gpt_h->alternate_lba = cpu_to_le64(val); diff --git a/doc/README.gpt b/doc/README.gpt index f822894709e..ec0156d8aa9 100644 --- a/doc/README.gpt +++ b/doc/README.gpt @@ -66,14 +66,14 @@ GPT brief explanation: |Partition n | | | ---------------------------------------------------------- - LBA -34 |Entry 1|Entry 2| Entry 3| Entry 4| Secondary - -------------------------------------------------- (bkp) - LBA -33 |Entries 5 - 128 | GPT + LBA -34 |Entry 1|Entry 2| Entry 3| Entry 4| Backup + -------------------------------------------------- GPT + LBA -33 |Entries 5 - 128 | | | | | LBA -2 | | -------------------------------------------------- - LBA -1 |Secondary GPT Header | + LBA -1 |Backup GPT Header | ---------------------------------------------------------- For a legacy reasons, GPT's LBA 0 sector has a MBR structure. It is called @@ -86,7 +86,7 @@ It is possible to define 128 linearly placed partition entries. "LBA -1" means the last addressable block (in the mmc subsystem: "dev_desc->lba - 1") -Primary/Secondary GPT header: +Primary/Backup GPT header: ---------------------------- Offset Size Description @@ -115,7 +115,7 @@ IMPORTANT: GPT headers and partition entries are protected by CRC32 (the POSIX CRC32). -Primary GPT header and Secondary GPT header have swapped values of "Current LBA" +Primary GPT header and Backup GPT header have swapped values of "Current LBA" and "Backup LBA" and therefore different CRC32 check-sum. CRC32 for GPT headers (field "CRC of header") are calculated up till @@ -125,7 +125,7 @@ CRC32 for partition entries (field "CRC32 of partition array") is calculated for the whole array entry ( Number_of_partition_entries * sizeof(partition_entry_size (usually 128))) -Observe, how Secondary GPT is placed in the memory. It is NOT a mirror reflect +Observe, how Backup GPT is placed in the memory. It is NOT a mirror reflect of the Primary. Partition Entry Format: From 35dd055b94eb3ed8c21595eedd740431866b2f26 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 6 May 2014 09:36:04 +0200 Subject: [PATCH 044/105] fs:ext4:cleanup: Remove superfluous code Code responsible for handling situation when ext4 has block size of 1024B can be ordered to take less space. This patch does that for ext4 common and write files. Signed-off-by: Lukasz Majewski --- fs/ext4/ext4_common.c | 6 ++--- fs/ext4/ext4_write.c | 56 +++++++++++++++---------------------------- 2 files changed, 21 insertions(+), 41 deletions(-) diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index 02da75c0840..62e2e804928 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -904,10 +904,8 @@ long int ext4fs_get_new_blk_no(void) restart: fs->curr_blkno++; /* get the blockbitmap index respective to blockno */ - if (fs->blksz != 1024) { - bg_idx = fs->curr_blkno / blk_per_grp; - } else { - bg_idx = fs->curr_blkno / blk_per_grp; + bg_idx = fs->curr_blkno / blk_per_grp; + if (fs->blksz == 1024) { remainder = fs->curr_blkno % blk_per_grp; if (!remainder) bg_idx--; diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c index b674b6faebe..3db22f8f93d 100644 --- a/fs/ext4/ext4_write.c +++ b/fs/ext4/ext4_write.c @@ -116,10 +116,8 @@ static void delete_single_indirect_block(struct ext2_inode *inode) if (inode->b.blocks.indir_block != 0) { debug("SIPB releasing %u\n", inode->b.blocks.indir_block); blknr = inode->b.blocks.indir_block; - if (fs->blksz != 1024) { - bg_idx = blknr / blk_per_grp; - } else { - bg_idx = blknr / blk_per_grp; + bg_idx = blknr / blk_per_grp; + if (fs->blksz == 1024) { remainder = blknr % blk_per_grp; if (!remainder) bg_idx--; @@ -181,11 +179,9 @@ static void delete_double_indirect_block(struct ext2_inode *inode) break; debug("DICB releasing %u\n", *di_buffer); - if (fs->blksz != 1024) { - bg_idx = (*di_buffer) / blk_per_grp; - } else { - bg_idx = (*di_buffer) / blk_per_grp; - remainder = (*di_buffer) % blk_per_grp; + bg_idx = *di_buffer / blk_per_grp; + if (fs->blksz == 1024) { + remainder = *di_buffer % blk_per_grp; if (!remainder) bg_idx--; } @@ -213,10 +209,8 @@ static void delete_double_indirect_block(struct ext2_inode *inode) /* removing the parent double indirect block */ blknr = inode->b.blocks.double_indir_block; - if (fs->blksz != 1024) { - bg_idx = blknr / blk_per_grp; - } else { - bg_idx = blknr / blk_per_grp; + bg_idx = blknr / blk_per_grp; + if (fs->blksz == 1024) { remainder = blknr % blk_per_grp; if (!remainder) bg_idx--; @@ -293,12 +287,9 @@ static void delete_triple_indirect_block(struct ext2_inode *inode) for (j = 0; j < fs->blksz / sizeof(int); j++) { if (*tip_buffer == 0) break; - if (fs->blksz != 1024) { - bg_idx = (*tip_buffer) / blk_per_grp; - } else { - bg_idx = (*tip_buffer) / blk_per_grp; - - remainder = (*tip_buffer) % blk_per_grp; + bg_idx = *tip_buffer / blk_per_grp; + if (fs->blksz == 1024) { + remainder = *tip_buffer % blk_per_grp; if (!remainder) bg_idx--; } @@ -336,12 +327,9 @@ static void delete_triple_indirect_block(struct ext2_inode *inode) * removing the grand parent blocks * which is connected to inode */ - if (fs->blksz != 1024) { - bg_idx = (*tigp_buffer) / blk_per_grp; - } else { - bg_idx = (*tigp_buffer) / blk_per_grp; - - remainder = (*tigp_buffer) % blk_per_grp; + bg_idx = *tigp_buffer / blk_per_grp; + if (fs->blksz == 1024) { + remainder = *tigp_buffer % blk_per_grp; if (!remainder) bg_idx--; } @@ -371,10 +359,8 @@ static void delete_triple_indirect_block(struct ext2_inode *inode) /* removing the grand parent triple indirect block */ blknr = inode->b.blocks.triple_indir_block; - if (fs->blksz != 1024) { - bg_idx = blknr / blk_per_grp; - } else { - bg_idx = blknr / blk_per_grp; + bg_idx = blknr / blk_per_grp; + if (fs->blksz == 1024) { remainder = blknr % blk_per_grp; if (!remainder) bg_idx--; @@ -452,10 +438,8 @@ static int ext4fs_delete_file(int inodeno) for (i = 0; i < no_blocks; i++) { blknr = read_allocated_block(&(node_inode->inode), i); - if (fs->blksz != 1024) { - bg_idx = blknr / blk_per_grp; - } else { - bg_idx = blknr / blk_per_grp; + bg_idx = blknr / blk_per_grp; + if (fs->blksz == 1024) { remainder = blknr % blk_per_grp; if (!remainder) bg_idx--; @@ -499,10 +483,8 @@ static int ext4fs_delete_file(int inodeno) no_blocks++; for (i = 0; i < no_blocks; i++) { blknr = read_allocated_block(&inode, i); - if (fs->blksz != 1024) { - bg_idx = blknr / blk_per_grp; - } else { - bg_idx = blknr / blk_per_grp; + bg_idx = blknr / blk_per_grp; + if (fs->blksz == 1024) { remainder = blknr % blk_per_grp; if (!remainder) bg_idx--; From 8b454eeeea0ba021ee27f3e103daf1f8fa87bd16 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 6 May 2014 09:36:05 +0200 Subject: [PATCH 045/105] fs:ext4:write:fix: Reinitialize global variables after updating a file This bug shows up when file stored on the ext4 file system is updated. The ext4fs_delete_file() is responsible for deleting file's (e.g. uImage) data. However some global data (especially ext4fs_indir2_block), which is used during file deletion are left unchanged. The ext4fs_indir2_block pointer stores reference to old ext4 double indirect allocated blocks. When it is unchanged, after file deletion, ext4fs_write_file() uses the same pointer (since it is already initialized - i.e. not NULL) to return number of blocks to write. This trunks larger file when previous one was smaller. Lets consider following scenario: 1. Flash target with ext4 formatted boot.img (which has uImage [*] on itself) 2. Developer wants to upload their custom uImage [**] - When new uImage [**] is smaller than the [*] - everything works correctly - we are able to store the whole smaller file with corrupted ext4fs_indir2_block pointer - When new uImage [**] is larger than the [*] - theCRC is corrupted, since truncation on data stored at eMMC was done. 3. When uImage CRC error appears, then reboot and LTHOR/DFU reflashing causes proper setting of ext4fs_indir2_block() and after that uImage[**] is successfully stored (correct uImage [*] metadata is stored at an eMMC on the first flashing). Due to above the bug was very difficult to reproduce. This patch sets default values for all ext4fs_indir* pointers/variables. Signed-off-by: Lukasz Majewski --- fs/ext4/ext4_common.c | 35 ++++++++++++++++++++++++++--------- fs/ext4/ext4_write.c | 1 + include/ext4fs.h | 1 + 3 files changed, 28 insertions(+), 9 deletions(-) diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index 62e2e804928..1c1172163c0 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -1841,16 +1841,20 @@ long int read_allocated_block(struct ext2_inode *inode, int fileblock) return blknr; } -void ext4fs_close(void) +/** + * ext4fs_reinit_global() - Reinitialize values of ext4 write implementation's + * global pointers + * + * This function assures that for a file with the same name but different size + * the sequential store on the ext4 filesystem will be correct. + * + * In this function the global data, responsible for internal representation + * of the ext4 data are initialized to the reset state. Without this, during + * replacement of the smaller file with the bigger truncation of new file was + * performed. + */ +void ext4fs_reinit_global(void) { - if ((ext4fs_file != NULL) && (ext4fs_root != NULL)) { - ext4fs_free_node(ext4fs_file, &ext4fs_root->diropen); - ext4fs_file = NULL; - } - if (ext4fs_root != NULL) { - free(ext4fs_root); - ext4fs_root = NULL; - } if (ext4fs_indir1_block != NULL) { free(ext4fs_indir1_block); ext4fs_indir1_block = NULL; @@ -1870,6 +1874,19 @@ void ext4fs_close(void) ext4fs_indir3_blkno = -1; } } +void ext4fs_close(void) +{ + if ((ext4fs_file != NULL) && (ext4fs_root != NULL)) { + ext4fs_free_node(ext4fs_file, &ext4fs_root->diropen); + ext4fs_file = NULL; + } + if (ext4fs_root != NULL) { + free(ext4fs_root); + ext4fs_root = NULL; + } + + ext4fs_reinit_global(); +} int ext4fs_iterate_dir(struct ext2fs_node *dir, char *name, struct ext2fs_node **fnode, int *ftype) diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c index 3db22f8f93d..c42add9a7ea 100644 --- a/fs/ext4/ext4_write.c +++ b/fs/ext4/ext4_write.c @@ -562,6 +562,7 @@ static int ext4fs_delete_file(int inodeno) ext4fs_update(); ext4fs_deinit(); + ext4fs_reinit_global(); if (ext4fs_init() != 0) { printf("error in File System init\n"); diff --git a/include/ext4fs.h b/include/ext4fs.h index aacb147de24..fbbb002b167 100644 --- a/include/ext4fs.h +++ b/include/ext4fs.h @@ -133,6 +133,7 @@ int ext4fs_open(const char *filename); int ext4fs_read(char *buf, unsigned len); int ext4fs_mount(unsigned part_length); void ext4fs_close(void); +void ext4fs_reinit_global(void); int ext4fs_ls(const char *dirname); int ext4fs_exists(const char *filename); void ext4fs_free_node(struct ext2fs_node *node, struct ext2fs_node *currroot); From 06118973ede291df8617c4089972cbf888bdc96b Mon Sep 17 00:00:00 2001 From: "Wu, Josh" Date: Thu, 8 May 2014 16:14:05 +0800 Subject: [PATCH 046/105] fs/fat: add fat12 cluster check Signed-off-by: Josh Wu --- include/fat.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/fat.h b/include/fat.h index c8eb7ccd290..65da733aef3 100644 --- a/include/fat.h +++ b/include/fat.h @@ -85,7 +85,9 @@ + (mydata->fatsize != 32 ? 0 : \ (FAT2CPU16((dent)->starthi) << 16))) #define CHECK_CLUST(x, fatsize) ((x) <= 1 || \ - (x) >= ((fatsize) != 32 ? 0xfff0 : 0xffffff0)) + (x) >= ((fatsize) != 32 ? \ + ((fatsize) != 16 ? 0xff0 : 0xfff0) : \ + 0xffffff0)) typedef struct boot_sector { __u8 ignored[3]; /* Bootstrap code */ From 2e98f70882f8c1a09b662137884c1435a97c9a1c Mon Sep 17 00:00:00 2001 From: "Wu, Josh" Date: Thu, 8 May 2014 16:14:06 +0800 Subject: [PATCH 047/105] fs: fat_write: fix the incorrect last cluster checking In fat_write.c, the last clust condition check is incorrect: if ((curclust >= 0xffffff8) || (curclust >= 0xfff8)) { ... ... } For example, in FAT32 if curclust is 0x11000. It is a valid clust. But on above condition check, it will be think as a last clust. So the correct last clust check should be: in fat32, curclust >= 0xffffff8 in fat16, curclust >= 0xfff8 in fat12, curclust >= 0xff8 This patch correct the last clust check. Signed-off-by: Josh Wu --- fs/fat/fat_write.c | 2 +- include/fat.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index cef138ec965..90d6ab63bf7 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -882,7 +882,7 @@ static dir_entry *find_directory_entry(fsdata *mydata, int startsect, } curclust = get_fatent_value(mydata, dir_curclust); - if ((curclust >= 0xffffff8) || (curclust >= 0xfff8)) { + if (IS_LAST_CLUST(curclust, mydata->fatsize)) { empty_dentptr = dentptr; return NULL; } diff --git a/include/fat.h b/include/fat.h index 65da733aef3..81d9790420d 100644 --- a/include/fat.h +++ b/include/fat.h @@ -84,6 +84,9 @@ #define START(dent) (FAT2CPU16((dent)->start) \ + (mydata->fatsize != 32 ? 0 : \ (FAT2CPU16((dent)->starthi) << 16))) +#define IS_LAST_CLUST(x, fatsize) ((x) >= ((fatsize) != 32 ? \ + ((fatsize) != 16 ? 0xff8 : 0xfff8) : \ + 0xffffff8)) #define CHECK_CLUST(x, fatsize) ((x) <= 1 || \ (x) >= ((fatsize) != 32 ? \ ((fatsize) != 16 ? 0xff0 : 0xfff0) : \ From dd6d7967dfa88bd51062a8afb004962d16006ecd Mon Sep 17 00:00:00 2001 From: "Wu, Josh" Date: Thu, 8 May 2014 16:14:07 +0800 Subject: [PATCH 048/105] fs/fat: correct FAT16/12 file finding in root dir When write a file into FAT file system, it will search a match file in root dir. So the find_directory_entry() will get the first cluster of root dir content and search the directory item one by one. If the file is not found, we will call get_fatent_value() to get next cluster of root dir via lookup the FAT table and continue the search. The issue is in FAT16/12 system, we cannot get root dir's next clust from FAT table. The FAT table only be use to find the clust of data aera in FAT16/12. In FAT16/12 if the clust is in root dir, the clust number is a negative number or 0, 1. Since root dir is located in front of the data area. Data area start clust #2. So the root dir clust number should < 2. This patch will check above situation before call get_fatenv_value(). If curclust is < 2, include minus number, we just increase one on the curclust since root dir is in continous cluster. The patch also add a sanity check for entry in get_fatenv_value(). Signed-off-by: Josh Wu --- fs/fat/fat_write.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index 90d6ab63bf7..ba7e3aeb0b6 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -139,6 +139,11 @@ static __u32 get_fatent_value(fsdata *mydata, __u32 entry) __u32 ret = 0x00; __u16 val1, val2; + if (CHECK_CLUST(entry, mydata->fatsize)) { + printf("Error: Invalid FAT entry: 0x%08x\n", entry); + return ret; + } + switch (mydata->fatsize) { case 32: bufnum = entry / FAT32BUFSIZE; @@ -881,6 +886,28 @@ static dir_entry *find_directory_entry(fsdata *mydata, int startsect, return dentptr; } + /* + * In FAT16/12, the root dir is locate before data area, shows + * in following: + * ------------------------------------------------------------- + * | Boot | FAT1 & 2 | Root dir | Data (start from cluster #2) | + * ------------------------------------------------------------- + * + * As a result if curclust is in Root dir, it is a negative + * number or 0, 1. + * + */ + if (mydata->fatsize != 32 && (int)curclust <= 1) { + /* Current clust is in root dir, set to next clust */ + curclust++; + if ((int)curclust <= 1) + continue; /* continue to find */ + + /* Reach the end of root dir */ + empty_dentptr = dentptr; + return NULL; + } + curclust = get_fatent_value(mydata, dir_curclust); if (IS_LAST_CLUST(curclust, mydata->fatsize)) { empty_dentptr = dentptr; From 1b37fa832a4b1d525348ff49c9f6951c73bc145a Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 12 May 2014 13:01:51 -0300 Subject: [PATCH 049/105] boards.cfg: Keep entries sorted Run "tools/reformat.py -i -d '-' -s 8 boards0.cfg && mv boards0 in order to keep the entries sorted. Signed-off-by: Fabio Estevam --- boards.cfg | 2438 ++++++++++++++++++++++++++-------------------------- 1 file changed, 1219 insertions(+), 1219 deletions(-) diff --git a/boards.cfg b/boards.cfg index da46c217ba5..9d90550794c 100644 --- a/boards.cfg +++ b/boards.cfg @@ -43,1225 +43,1225 @@ # Status, Arch, CPU:SPLCPU, SoC, Vendor, Board name, Target, Options, Maintainers ########################################################################################################### -Active aarch64 armv8 - armltd vexpress64 vexpress_aemv8a vexpress_aemv8a:ARM64 David Feng -Active arc arc700 - synopsys - axs101 - Alexey Brodkin -Active arc arc700 - synopsys arcangel4 - Alexey Brodkin -Active arc arc700 - synopsys arcangel4-be - Alexey Brodkin -Active arm arm1136 - armltd integrator integratorcp_cm1136 integratorcp:CM1136 Linus Walleij -Active arm arm1136 mx31 - - imx31_phycore - - -Active arm arm1136 mx31 davedenx - qong - Wolfgang Denk -Active arm arm1136 mx31 freescale - mx31pdk - Fabio Estevam -Active arm arm1136 mx31 hale - tt01 - Helmut Raiger -Active arm arm1136 mx31 logicpd - imx31_litekit - - -Active arm arm1136 mx35 - - woodburn - Stefano Babic -Active arm arm1136 mx35 - woodburn woodburn_sd woodburn_sd:IMX_CONFIG=board/woodburn/imximage.cfg - -Active arm arm1136 mx35 CarMediaLab - flea3 - Stefano Babic -Active arm arm1136 mx35 freescale - mx35pdk - Stefano Babic -Active arm arm1176 bcm2835 raspberrypi rpi_b rpi_b - Stephen Warren -Active arm arm1176 tnetv107x ti tnetv107xevm tnetv107x_evm - Chan-Taek Park -Active arm arm720t - armltd integrator integratorap_cm720t integratorap:CM720T Linus Walleij -Active arm arm920t - armltd integrator integratorap_cm920t integratorap:CM920T Linus Walleij -Active arm arm920t - armltd integrator integratorcp_cm920t integratorcp:CM920T Linus Walleij -Active arm arm920t a320 faraday - a320evb - Po-Yu Chuang -Active arm arm920t at91 atmel at91rm9200ek at91rm9200ek - Andreas Bießmann -Active arm arm920t at91 atmel at91rm9200ek at91rm9200ek_ram at91rm9200ek:RAMBOOT Andreas Bießmann -Active arm arm920t at91 BuS eb_cpux9k2 eb_cpux9k2 - Jens Scharsig -Active arm arm920t at91 BuS eb_cpux9k2 eb_cpux9k2_ram eb_cpux9k2:RAMBOOT Jens Scharsig -Active arm arm920t at91 eukrea cpuat91 cpuat91 - Eric Benard -Active arm arm920t at91 eukrea cpuat91 cpuat91_ram cpuat91:RAMBOOT Eric Benard -Active arm arm920t imx - - scb9328 - Torsten Koschorrek -Active arm arm920t ks8695 - - cm4008 - Greg Ungerer -Active arm arm920t ks8695 - - cm41xx - - -Active arm arm920t s3c24x0 mpl vcma9 VCMA9 - David Müller -Active arm arm920t s3c24x0 samsung - smdk2410 - David Müller -Active arm arm926ejs - armltd integrator integratorap_cm926ejs integratorap:CM926EJ_S Linus Walleij -Active arm arm926ejs - armltd integrator integratorcp_cm926ejs integratorcp:CM924EJ_S Linus Walleij -Active arm arm926ejs armada100 Marvell - aspenite - Prafulla Wadaskar -Active arm arm926ejs armada100 Marvell - gplugd - Ajay Bhargav -Active arm arm926ejs at91 - - afeb9260 - Sergey Lapin -Active arm arm926ejs at91 atmel at91sam9260ek at91sam9260ek_dataflash_cs0 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS0 Stelian Pop -Active arm arm926ejs at91 atmel at91sam9260ek at91sam9260ek_dataflash_cs1 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS1 Stelian Pop -Active arm arm926ejs at91 atmel at91sam9260ek at91sam9260ek_nandflash at91sam9260ek:AT91SAM9260,SYS_USE_NANDFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9260ek at91sam9g20ek_2mmc_nandflash at91sam9260ek:AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9260ek at91sam9g20ek_dataflash_cs0 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS0 Stelian Pop -Active arm arm926ejs at91 atmel at91sam9260ek at91sam9g20ek_dataflash_cs1 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS1 Stelian Pop -Active arm arm926ejs at91 atmel at91sam9260ek at91sam9g20ek_mmc at91sam9260ek:AT91SAM9G20,SYS_USE_MMC Stelian Pop -Active arm arm926ejs at91 atmel at91sam9260ek at91sam9g20ek_nandflash at91sam9260ek:AT91SAM9G20,SYS_USE_NANDFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9260ek at91sam9xeek_dataflash_cs0 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0 Stelian Pop -Active arm arm926ejs at91 atmel at91sam9260ek at91sam9xeek_dataflash_cs1 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 Stelian Pop -Active arm arm926ejs at91 atmel at91sam9260ek at91sam9xeek_nandflash at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9261ek at91sam9261ek_dataflash_cs0 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS0 Stelian Pop -Active arm arm926ejs at91 atmel at91sam9261ek at91sam9261ek_dataflash_cs3 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS3 Stelian Pop -Active arm arm926ejs at91 atmel at91sam9261ek at91sam9261ek_nandflash at91sam9261ek:AT91SAM9261,SYS_USE_NANDFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9261ek at91sam9g10ek_dataflash_cs0 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS0 Stelian Pop -Active arm arm926ejs at91 atmel at91sam9261ek at91sam9g10ek_dataflash_cs3 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS3 Stelian Pop -Active arm arm926ejs at91 atmel at91sam9261ek at91sam9g10ek_nandflash at91sam9261ek:AT91SAM9G10,SYS_USE_NANDFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9263ek at91sam9263ek_dataflash at91sam9263ek:AT91SAM9263,SYS_USE_DATAFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9263ek at91sam9263ek_dataflash_cs0 at91sam9263ek:AT91SAM9263,SYS_USE_DATAFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9263ek at91sam9263ek_nandflash at91sam9263ek:AT91SAM9263,SYS_USE_NANDFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9263ek at91sam9263ek_norflash at91sam9263ek:AT91SAM9263,SYS_USE_NORFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9263ek at91sam9263ek_norflash_boot at91sam9263ek:AT91SAM9263,SYS_USE_BOOT_NORFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9m10g45ek at91sam9m10g45ek_nandflash at91sam9m10g45ek:AT91SAM9M10G45,SYS_USE_NANDFLASH Bo Shen -Active arm arm926ejs at91 atmel at91sam9n12ek at91sam9n12ek_mmc at91sam9n12ek:AT91SAM9N12,SYS_USE_MMC Josh Wu -Active arm arm926ejs at91 atmel at91sam9n12ek at91sam9n12ek_nandflash at91sam9n12ek:AT91SAM9N12,SYS_USE_NANDFLASH Josh Wu -Active arm arm926ejs at91 atmel at91sam9n12ek at91sam9n12ek_spiflash at91sam9n12ek:AT91SAM9N12,SYS_USE_SPIFLASH Josh Wu -Active arm arm926ejs at91 atmel at91sam9rlek at91sam9rlek_dataflash at91sam9rlek:AT91SAM9RL,SYS_USE_DATAFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9rlek at91sam9rlek_nandflash at91sam9rlek:AT91SAM9RL,SYS_USE_NANDFLASH Stelian Pop -Active arm arm926ejs at91 atmel at91sam9x5ek at91sam9x5ek_dataflash at91sam9x5ek:AT91SAM9X5,SYS_USE_DATAFLASH Bo Shen -Active arm arm926ejs at91 atmel at91sam9x5ek at91sam9x5ek_mmc at91sam9x5ek:AT91SAM9X5,SYS_USE_MMC Bo Shen -Active arm arm926ejs at91 atmel at91sam9x5ek at91sam9x5ek_nandflash at91sam9x5ek:AT91SAM9X5,SYS_USE_NANDFLASH Bo Shen -Active arm arm926ejs at91 atmel at91sam9x5ek at91sam9x5ek_spiflash at91sam9x5ek:AT91SAM9X5,SYS_USE_SPIFLASH Bo Shen -Active arm arm926ejs at91 bluewater - snapper9260 snapper9260:AT91SAM9260 Ryan Mallon -Active arm arm926ejs at91 bluewater snapper9260 snapper9g20 snapper9260:AT91SAM9G20 Ryan Mallon -Active arm arm926ejs at91 BuS vl_ma2sc vl_ma2sc - Jens Scharsig -Active arm arm926ejs at91 BuS vl_ma2sc vl_ma2sc_ram vl_ma2sc:RAMLOAD Jens Scharsig -Active arm arm926ejs at91 calao sbc35_a9g20 sbc35_a9g20_eeprom sbc35_a9g20:AT91SAM9G20,SYS_USE_EEPROM Albin Tonnerre -Active arm arm926ejs at91 calao sbc35_a9g20 sbc35_a9g20_nandflash sbc35_a9g20:AT91SAM9G20,SYS_USE_NANDFLASH Albin Tonnerre -Active arm arm926ejs at91 calao tny_a9260 tny_a9260_eeprom tny_a9260:AT91SAM9260,SYS_USE_EEPROM Albin Tonnerre -Active arm arm926ejs at91 calao tny_a9260 tny_a9260_nandflash tny_a9260:AT91SAM9260,SYS_USE_NANDFLASH Albin Tonnerre -Active arm arm926ejs at91 calao tny_a9260 tny_a9g20_eeprom tny_a9260:AT91SAM9G20,SYS_USE_EEPROM Albin Tonnerre -Active arm arm926ejs at91 calao tny_a9260 tny_a9g20_nandflash tny_a9260:AT91SAM9G20,SYS_USE_NANDFLASH Albin Tonnerre -Active arm arm926ejs at91 calao usb_a9263 usb_a9263_dataflash usb_a9263:AT91SAM9263,SYS_USE_DATAFLASH Mateusz Kulikowski -Active arm arm926ejs at91 egnite ethernut5 ethernut5 ethernut5:AT91SAM9XE egnite GmbH -Active arm arm926ejs at91 emk top9000 top9000eval_xe top9000:EVAL9000 Reinhard Meyer -Active arm arm926ejs at91 emk top9000 top9000su_xe top9000:SU9000 Reinhard Meyer -Active arm arm926ejs at91 esd meesc meesc meesc:AT91SAM9263,SYS_USE_NANDFLASH Daniel Gorsulowski -Active arm arm926ejs at91 esd meesc meesc_dataflash meesc:AT91SAM9263,SYS_USE_DATAFLASH Daniel Gorsulowski -Active arm arm926ejs at91 esd otc570 otc570 otc570:AT91SAM9263,SYS_USE_NANDFLASH Daniel Gorsulowski -Active arm arm926ejs at91 esd otc570 otc570_dataflash otc570:AT91SAM9263,SYS_USE_DATAFLASH Daniel Gorsulowski -Active arm arm926ejs at91 eukrea cpu9260 cpu9260 cpu9260:CPU9260 Eric Benard -Active arm arm926ejs at91 eukrea cpu9260 cpu9260_128M cpu9260:CPU9260,CPU9260_128M Eric Benard -Active arm arm926ejs at91 eukrea cpu9260 cpu9260_nand cpu9260:CPU9260,NANDBOOT Eric Benard -Active arm arm926ejs at91 eukrea cpu9260 cpu9260_nand_128M cpu9260:CPU9260,CPU9260_128M,NANDBOOT Eric Benard -Active arm arm926ejs at91 eukrea cpu9260 cpu9G20 cpu9260:CPU9G20 Eric Benard -Active arm arm926ejs at91 eukrea cpu9260 cpu9G20_128M cpu9260:CPU9G20,CPU9G20_128M Eric Benard -Active arm arm926ejs at91 eukrea cpu9260 cpu9G20_nand cpu9260:CPU9G20,NANDBOOT Eric Benard -Active arm arm926ejs at91 eukrea cpu9260 cpu9G20_nand_128M cpu9260:CPU9G20,CPU9G20_128M,NANDBOOT Eric Benard -Active arm arm926ejs at91 ronetix pm9261 pm9261 pm9261:AT91SAM9261 Ilko Iliev -Active arm arm926ejs at91 ronetix pm9263 pm9263 pm9263:AT91SAM9263 Ilko Iliev -Active arm arm926ejs at91 ronetix pm9g45 pm9g45 pm9g45:AT91SAM9G45 Ilko Iliev -Active arm arm926ejs at91 siemens corvus corvus corvus:AT91SAM9M10G45,SYS_USE_NANDFLASH Heiko Schocher -Active arm arm926ejs at91 siemens taurus axm taurus:AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM Heiko Schocher -Active arm arm926ejs at91 siemens taurus taurus taurus:AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS Heiko Schocher -Active arm arm926ejs at91 taskit stamp9g20 portuxg20 stamp9g20:AT91SAM9G20,PORTUXG20 Markus Hubig -Active arm arm926ejs at91 taskit stamp9g20 stamp9g20 stamp9g20:AT91SAM9G20 Markus Hubig -Active arm arm926ejs davinci ait cam_enc_4xx cam_enc_4xx - Heiko Schocher -Active arm arm926ejs davinci Barix ipam390 ipam390 - Heiko Schocher -Active arm arm926ejs davinci davinci da8xxevm da830evm - Nick Thompson -Active arm arm926ejs davinci davinci da8xxevm da850_am18xxevm da850evm:DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50 Sudhakar Rajashekhara -Active arm arm926ejs davinci davinci da8xxevm da850evm da850evm:MAC_ADDR_IN_SPIFLASH Sudhakar Rajashekhara -Active arm arm926ejs davinci davinci da8xxevm da850evm_direct_nor da850evm:MAC_ADDR_IN_SPIFLASH,USE_NOR,DIRECT_NOR_BOOT Sudhakar Rajashekhara -Active arm arm926ejs davinci davinci da8xxevm hawkboard - Syed Mohammed Khasim :Sughosh Ganu -Active arm arm926ejs davinci davinci da8xxevm hawkboard_uart hawkboard:UART_U_BOOT Syed Mohammed Khasim :Sughosh Ganu -Active arm arm926ejs davinci davinci dm355evm davinci_dm355evm - Sandeep Paulraj -Active arm arm926ejs davinci davinci dm355leopard davinci_dm355leopard - Sandeep Paulraj -Active arm arm926ejs davinci davinci dm365evm davinci_dm365evm - Sandeep Paulraj -Active arm arm926ejs davinci davinci dm6467evm davinci_dm6467evm davinci_dm6467evm:REFCLK_FREQ=27000000 Sandeep Paulraj -Active arm arm926ejs davinci davinci dm6467evm davinci_dm6467Tevm davinci_dm6467evm:DAVINCI_DM6467TEVM,REFCLK_FREQ=33000000 Sandeep Paulraj -Active arm arm926ejs davinci davinci dvevm davinci_dvevm - - -Active arm arm926ejs davinci davinci ea20 ea20 - Stefano Babic -Active arm arm926ejs davinci davinci schmoogie davinci_schmoogie - - -Active arm arm926ejs davinci davinci sffsdr davinci_sffsdr - - -Active arm arm926ejs davinci davinci sonata davinci_sonata - - -Active arm arm926ejs davinci enbw enbw_cmc enbw_cmc - Heiko Schocher -Active arm arm926ejs davinci omicron calimain calimain - Manfred Rudigier :Christian Riesch -Active arm arm926ejs kirkwood buffalo lsxl lschlv2 lsxl:LSCHLV2 Michael Walle -Active arm arm926ejs kirkwood buffalo lsxl lsxhl lsxl:LSXHL Michael Walle -Active arm arm926ejs kirkwood cloudengines - pogo_e02 - Dave Purdy -Active arm arm926ejs kirkwood d-link - dns325 - Stefan Herbrechtsmeier -Active arm arm926ejs kirkwood iomega - iconnect - Luka Perkov -Active arm arm926ejs kirkwood karo tk71 tk71 - - -Active arm arm926ejs kirkwood keymile km_arm km_kirkwood km_kirkwood:KM_KIRKWOOD Valentin Longchamp -Active arm arm926ejs kirkwood keymile km_arm km_kirkwood_128m16 km_kirkwood:KM_KIRKWOOD_128M16 Valentin Longchamp -Active arm arm926ejs kirkwood keymile km_arm km_kirkwood_pci km_kirkwood:KM_KIRKWOOD_PCI Valentin Longchamp -Active arm arm926ejs kirkwood keymile km_arm kmcoge5un km_kirkwood:KM_COGE5UN Valentin Longchamp -Active arm arm926ejs kirkwood keymile km_arm kmnusa km_kirkwood:KM_NUSA Valentin Longchamp -Active arm arm926ejs kirkwood keymile km_arm kmsugp1 km_kirkwood:KM_SUGP1 Valentin Longchamp -Active arm arm926ejs kirkwood keymile km_arm kmsuv31 km_kirkwood:KM_SUV31 Valentin Longchamp -Active arm arm926ejs kirkwood keymile km_arm mgcoge3un km_kirkwood:KM_MGCOGE3UN Valentin Longchamp -Active arm arm926ejs kirkwood keymile km_arm portl2 km_kirkwood:KM_PORTL2 Valentin Longchamp -Active arm arm926ejs kirkwood LaCie net2big_v2 d2net_v2 lacie_kw:D2NET_V2 - -Active arm arm926ejs kirkwood LaCie net2big_v2 net2big_v2 lacie_kw:NET2BIG_V2 Simon Guinot -Active arm arm926ejs kirkwood LaCie netspace_v2 inetspace_v2 lacie_kw:INETSPACE_V2 Simon Guinot -Active arm arm926ejs kirkwood LaCie netspace_v2 netspace_lite_v2 lacie_kw:NETSPACE_LITE_V2 - -Active arm arm926ejs kirkwood LaCie netspace_v2 netspace_max_v2 lacie_kw:NETSPACE_MAX_V2 Simon Guinot -Active arm arm926ejs kirkwood LaCie netspace_v2 netspace_mini_v2 lacie_kw:NETSPACE_MINI_V2 - -Active arm arm926ejs kirkwood LaCie netspace_v2 netspace_v2 lacie_kw:NETSPACE_V2 Simon Guinot -Active arm arm926ejs kirkwood LaCie wireless_space wireless_space - - -Active arm arm926ejs kirkwood Marvell - dreamplug - Jason Cooper -Active arm arm926ejs kirkwood Marvell - guruplug - Siddarth Gore -Active arm arm926ejs kirkwood Marvell - mv88f6281gtw_ge - Prafulla Wadaskar -Active arm arm926ejs kirkwood Marvell - rd6281a - Prafulla Wadaskar -Active arm arm926ejs kirkwood Marvell - sheevaplug - Prafulla Wadaskar -Active arm arm926ejs kirkwood Marvell openrd openrd_base openrd:BOARD_IS_OPENRD_BASE Prafulla Wadaskar -Active arm arm926ejs kirkwood Marvell openrd openrd_client openrd:BOARD_IS_OPENRD_CLIENT - -Active arm arm926ejs kirkwood Marvell openrd openrd_ultimate openrd:BOARD_IS_OPENRD_ULTIMATE - -Active arm arm926ejs kirkwood raidsonic ib62x0 ib62x0 - Luka Perkov -Active arm arm926ejs kirkwood Seagate - dockstar - Eric Cooper -Active arm arm926ejs kirkwood Seagate - goflexhome - Suriyan Ramasami -Active arm arm926ejs lpc32xx timll devkit3250 devkit3250 - Vladimir Zapolskiy -Active arm arm926ejs mb86r0x syteco jadecpu jadecpu - Matthias Weisser -Active arm arm926ejs mx25 freescale mx25pdk mx25pdk mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg Fabio Estevam -Active arm arm926ejs mx25 karo tx25 tx25 - John Rigby -Active arm arm926ejs mx25 syteco zmx25 zmx25 - Matthias Weisser -Active arm arm926ejs mx27 armadeus apf27 apf27 - Philippe Reynes :Eric Jarrige -Active arm arm926ejs mx27 logicpd imx27lite imx27lite - Wolfgang Denk -Active arm arm926ejs mx27 logicpd imx27lite magnesium - Heiko Schocher -Active arm arm926ejs mxs bluegiga apx4devkit apx4devkit - Lauri Hintsala -Active arm arm926ejs mxs creative xfi3 xfi3 - Marek Vasut -Active arm arm926ejs mxs denx m28evk m28evk - Marek Vasut -Active arm arm926ejs mxs freescale mx23evk mx23evk - Otavio Salvador -Active arm arm926ejs mxs freescale mx28evk mx28evk mx28evk:ENV_IS_IN_MMC Fabio Estevam -Active arm arm926ejs mxs freescale mx28evk mx28evk_auart_console mx28evk:MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE,ENV_IS_IN_MMC Fabio Estevam -Active arm arm926ejs mxs freescale mx28evk mx28evk_nand mx28evk:ENV_IS_IN_NAND Fabio Estevam -Active arm arm926ejs mxs olimex mx23_olinuxino mx23_olinuxino - Marek Vasut -Active arm arm926ejs mxs ppcag bg0900 bg0900 - Marek Vasut -Active arm arm926ejs mxs sandisk sansa_fuze_plus sansa_fuze_plus - Marek Vasut -Active arm arm926ejs mxs schulercontrol sc_sps_1 sc_sps_1 - Marek Vasut -Active arm arm926ejs nomadik st nhk8815 nhk8815 - Nomadik Linux Team :Alessandro Rubini -Active arm arm926ejs nomadik st nhk8815 nhk8815_onenand nhk8815:BOOT_ONENAND Nomadik Linux Team :Alessandro Rubini -Active arm arm926ejs omap ti - omap5912osk - Rishi Bhattacharya -Active arm arm926ejs orion5x LaCie - edminiv2 - Albert ARIBAUD -Active arm arm926ejs pantheon Marvell - dkb - Lei Wen -Active arm arm926ejs spear spear - x600 - Stefan Roese -Active arm arm926ejs spear spear spear300 spear300 spear3xx_evb:spear300 Vipin Kumar -Active arm arm926ejs spear spear spear300 spear300_nand spear3xx_evb:spear300,nand - -Active arm arm926ejs spear spear spear300 spear300_usbtty spear3xx_evb:spear300,usbtty - -Active arm arm926ejs spear spear spear300 spear300_usbtty_nand spear3xx_evb:spear300,usbtty,nand - -Active arm arm926ejs spear spear spear310 spear310 spear3xx_evb:spear310 Vipin Kumar -Active arm arm926ejs spear spear spear310 spear310_nand spear3xx_evb:spear310,nand - -Active arm arm926ejs spear spear spear310 spear310_pnor spear3xx_evb:spear310,FLASH_PNOR - -Active arm arm926ejs spear spear spear310 spear310_usbtty spear3xx_evb:spear310,usbtty - -Active arm arm926ejs spear spear spear310 spear310_usbtty_nand spear3xx_evb:spear310,usbtty,nand - -Active arm arm926ejs spear spear spear310 spear310_usbtty_pnor spear3xx_evb:spear310,usbtty,FLASH_PNOR - -Active arm arm926ejs spear spear spear320 spear320 spear3xx_evb:spear320 Vipin Kumar -Active arm arm926ejs spear spear spear320 spear320_nand spear3xx_evb:spear320,nand - -Active arm arm926ejs spear spear spear320 spear320_pnor spear3xx_evb:spear320,FLASH_PNOR - -Active arm arm926ejs spear spear spear320 spear320_usbtty spear3xx_evb:spear320,usbtty - -Active arm arm926ejs spear spear spear320 spear320_usbtty_nand spear3xx_evb:spear320,usbtty,nand - -Active arm arm926ejs spear spear spear320 spear320_usbtty_pnor spear3xx_evb:spear320,usbtty,FLASH_PNOR - -Active arm arm926ejs spear spear spear600 spear600 spear6xx_evb:spear600 Vipin Kumar -Active arm arm926ejs spear spear spear600 spear600_nand spear6xx_evb:spear600,nand - -Active arm arm926ejs spear spear spear600 spear600_usbtty spear6xx_evb:spear600,usbtty - -Active arm arm926ejs spear spear spear600 spear600_usbtty_nand spear6xx_evb:spear600,usbtty,nand - -Active arm arm926ejs versatile armltd versatile versatileab versatile:ARCH_VERSATILE_AB - -Active arm arm926ejs versatile armltd versatile versatilepb versatile:ARCH_VERSATILE_PB - -Active arm arm926ejs versatile armltd versatile versatileqemu versatile:ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB - -Active arm arm946es - armltd integrator integratorap_cm946es integratorap:CM946ES Linus Walleij -Active arm arm946es - armltd integrator integratorcp_cm946es integratorcp:CM946ES Linus Walleij -Active arm armv7 - armltd vexpress vexpress_ca15_tc2 - - -Active arm armv7 - armltd vexpress vexpress_ca5x2 - Matt Waddel -Active arm armv7 - armltd vexpress vexpress_ca9x4 - Matt Waddel -Active arm armv7 am33xx BuR kwb kwb kwb:SERIAL1,CONS_INDEX=1 Hannes Petermaier -Active arm armv7 am33xx BuR tseries tseries_mmc tseries:SERIAL1,CONS_INDEX=1,EMMC_BOOT Hannes Petermaier -Active arm armv7 am33xx BuR tseries tseries_nand tseries:SERIAL1,CONS_INDEX=1,NAND Hannes Petermaier -Active arm armv7 am33xx BuR tseries tseries_spi tseries:SERIAL1,CONS_INDEX=1,SPI_BOOT,EMMC_BOOT Hannes Petermaier -Active arm armv7 am33xx compulab cm_t335 cm_t335 - Igor Grinberg -Active arm armv7 am33xx isee igep0033 am335x_igep0033 - Enric Balletbo i Serra -Active arm armv7 am33xx phytec pcm051 pcm051_rev1 pcm051:REV1 Lars Poeschel -Active arm armv7 am33xx phytec pcm051 pcm051_rev3 pcm051:REV3 Lars Poeschel -Active arm armv7 am33xx siemens dxr2 dxr2 - Roger Meier -Active arm armv7 am33xx siemens pxm2 pxm2 - Roger Meier -Active arm armv7 am33xx siemens rut rut - Roger Meier -Active arm armv7 am33xx silica pengwyn pengwyn - Lothar Felten -Active arm armv7 am33xx ti am335x am335x_boneblack am335x_evm:SERIAL1,CONS_INDEX=1,EMMC_BOOT Tom Rini -Active arm armv7 am33xx ti am335x am335x_evm am335x_evm:SERIAL1,CONS_INDEX=1,NAND Tom Rini -Active arm armv7 am33xx ti am335x am335x_evm_nor am335x_evm:SERIAL1,CONS_INDEX=1,NAND,NOR Tom Rini -Active arm armv7 am33xx ti am335x am335x_evm_norboot am335x_evm:SERIAL1,CONS_INDEX=1,NOR,NOR_BOOT Tom Rini -Active arm armv7 am33xx ti am335x am335x_evm_spiboot am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT Tom Rini -Active arm armv7 am33xx ti am335x am335x_evm_uart1 am335x_evm:SERIAL2,CONS_INDEX=2,NAND Tom Rini -Active arm armv7 am33xx ti am335x am335x_evm_uart2 am335x_evm:SERIAL3,CONS_INDEX=3,NAND Tom Rini -Active arm armv7 am33xx ti am335x am335x_evm_uart3 am335x_evm:SERIAL4,CONS_INDEX=4,NAND Tom Rini -Active arm armv7 am33xx ti am335x am335x_evm_uart4 am335x_evm:SERIAL5,CONS_INDEX=5,NAND Tom Rini -Active arm armv7 am33xx ti am335x am335x_evm_uart5 am335x_evm:SERIAL6,CONS_INDEX=6,NAND Tom Rini -Active arm armv7 am33xx ti am335x am335x_evm_usbspl am335x_evm:SERIAL1,CONS_INDEX=1,NAND,SPL_USBETH_SUPPORT Tom Rini -Active arm armv7 am33xx ti am43xx am43xx_evm am43xx_evm:SERIAL1,CONS_INDEX=1 Lokesh Vutla -Active arm armv7 am33xx ti ti814x ti814x_evm - Matt Porter -Active arm armv7 am33xx ti ti816x ti816x_evm - - -Active arm armv7 at91 atmel sama5d3_xplained sama5d3_xplained_mmc sama5d3_xplained:SAMA5D3,SYS_USE_MMC Bo Shen -Active arm armv7 at91 atmel sama5d3_xplained sama5d3_xplained_nandflash sama5d3_xplained:SAMA5D3,SYS_USE_NANDFLASH Bo Shen -Active arm armv7 at91 atmel sama5d3xek sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC Bo Shen -Active arm armv7 at91 atmel sama5d3xek sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH Bo Shen -Active arm armv7 at91 atmel sama5d3xek sama5d3xek_spiflash sama5d3xek:SAMA5D3,SYS_USE_SERIALFLASH Bo Shen -Active arm armv7 bcm281xx broadcom bcm28155_ap bcm28155_ap bcm28155_ap Tim Kryger -Active arm armv7 exynos samsung arndale arndale - Inderpal Singh -Active arm armv7 exynos samsung origen origen - Chander Kashyap -Active arm armv7 exynos samsung smdk5250 smdk5250 - Chander Kashyap -Active arm armv7 exynos samsung smdk5250 snow - Rajeshwari Shinde -Active arm armv7 exynos samsung smdk5420 smdk5420 - Rajeshwari Shinde -Active arm armv7 exynos samsung smdkv310 smdkv310 - Chander Kashyap -Active arm armv7 exynos samsung trats trats - Lukasz Majewski -Active arm armv7 exynos samsung trats2 trats2 - Piotr Wilczek -Active arm armv7 exynos samsung universal_c210 s5pc210_universal - Przemyslaw Marczak -Active arm armv7 highbank - highbank highbank - Rob Herring -Active arm armv7 keystone ti k2hk_evm k2hk_evm - Vitaly Andrianov -Active arm armv7 mx5 denx m53evk m53evk m53evk:IMX_CONFIG=board/denx/m53evk/imximage.cfg Marek Vasut -Active arm armv7 mx5 esg ima3-mx53 ima3-mx53 ima3-mx53:IMX_CONFIG=board/esg/ima3-mx53/imximage.cfg - -Active arm armv7 mx5 freescale mx51evk mx51evk mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg Stefano Babic -Active arm armv7 mx5 freescale mx53ard mx53ard mx53ard:IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg Fabio Estevam -Active arm armv7 mx5 freescale mx53evk mx53evk mx53evk:IMX_CONFIG=board/freescale/mx53evk/imximage.cfg Jason Liu -Active arm armv7 mx5 freescale mx53loco mx53loco mx53loco:IMX_CONFIG=board/freescale/mx53loco/imximage.cfg Jason Liu -Active arm armv7 mx5 freescale mx53smd mx53smd mx53smd:IMX_CONFIG=board/freescale/mx53smd/imximage.cfg Fabio Estevam -Active arm armv7 mx5 genesi mx51_efikamx mx51_efikamx mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_mx.cfg - -Active arm armv7 mx5 genesi mx51_efikamx mx51_efikasb mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_sb.cfg - -Active arm armv7 mx5 ttcontrol vision2 vision2 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg Stefano Babic -Active arm armv7 mx6 - udoo udoo_quad udoo:IMX_CONFIG=board/udoo/udoo.cfg,MX6Q,DDR_MB=1024 Fabio Estevam -Active arm armv7 mx6 - wandboard wandboard_dl wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024 Fabio Estevam -Active arm armv7 mx6 - wandboard wandboard_quad wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048 Fabio Estevam -Active arm armv7 mx6 - wandboard wandboard_solo wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512 Fabio Estevam -Active arm armv7 mx6 barco titanium titanium titanium:IMX_CONFIG=board/barco/titanium/imximage.cfg Stefan Roese -Active arm armv7 mx6 boundary nitrogen6x mx6qsabrelite nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE Eric Nelson -Active arm armv7 mx6 boundary nitrogen6x nitrogen6dl nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024 Eric Nelson -Active arm armv7 mx6 boundary nitrogen6x nitrogen6dl2g nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048 Eric Nelson -Active arm armv7 mx6 boundary nitrogen6x nitrogen6q nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024 Eric Nelson -Active arm armv7 mx6 boundary nitrogen6x nitrogen6q2g nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048 Eric Nelson -Active arm armv7 mx6 boundary nitrogen6x nitrogen6s nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512 Eric Nelson -Active arm armv7 mx6 boundary nitrogen6x nitrogen6s1g nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024 Eric Nelson -Active arm armv7 mx6 congatec cgtqmx6eval cgtqmx6qeval cgtqmx6eval:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Leo Sartre -Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg Jason Liu -Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q Fabio Estevam -Active arm armv7 mx6 freescale mx6sabresd mx6dlsabresd mx6sabresd:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL Fabio Estevam -Active arm armv7 mx6 freescale mx6sabresd mx6qsabresd mx6sabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Fabio Estevam -Active arm armv7 mx6 freescale mx6slevk mx6slevk mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL Fabio Estevam -Active arm armv7 mx6 gateworks gw_ventana gwventanadl gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6DL,DDR_MB=512 Tim Harvey -Active arm armv7 mx6 gateworks gw_ventana gwventanadl1g gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6DL,DDR_MB=1024 Tim Harvey -Active arm armv7 mx6 gateworks gw_ventana gwventanaq gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=512 Tim Harvey -Active arm armv7 mx6 gateworks gw_ventana gwventanaq1g gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=1024 Tim Harvey -Active arm armv7 mx6 gateworks gw_ventana gwventanaq1gspi gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=1024,SPI_FLASH Tim Harvey -Active arm armv7 mx6 solidrun hummingboard hummingboard_solo hummingboard:IMX_CONFIG=board/solidrun/hummingboard/solo.cfg,MX6S,DDR_MB=512 Jon Nettleton -Active arm armv7 omap3 - overo omap3_overo - Steve Sakoman -Active arm armv7 omap3 - pandora omap3_pandora - Grazvydas Ignotas -Active arm armv7 omap3 8dtech eco5pk eco5pk - Raphael Assenat -Active arm armv7 omap3 comelit dig297 dig297 - Luca Ceresoli -Active arm armv7 omap3 compulab cm_t35 cm_t35 - Igor Grinberg -Active arm armv7 omap3 corscience tricorder tricorder - Thomas Weber -Active arm armv7 omap3 corscience tricorder tricorder_flash tricorder:FLASHCARD Thomas Weber -Active arm armv7 omap3 htkw mcx mcx - Ilya Yanok -Active arm armv7 omap3 isee igep00x0 igep0020 omap3_igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_ONENAND Enric Balletbo i Serra -Active arm armv7 omap3 isee igep00x0 igep0020_nand omap3_igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_NAND - -Active arm armv7 omap3 isee igep00x0 igep0030 omap3_igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_ONENAND Enric Balletbo i Serra -Active arm armv7 omap3 isee igep00x0 igep0030_nand omap3_igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_NAND - -Active arm armv7 omap3 isee igep00x0 igep0032 omap3_igep00x0:MACH_TYPE=MACH_TYPE_IGEP0032,BOOT_ONENAND Enric Balletbo i Serra -Active arm armv7 omap3 logicpd am3517evm am3517_evm - Vaibhav Hiremath -Active arm armv7 omap3 logicpd omap3som omap3_logic - Peter Barada -Active arm armv7 omap3 logicpd zoom1 omap3_zoom1 - Nishanth Menon -Active arm armv7 omap3 matrix_vision mvblx omap3_mvblx - Michael Jones -Active arm armv7 omap3 nokia rx51 nokia_rx51 - Pali Rohár -Active arm armv7 omap3 technexion tao3530 omap3_ha tao3530:SYS_BOARD_OMAP3_HA Stefan Roese -Active arm armv7 omap3 technexion tao3530 tao3530 - Tapani Utriainen -Active arm armv7 omap3 technexion twister twister - Stefano Babic -Active arm armv7 omap3 teejet mt_ventoux mt_ventoux - Stefano Babic -Active arm armv7 omap3 ti am3517crane am3517_crane - Nagendra T S -Active arm armv7 omap3 ti beagle omap3_beagle omap3_beagle:NAND Tom Rini -Active arm armv7 omap3 ti evm omap3_evm - Tom Rini -Active arm armv7 omap3 ti evm omap3_evm_quick_mmc - - -Active arm armv7 omap3 ti evm omap3_evm_quick_nand - - -Active arm armv7 omap3 ti sdp3430 omap3_sdp3430 - Nishanth Menon -Active arm armv7 omap3 timll devkit8000 devkit8000 - Thomas Weber -Active arm armv7 omap4 ti panda omap4_panda - Sricharan R -Active arm armv7 omap4 ti sdp4430 omap4_sdp4430 - Sricharan R -Active arm armv7 omap5 ti dra7xx dra7xx_evm dra7xx_evm:CONS_INDEX=1 Lokesh Vutla -Active arm armv7 omap5 ti dra7xx dra7xx_evm_uart3 dra7xx_evm:CONS_INDEX=3,SPL_YMODEM_SUPPORT Lokesh Vutla -Active arm armv7 omap5 ti dra7xx dra7xx_evm_qspiboot dra7xx_evm:CONS_INDEX=1,QSPI_BOOT Lokesh Vutla -Active arm armv7 omap5 ti omap5_uevm omap5_uevm - - -Active arm armv7 rmobile atmark-techno armadillo-800eva armadillo-800eva - Nobuhiro Iwamatsu -Active arm armv7 rmobile kmc kzm9g kzm9g - Nobuhiro Iwamatsu :Tetsuyuki Kobayashi -Active arm armv7 rmobile renesas koelsch koelsch - Nobuhiro Iwamatsu -Active arm armv7 rmobile renesas koelsch koelsch_nor koelsch:NORFLASH Nobuhiro Iwamatsu -Active arm armv7 rmobile renesas lager lager - Nobuhiro Iwamatsu -Active arm armv7 rmobile renesas lager lager_nor lager:NORFLASH Nobuhiro Iwamatsu -Active arm armv7 s5pc1xx samsung goni s5p_goni - Mateusz Zalega -Active arm armv7 s5pc1xx samsung smdkc100 smdkc100 - Minkyu Kang -Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - - -Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier -Active arm armv7 u8500 st-ericsson u8500 u8500_href - - -Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang -Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek :Jagannadha Sutradharudu Teki -Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek :Jagannadha Sutradharudu Teki -Active arm armv7 zynq xilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek :Jagannadha Sutradharudu Teki -Active arm armv7 zynq xilinx zynq zynq_zc770_xm012 zynq_zc770:ZC770_XM012 Michal Simek :Jagannadha Sutradharudu Teki -Active arm armv7 zynq xilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek :Jagannadha Sutradharudu Teki -Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek :Jagannadha Sutradharudu Teki -Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren -Active arm armv7:arm720t tegra124 nvidia jetson-tk1 jetson-tk1 jetson-tk1:BOARD_JETSON_TK1= Stephen Warren -Active arm armv7:arm720t tegra124 nvidia venice2 venice2 - Tom Warren -Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel -Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel -Active arm armv7:arm720t tegra20 avionic-design tec tec - Alban Bedel -Active arm armv7:arm720t tegra20 compal paz00 paz00 - Tom Warren :Stephen Warren -Active arm armv7:arm720t tegra20 compulab trimslice trimslice - Tom Warren :Stephen Warren -Active arm armv7:arm720t tegra20 nvidia harmony harmony - Tom Warren -Active arm armv7:arm720t tegra20 nvidia seaboard seaboard - Tom Warren -Active arm armv7:arm720t tegra20 nvidia ventana ventana - Tom Warren :Stephen Warren -Active arm armv7:arm720t tegra20 nvidia whistler whistler - Tom Warren :Stephen Warren -Active arm armv7:arm720t tegra20 toradex colibri_t20_iris colibri_t20_iris - Lucas Stach -Active arm armv7:arm720t tegra30 avionic-design tec-ng tec-ng - Alban Bedel -Active arm armv7:arm720t tegra30 nvidia beaver beaver - Tom Warren :Stephen Warren -Active arm armv7:arm720t tegra30 nvidia cardhu cardhu - Tom Warren -Active arm pxa - - - balloon3 - Marek Vasut -Active arm pxa - - - h2200 - Lukasz Dalek -Active arm pxa - - - palmld - Marek Vasut -Active arm pxa - - - palmtc - Marek Vasut -Active arm pxa - - - palmtreo680 - Mike Dunn -Active arm pxa - - - pxa255_idp - Cliff Brake -Active arm pxa - - - trizepsiv - Stefano Babic -Active arm pxa - - - xaeniax - - -Active arm pxa - - - zipitz2 - Marek Vasut -Active arm pxa - - trizepsiv polaris trizepsiv:POLARIS Stefano Babic -Active arm pxa - - vpac270 vpac270_nor_128 vpac270:NOR,RAM_128M Marek Vasut -Active arm pxa - - vpac270 vpac270_nor_256 vpac270:NOR,RAM_256M Marek Vasut -Active arm pxa - - vpac270 vpac270_ond_256 vpac270:ONENAND,RAM_256M Marek Vasut -Active arm pxa - icpdas lp8x4x lp8x4x - Sergey Yanovich -Active arm pxa - toradex - colibri_pxa270 - Marek Vasut -Active arm sa1100 - - - jornada - Kristoffer Ericson -Active avr32 at32ap at32ap700x atmel - atngw100 - Haavard Skinnemoen -Active avr32 at32ap at32ap700x atmel - atngw100mkii - Andreas Bießmann -Active avr32 at32ap at32ap700x atmel atstk1000 atstk1002 - Haavard Skinnemoen -Active avr32 at32ap at32ap700x atmel atstk1000 atstk1003 - Haavard Skinnemoen -Active avr32 at32ap at32ap700x atmel atstk1000 atstk1004 - Haavard Skinnemoen -Active avr32 at32ap at32ap700x atmel atstk1000 atstk1006 - Haavard Skinnemoen -Active avr32 at32ap at32ap700x earthlcd - favr-32-ezkit - Hans-Christian Egtvedt -Active avr32 at32ap at32ap700x in-circuit - grasshopper - Andreas Bießmann -Active avr32 at32ap at32ap700x mimc - mimc200 - Mark Jackson -Active avr32 at32ap at32ap700x miromico - hammerhead - Julien May :Alex Raimondi -Active blackfin blackfin - - - bct-brettl2 - Peter Meerwald -Active blackfin blackfin - - - bf506f-ezkit - Sonic Zhang -Active blackfin blackfin - - - bf518f-ezbrd - Sonic Zhang -Active blackfin blackfin - - - bf525-ucr2 - Haitao Zhang :Chong Huang -Active blackfin blackfin - - - bf526-ezbrd - Sonic Zhang -Active blackfin blackfin - - - bf527-ad7160-eval - Sonic Zhang -Active blackfin blackfin - - - bf527-ezkit - Sonic Zhang -Active blackfin blackfin - - - bf527-sdp - Sonic Zhang -Active blackfin blackfin - - - bf533-ezkit - Sonic Zhang -Active blackfin blackfin - - - bf533-stamp - Sonic Zhang -Active blackfin blackfin - - - bf537-minotaur - Martin Strubel -Active blackfin blackfin - - - bf537-pnav - Sonic Zhang -Active blackfin blackfin - - - bf537-srv1 - Martin Strubel -Active blackfin blackfin - - - bf537-stamp - Sonic Zhang -Active blackfin blackfin - - - bf538f-ezkit - Sonic Zhang -Active blackfin blackfin - - - bf548-ezkit - Sonic Zhang -Active blackfin blackfin - - - bf561-acvilon - Anton Shurpin :Valentin Yakovenkov -Active blackfin blackfin - - - bf561-ezkit - Sonic Zhang -Active blackfin blackfin - - - bf609-ezkit - Sonic Zhang -Active blackfin blackfin - - - blackstamp - Wojtek Skulski :Wojtek Skulski :Benjamin Matthews -Active blackfin blackfin - - - blackvme - Wojtek Skulski :Wojtek Skulski :Benjamin Matthews -Active blackfin blackfin - - - br4 - Dimitar Penev -Active blackfin blackfin - - - dnp5370 - M.Hasewinkel (MHA) -Active blackfin blackfin - - - ibf-dsp561 - I-SYST Micromodule -Active blackfin blackfin - - - ip04 - Brent Kandetzki -Active blackfin blackfin - - - pr1 - Dimitar Penev -Active blackfin blackfin - - bf527-ezkit bf527-ezkit-v2 bf527-ezkit:BF527_EZKIT_REV_2_1 Sonic Zhang -Active m68k mcf5227x - freescale m52277evb M52277EVB M52277EVB:SYS_SPANSION_BOOT,SYS_TEXT_BASE=0x00000000 TsiChung Liew -Active m68k mcf5227x - freescale m52277evb M52277EVB_stmicro M52277EVB:CF_SBF,SYS_STMICRO_BOOT,SYS_TEXT_BASE=0x43E00000 TsiChung Liew -Active m68k mcf523x - freescale m5235evb M5235EVB M5235EVB:SYS_TEXT_BASE=0xFFE00000 TsiChung Liew -Active m68k mcf523x - freescale m5235evb M5235EVB_Flash32 M5235EVB:NORFLASH_PS32BIT,SYS_TEXT_BASE=0xFFC00000 TsiChung Liew -Active m68k mcf52x2 - - cobra5272 cobra5272 - - -Active m68k mcf52x2 - BuS eb_cpu5282 eb_cpu5282 eb_cpu5282:SYS_TEXT_BASE=0xFF000000,SYS_MONITOR_BASE=0xFF000400 Jens Scharsig -Active m68k mcf52x2 - BuS eb_cpu5282 eb_cpu5282_internal eb_cpu5282:SYS_TEXT_BASE=0xF0000000,SYS_MONITOR_BASE=0xF0000418 Jens Scharsig -Active m68k mcf52x2 - esd tasreg TASREG - Matthias Fuchs -Active m68k mcf52x2 - freescale m5208evbe M5208EVBE - - -Active m68k mcf52x2 - freescale m5249evb M5249EVB - - -Active m68k mcf52x2 - freescale m5253demo M5253DEMO - TsiChung Liew -Active m68k mcf52x2 - freescale m5253evbe M5253EVBE - Hayden Fraser -Active m68k mcf52x2 - freescale m5272c3 M5272C3 - - -Active m68k mcf52x2 - freescale m5275evb M5275EVB - - -Active m68k mcf52x2 - freescale m5282evb M5282EVB - - -Active m68k mcf532x - astro mcf5373l astro_mcf5373l - Wolfgang Wegner -Active m68k mcf532x - freescale m53017evb M53017EVB - TsiChung Liew -Active m68k mcf532x - freescale m5329evb M5329AFEE M5329EVB:NANDFLASH_SIZE=0 TsiChung Liew -Active m68k mcf532x - freescale m5329evb M5329BFEE M5329EVB:NANDFLASH_SIZE=16 TsiChung Liew -Active m68k mcf532x - freescale m5373evb M5373EVB M5373EVB:NANDFLASH_SIZE=16 TsiChung Liew -Active m68k mcf5445x - freescale m54418twr M54418TWR M54418TWR:CF_SBF,SYS_SERIAL_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000 - -Active m68k mcf5445x - freescale m54418twr M54418TWR_nand_mii M54418TWR:SYS_NAND_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=25000000 - -Active m68k mcf5445x - freescale m54418twr M54418TWR_nand_rmii M54418TWR:SYS_NAND_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000 - -Active m68k mcf5445x - freescale m54418twr M54418TWR_nand_rmii_lowfreq M54418TWR:SYS_NAND_BOOT,LOW_MCFCLK,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000 - -Active m68k mcf5445x - freescale m54418twr M54418TWR_serial_mii M54418TWR:CF_SBF,SYS_SERIAL_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=25000000 - -Active m68k mcf5445x - freescale m54418twr M54418TWR_serial_rmii M54418TWR:CF_SBF,SYS_SERIAL_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000 - -Active m68k mcf5445x - freescale m54451evb M54451EVB M54451EVB:SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=24000000 - -Active m68k mcf5445x - freescale m54451evb M54451EVB_stmicro M54451EVB:CF_SBF,SYS_STMICRO_BOOT,SYS_TEXT_BASE=0x47e00000,SYS_INPUT_CLKSRC=24000000 - -Active m68k mcf5445x - freescale m54455evb M54455EVB M54455EVB:SYS_ATMEL_BOOT,SYS_TEXT_BASE=0x04000000,SYS_INPUT_CLKSRC=33333333 TsiChung Liew -Active m68k mcf5445x - freescale m54455evb M54455EVB_a66 M54455EVB:SYS_ATMEL_BOOT,SYS_TEXT_BASE=0x04000000,SYS_INPUT_CLKSRC=66666666 TsiChung Liew -Active m68k mcf5445x - freescale m54455evb M54455EVB_i66 M54455EVB:SYS_INTEL_BOOT,SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=66666666 TsiChung Liew -Active m68k mcf5445x - freescale m54455evb M54455EVB_intel M54455EVB:SYS_INTEL_BOOT,SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=33333333 TsiChung Liew -Active m68k mcf5445x - freescale m54455evb M54455EVB_stm33 M54455EVB:SYS_STMICRO_BOOT,CF_SBF,SYS_TEXT_BASE=0x4FE00000,SYS_INPUT_CLKSRC=33333333 TsiChung Liew -Active m68k mcf547x_8x - freescale m547xevb M5475AFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64 TsiChung Liew -Active m68k mcf547x_8x - freescale m547xevb M5475BFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16 TsiChung Liew -Active m68k mcf547x_8x - freescale m547xevb M5475CFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL TsiChung Liew -Active m68k mcf547x_8x - freescale m547xevb M5475DFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL TsiChung Liew -Active m68k mcf547x_8x - freescale m547xevb M5475EFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL TsiChung Liew -Active m68k mcf547x_8x - freescale m547xevb M5475FFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64 TsiChung Liew -Active m68k mcf547x_8x - freescale m547xevb M5475GFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=4,SYS_DRAMSZ=64 TsiChung Liew -Active m68k mcf547x_8x - freescale m548xevb M5485AFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64 TsiChung Liew -Active m68k mcf547x_8x - freescale m548xevb M5485BFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16 TsiChung Liew -Active m68k mcf547x_8x - freescale m548xevb M5485CFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL TsiChung Liew -Active m68k mcf547x_8x - freescale m548xevb M5485DFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL TsiChung Liew -Active m68k mcf547x_8x - freescale m548xevb M5485EFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL TsiChung Liew -Active m68k mcf547x_8x - freescale m548xevb M5485FFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64 TsiChung Liew -Active m68k mcf547x_8x - freescale m548xevb M5485GFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=4,SYS_DRAMSZ=64 TsiChung Liew -Active m68k mcf547x_8x - freescale m548xevb M5485HFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO TsiChung Liew -Active microblaze microblaze - xilinx microblaze-generic microblaze-generic - Michal Simek -Active mips mips32 - - qemu-mips qemu_mips qemu-mips:SYS_BIG_ENDIAN Vlad Lungu -Active mips mips32 - - qemu-mips qemu_mipsel qemu-mips:SYS_LITTLE_ENDIAN - -Active mips mips32 - imgtec malta malta malta:SYS_BIG_ENDIAN Paul Burton -Active mips mips32 - imgtec malta maltael malta:SYS_LITTLE_ENDIAN Paul Burton -Active mips mips32 - micronas vct vct_platinum vct:VCT_PLATINUM - -Active mips mips32 - micronas vct vct_platinum_onenand vct:VCT_PLATINUM,VCT_ONENAND - -Active mips mips32 - micronas vct vct_platinum_onenand_small vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE - -Active mips mips32 - micronas vct vct_platinum_small vct:VCT_PLATINUM,VCT_SMALL_IMAGE - -Active mips mips32 - micronas vct vct_platinumavc vct:VCT_PLATINUMAVC - -Active mips mips32 - micronas vct vct_platinumavc_onenand vct:VCT_PLATINUMAVC,VCT_ONENAND - -Active mips mips32 - micronas vct vct_platinumavc_onenand_small vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE - -Active mips mips32 - micronas vct vct_platinumavc_small vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE - -Active mips mips32 - micronas vct vct_premium vct:VCT_PREMIUM - -Active mips mips32 - micronas vct vct_premium_onenand vct:VCT_PREMIUM,VCT_ONENAND - -Active mips mips32 - micronas vct vct_premium_onenand_small vct:VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE - -Active mips mips32 - micronas vct vct_premium_small vct:VCT_PREMIUM,VCT_SMALL_IMAGE - -Active mips mips32 au1x00 - dbau1x00 dbau1000 dbau1x00:DBAU1000 Thomas Lange -Active mips mips32 au1x00 - dbau1x00 dbau1100 dbau1x00:DBAU1100 Thomas Lange -Active mips mips32 au1x00 - dbau1x00 dbau1500 dbau1x00:DBAU1500 Thomas Lange -Active mips mips32 au1x00 - dbau1x00 dbau1550 dbau1x00:DBAU1550 Thomas Lange -Active mips mips32 au1x00 - dbau1x00 dbau1550_el dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN Thomas Lange -Active mips mips32 au1x00 - pb1x00 pb1000 pb1x00:PB1000 - -Active mips mips64 - - qemu-mips qemu_mips64 qemu-mips64:SYS_BIG_ENDIAN - -Active mips mips64 - - qemu-mips qemu_mips64el qemu-mips64:SYS_LITTLE_ENDIAN - -Active nds32 n1213 ag101 AndesTech adp-ag101 adp-ag101 - Andes -Active nds32 n1213 ag101 AndesTech adp-ag101p adp-ag101p - Andes -Active nds32 n1213 ag102 AndesTech adp-ag102 adp-ag102 - Andes -Active nios2 nios2 - altera nios2-generic nios2-generic - Scott McNutt -Active nios2 nios2 - psyent pci5441 PCI5441 - Scott McNutt -Active nios2 nios2 - psyent pk1c20 PK1C20 - Scott McNutt -Active openrisc or1200 - openrisc openrisc-generic openrisc-generic - Stefan Kristiansson -Active powerpc 74xx_7xx - - - ppmc7xx - - -Active powerpc 74xx_7xx - - evb64260 P3G4 - Wolfgang Denk -Active powerpc 74xx_7xx - eltec elppc ELPPC - - -Active powerpc 74xx_7xx - esd cpci750 CPCI750 - Reinhard Arlt -Active powerpc 74xx_7xx - freescale mpc7448hpc2 mpc7448hpc2 - Roy Zang -Active powerpc 74xx_7xx - Marvell db64360 DB64360 - - -Active powerpc 74xx_7xx - Marvell db64460 DB64460 - - -Active powerpc 74xx_7xx - prodrive p3mx p3m7448 p3mx:P3M7448 Stefan Roese -Active powerpc 74xx_7xx - prodrive p3mx p3m750 p3mx:P3M750 Stefan Roese -Active powerpc mpc512x - - - pdm360ng - Michael Weiss -Active powerpc mpc512x - davedenx - aria - Wolfgang Denk -Active powerpc mpc512x - esd - mecp5123 - Reinhard Arlt -Active powerpc mpc512x - freescale mpc5121ads mpc5121ads - - -Active powerpc mpc512x - freescale mpc5121ads mpc5121ads_rev2 mpc5121ads:MPC5121ADS_REV2 - -Active powerpc mpc512x - ifm ac14xx ac14xx - Anatolij Gustschin -Active powerpc mpc5xx - - cmi cmi_mpc5xx - - -Active powerpc mpc5xx - mpl pati PATI - - -Active powerpc mpc5xxx - - - canmb - - -Active powerpc mpc5xxx - - - cm5200 - - -Active powerpc mpc5xxx - - - inka4x0 - Detlev Zundel -Active powerpc mpc5xxx - - - ipek01 - Wolfgang Grandegger -Active powerpc mpc5xxx - - - jupiter - Heiko Schocher -Active powerpc mpc5xxx - - - motionpro - - -Active powerpc mpc5xxx - - - munices - - -Active powerpc mpc5xxx - - - v38b - - -Active powerpc mpc5xxx - - a3m071 a3m071 - Stefan Roese -Active powerpc mpc5xxx - - a3m071 a4m2k a3m071:A4M2K Stefan Roese -Active powerpc mpc5xxx - - a4m072 a4m072 - Sergei Poselenov -Active powerpc mpc5xxx - - bc3450 BC3450 - - -Active powerpc mpc5xxx - - galaxy5200 galaxy5200 galaxy5200:galaxy5200 Eric Millbrandt -Active powerpc mpc5xxx - - galaxy5200 galaxy5200_LOWBOOT galaxy5200:galaxy5200_LOWBOOT Eric Millbrandt -Active powerpc mpc5xxx - - icecube icecube_5200 IceCube Wolfgang Denk -Active powerpc mpc5xxx - - icecube icecube_5200_DDR IceCube:MPC5200_DDR - -Active powerpc mpc5xxx - - icecube icecube_5200_DDR_LOWBOOT IceCube:SYS_TEXT_BASE=0xFF800000,MPC5200_DDR - -Active powerpc mpc5xxx - - icecube icecube_5200_DDR_LOWBOOT08 IceCube:SYS_TEXT_BASE=0xFF800000,MPC5200_DDR - -Active powerpc mpc5xxx - - icecube icecube_5200_LOWBOOT IceCube:SYS_TEXT_BASE=0xFF000000 - -Active powerpc mpc5xxx - - icecube icecube_5200_LOWBOOT08 IceCube:SYS_TEXT_BASE=0xFF800000 - -Active powerpc mpc5xxx - - icecube Lite5200 IceCube - -Active powerpc mpc5xxx - - icecube Lite5200_LOWBOOT IceCube:SYS_TEXT_BASE=0xFF000000 - -Active powerpc mpc5xxx - - icecube Lite5200_LOWBOOT08 IceCube:SYS_TEXT_BASE=0xFF800000 - -Active powerpc mpc5xxx - - icecube lite5200b IceCube:MPC5200_DDR,LITE5200B - -Active powerpc mpc5xxx - - icecube lite5200b_LOWBOOT IceCube:MPC5200_DDR,LITE5200B,SYS_TEXT_BASE=0xFF000000 - -Active powerpc mpc5xxx - - icecube lite5200b_PM IceCube:MPC5200_DDR,LITE5200B,LITE5200B_PM - -Active powerpc mpc5xxx - - mcc200 mcc200 - - -Active powerpc mpc5xxx - - mcc200 mcc200_COM12 mcc200:CONSOLE_COM12 - -Active powerpc mpc5xxx - - mcc200 mcc200_COM12_highboot mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000 - -Active powerpc mpc5xxx - - mcc200 mcc200_COM12_highboot_SDRAM mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM - -Active powerpc mpc5xxx - - mcc200 mcc200_COM12_SDRAM mcc200:CONSOLE_COM12,MCC200_SDRAM - -Active powerpc mpc5xxx - - mcc200 mcc200_highboot mcc200:SYS_TEXT_BASE=0xFFF00000 - -Active powerpc mpc5xxx - - mcc200 mcc200_highboot_SDRAM mcc200:SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM - -Active powerpc mpc5xxx - - mcc200 mcc200_SDRAM mcc200:MCC200_SDRAM - -Active powerpc mpc5xxx - - mcc200 prs200 mcc200:PRS200,MCC200_SDRAM - -Active powerpc mpc5xxx - - mcc200 prs200_DDR mcc200:PRS200 - -Active powerpc mpc5xxx - - mcc200 prs200_highboot mcc200:PRS200,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM - -Active powerpc mpc5xxx - - mcc200 prs200_highboot_DDR mcc200:PRS200,SYS_TEXT_BASE=0xFFF00000 - -Active powerpc mpc5xxx - - pm520 PM520 - Josef Wagner -Active powerpc mpc5xxx - - pm520 PM520_DDR PM520:MPC5200_DDR Josef Wagner -Active powerpc mpc5xxx - - pm520 PM520_ROMBOOT PM520:BOOT_ROM Josef Wagner -Active powerpc mpc5xxx - - pm520 PM520_ROMBOOT_DDR PM520:MPC5200_DDR,BOOT_ROM Josef Wagner -Active powerpc mpc5xxx - - total5200 Total5200 Total5200:TOTAL5200_REV=1 - -Active powerpc mpc5xxx - - total5200 Total5200_lowboot Total5200:TOTAL5200_REV=1,SYS_TEXT_BASE=0xFE000000 - -Active powerpc mpc5xxx - - total5200 Total5200_Rev2 Total5200:TOTAL5200_REV=2 - -Active powerpc mpc5xxx - - total5200 Total5200_Rev2_lowboot Total5200:TOTAL5200_REV=2,SYS_TEXT_BASE=0xFE000000 - -Active powerpc mpc5xxx - emk top5200 EVAL5200 TOP5200:EVAL5200 Reinhard Meyer -Active powerpc mpc5xxx - emk top5200 MINI5200 TOP5200:MINI5200 Reinhard Meyer -Active powerpc mpc5xxx - emk top5200 TOP5200 TOP5200:TOP5200 Reinhard Meyer -Active powerpc mpc5xxx - esd - cpci5200 - Reinhard Arlt -Active powerpc mpc5xxx - esd - mecp5200 - Reinhard Arlt -Active powerpc mpc5xxx - esd - pf5200 - Reinhard Arlt -Active powerpc mpc5xxx - ifm o2dnt2 O2D o2d Anatolij Gustschin -Active powerpc mpc5xxx - ifm o2dnt2 O2D300 o2d300 Anatolij Gustschin -Active powerpc mpc5xxx - ifm o2dnt2 O2DNT2 o2dnt2 Anatolij Gustschin -Active powerpc mpc5xxx - ifm o2dnt2 O2DNT2_RAMBOOT o2dnt2:SYS_TEXT_BASE=0x00100000 Anatolij Gustschin -Active powerpc mpc5xxx - ifm o2dnt2 O2I o2i Anatolij Gustschin -Active powerpc mpc5xxx - ifm o2dnt2 O2MNT o2mnt Anatolij Gustschin -Active powerpc mpc5xxx - ifm o2dnt2 O2MNT_O2M110 o2mnt:IFM_SENSOR_TYPE="O2M110" Anatolij Gustschin -Active powerpc mpc5xxx - ifm o2dnt2 O2MNT_O2M112 o2mnt:IFM_SENSOR_TYPE="O2M112" Anatolij Gustschin -Active powerpc mpc5xxx - ifm o2dnt2 O2MNT_O2M113 o2mnt:IFM_SENSOR_TYPE="O2M113" Anatolij Gustschin -Active powerpc mpc5xxx - ifm o2dnt2 O3DNT o3dnt Anatolij Gustschin -Active powerpc mpc5xxx - intercontrol digsy_mtc digsy_mtc - Werner Pfister -Active powerpc mpc5xxx - intercontrol digsy_mtc digsy_mtc_RAMBOOT digsy_mtc:SYS_TEXT_BASE=0x00100000 Werner Pfister -Active powerpc mpc5xxx - intercontrol digsy_mtc digsy_mtc_rev5 digsy_mtc:DIGSY_REV5 Werner Pfister -Active powerpc mpc5xxx - intercontrol digsy_mtc digsy_mtc_rev5_RAMBOOT digsy_mtc:SYS_TEXT_BASE=0x00100000,DIGSY_REV5 Werner Pfister -Active powerpc mpc5xxx - manroland - hmi1001 - - -Active powerpc mpc5xxx - manroland - mucmc52 - Heiko Schocher -Active powerpc mpc5xxx - manroland - uc101 - Heiko Schocher -Active powerpc mpc5xxx - phytec pcm030 pcm030 - Jon Smirl -Active powerpc mpc5xxx - phytec pcm030 pcm030_LOWBOOT pcm030:SYS_TEXT_BASE=0xFF000000 Jon Smirl -Active powerpc mpc5xxx - tqc tqm5200 aev - - -Active powerpc mpc5xxx - tqc tqm5200 cam5200 TQM5200:CAM5200,TQM5200S,TQM5200_B - -Active powerpc mpc5xxx - tqc tqm5200 cam5200_niosflash TQM5200:CAM5200,TQM5200S,TQM5200_B,CAM5200_NIOSFLASH - -Active powerpc mpc5xxx - tqc tqm5200 charon - Heiko Schocher -Active powerpc mpc5xxx - tqc tqm5200 fo300 TQM5200:FO300 - -Active powerpc mpc5xxx - tqc tqm5200 MiniFAP TQM5200:MINIFAP - -Active powerpc mpc5xxx - tqc tqm5200 TB5200 - - -Active powerpc mpc5xxx - tqc tqm5200 TB5200_B TB5200:TQM5200_B - -Active powerpc mpc5xxx - tqc tqm5200 TQM5200 - - -Active powerpc mpc5xxx - tqc tqm5200 TQM5200_B TQM5200:TQM5200_B - -Active powerpc mpc5xxx - tqc tqm5200 TQM5200_B_HIGHBOOT TQM5200:TQM5200_B,SYS_TEXT_BASE=0xFFF00000 - -Active powerpc mpc5xxx - tqc tqm5200 TQM5200_STK100 TQM5200:STK52XX_REV100 - -Active powerpc mpc5xxx - tqc tqm5200 TQM5200S TQM5200:TQM5200_B,TQM5200S - -Active powerpc mpc5xxx - tqc tqm5200 TQM5200S_HIGHBOOT TQM5200:TQM5200_B,TQM5200S,SYS_TEXT_BASE=0xFFF00000 - -Active powerpc mpc824x - - - utx8245 - Greg Allen -Active powerpc mpc824x - - a3000 A3000 - - -Active powerpc mpc824x - - cpc45 CPC45 - Josef Wagner -Active powerpc mpc824x - - cpc45 CPC45_ROMBOOT CPC45:BOOT_ROM Josef Wagner -Active powerpc mpc824x - - cu824 CU824 - Wolfgang Denk -Active powerpc mpc824x - - eXalion eXalion - Torsten Demke -Active powerpc mpc824x - - mvblue MVBLUE - - -Active powerpc mpc824x - - sandpoint Sandpoint8240 - Wolfgang Denk -Active powerpc mpc8260 - - - atc - Wolfgang Denk -Active powerpc mpc8260 - - - ep8260 - Frank Panno -Active powerpc mpc8260 - - - ep82xxm - - -Active powerpc mpc8260 - - - gw8260 - Oliver Brown -Active powerpc mpc8260 - - - hymod - Murray Jensen -Active powerpc mpc8260 - - - sacsng - Jerry Van Baren -Active powerpc mpc8260 - - cogent cogent_mpc8260 - Murray Jensen -Active powerpc mpc8260 - - cpu86 CPU86 - Wolfgang Denk -Active powerpc mpc8260 - - cpu86 CPU86_ROMBOOT CPU86:BOOT_ROM Wolfgang Denk -Active powerpc mpc8260 - - cpu87 CPU87 - - -Active powerpc mpc8260 - - cpu87 CPU87_ROMBOOT CPU87:BOOT_ROM - -Active powerpc mpc8260 - - ep8248 ep8248 - Yuli Barcohen -Active powerpc mpc8260 - ids ids8247 IDS8247 - Heiko Schocher -Active powerpc mpc8260 - - iphase4539 IPHASE4539 - Wolfgang Grandegger -Active powerpc mpc8260 - - muas3001 muas3001 - Heiko Schocher -Active powerpc mpc8260 - - muas3001 muas3001_dev muas3001:MUAS_DEV_BOARD Heiko Schocher -Active powerpc mpc8260 - - pm826 PM825 PM826:PCI,SYS_TEXT_BASE=0xFF000000 Wolfgang Denk -Active powerpc mpc8260 - - pm826 PM825_BIGFLASH PM826:PCI,FLASH_32MB,SYS_TEXT_BASE=0x40000000 Wolfgang Denk -Active powerpc mpc8260 - - pm826 PM825_ROMBOOT PM826:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000 Wolfgang Denk -Active powerpc mpc8260 - - pm826 PM825_ROMBOOT_BIGFLASH PM826:PCI,BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000 Wolfgang Denk -Active powerpc mpc8260 - - pm826 PM826 PM826:SYS_TEXT_BASE=0xFF000000 Wolfgang Denk -Active powerpc mpc8260 - - pm826 PM826_BIGFLASH PM826:FLASH_32MB,SYS_TEXT_BASE=0x40000000 Wolfgang Denk -Active powerpc mpc8260 - - pm826 PM826_ROMBOOT PM826:BOOT_ROM,SYS_TEXT_BASE=0xFF800000 Wolfgang Denk -Active powerpc mpc8260 - - pm826 PM826_ROMBOOT_BIGFLASH PM826:BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000 Wolfgang Denk -Active powerpc mpc8260 - - pm828 PM828 - - -Active powerpc mpc8260 - - pm828 PM828_PCI PM828:PCI - -Active powerpc mpc8260 - - pm828 PM828_ROMBOOT PM828:BOOT_ROM,SYS_TEXT_BASE=0xFF800000 - -Active powerpc mpc8260 - - pm828 PM828_ROMBOOT_PCI PM828:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000 - -Active powerpc mpc8260 - freescale mpc8266ads MPC8266ADS - Rune Torgersen -Active powerpc mpc8260 - funkwerk vovpn-gw VoVPN-GW_66MHz VoVPN-GW:CLKIN_66MHz - -Active powerpc mpc8260 - keymile km82xx mgcoge km82xx:MGCOGE Holger Brunck -Active powerpc mpc8260 - keymile km82xx mgcoge3ne km82xx:MGCOGE3NE Holger Brunck -Active powerpc mpc8260 - tqc tqm8260 TQM8255_AA TQM8260:MPC8255,300MHz Wolfgang Denk -Active powerpc mpc8260 - tqc tqm8260 TQM8260_AA TQM8260:MPC8260,200MHz Wolfgang Denk -Active powerpc mpc8260 - tqc tqm8260 TQM8260_AB TQM8260:MPC8260,200MHz,L2_CACHE,BUSMODE_60x Wolfgang Denk -Active powerpc mpc8260 - tqc tqm8260 TQM8260_AC TQM8260:MPC8260,200MHz,L2_CACHE,BUSMODE_60x Wolfgang Denk -Active powerpc mpc8260 - tqc tqm8260 TQM8260_AD TQM8260:MPC8260,300MHz,BUSMODE_60x Wolfgang Denk -Active powerpc mpc8260 - tqc tqm8260 TQM8260_AE TQM8260:MPC8260,266MHz Wolfgang Denk -Active powerpc mpc8260 - tqc tqm8260 TQM8260_AF TQM8260:MPC8260,300MHz,BUSMODE_60x Wolfgang Denk -Active powerpc mpc8260 - tqc tqm8260 TQM8260_AG TQM8260:MPC8260,300MHz Wolfgang Denk -Active powerpc mpc8260 - tqc tqm8260 TQM8260_AH TQM8260:MPC8260,300MHz,L2_CACHE,BUSMODE_60x Wolfgang Denk -Active powerpc mpc8260 - tqc tqm8260 TQM8260_AI TQM8260:MPC8260,300MHz,BUSMODE_60x Wolfgang Denk -Active powerpc mpc8260 - tqc tqm8260 TQM8265_AA TQM8260:MPC8265,300MHz,BUSMODE_60x Wolfgang Denk -Active powerpc mpc8260 - tqc tqm8272 TQM8272 - - -Active powerpc mpc83xx - - - mpc8308_p1m - Ilya Yanok -Active powerpc mpc83xx - - sbc8349 sbc8349 - Paul Gortmaker -Active powerpc mpc83xx - - sbc8349 sbc8349_PCI_33 sbc8349:PCI,PCI_33M Paul Gortmaker -Active powerpc mpc83xx - - sbc8349 sbc8349_PCI_66 sbc8349:PCI,PCI_66M Paul Gortmaker -Active powerpc mpc83xx - - ve8313 ve8313 - Heiko Schocher -Active powerpc mpc83xx - esd vme8349 caddy2 vme8349:CADDY2 Reinhard Arlt -Active powerpc mpc83xx - esd vme8349 vme8349 - Reinhard Arlt -Active powerpc mpc83xx - freescale mpc8308rdb MPC8308RDB - Ilya Yanok -Active powerpc mpc83xx - freescale mpc8313erdb MPC8313ERDB_33 MPC8313ERDB:SYS_33MHZ - -Active powerpc mpc83xx - freescale mpc8313erdb MPC8313ERDB_66 MPC8313ERDB:SYS_66MHZ - -Active powerpc mpc83xx - freescale mpc8313erdb MPC8313ERDB_NAND_33 MPC8313ERDB:SYS_33MHZ,NAND - -Active powerpc mpc83xx - freescale mpc8313erdb MPC8313ERDB_NAND_66 MPC8313ERDB:SYS_66MHZ,NAND - -Active powerpc mpc83xx - freescale mpc8315erdb MPC8315ERDB - Dave Liu -Active powerpc mpc83xx - freescale mpc8315erdb MPC8315ERDB_NAND MPC8315ERDB:NAND_U_BOOT Dave Liu -Active powerpc mpc83xx - freescale mpc8323erdb MPC8323ERDB - Michael Barkowski -Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS - Dave Liu -Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS_ATM MPC832XEMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 Dave Liu -Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS_HOST_33 MPC832XEMDS:PCI,PCI_33M,PQ_MDS_PIB=1 Dave Liu -Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS_HOST_66 MPC832XEMDS:PCI,PCI_66M,PQ_MDS_PIB=1 Dave Liu -Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS_SLAVE MPC832XEMDS:PCI,PCISLAVE Dave Liu -Active powerpc mpc83xx - freescale mpc8349emds MPC8349EMDS - Kim Phillips -Active powerpc mpc83xx - freescale mpc8349itx MPC8349ITX MPC8349ITX:MPC8349ITX - -Active powerpc mpc83xx - freescale mpc8349itx MPC8349ITX_LOWBOOT MPC8349ITX:MPC8349ITX,SYS_TEXT_BASE=0xFE000000 - -Active powerpc mpc83xx - freescale mpc8349itx MPC8349ITXGP MPC8349ITX:MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000 - -Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_33 MPC8360EMDS:CLKIN_33MHZ Dave Liu -Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_33_ATM MPC8360EMDS:CLKIN_33MHZ,PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 Dave Liu -Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_33_HOST_33 MPC8360EMDS:CLKIN_33MHZ,PCI,PCI_33M,PQ_MDS_PIB=1 Dave Liu -Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_33_HOST_66 MPC8360EMDS:CLKIN_33MHZ,PCI,PCI_66M,PQ_MDS_PIB=1 Dave Liu -Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_33_SLAVE MPC8360EMDS:CLKIN_33MHZ,PCI,PCISLAVE Dave Liu -Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66 MPC8360EMDS:CLKIN_66MHZ Dave Liu -Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66_ATM MPC8360EMDS:CLKIN_66MHZ,PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 Dave Liu -Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66_HOST_33 MPC8360EMDS:CLKIN_66MHZ,PCI,PCI_33M,PQ_MDS_PIB=1 Dave Liu -Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66_HOST_66 MPC8360EMDS:CLKIN_66MHZ,PCI,PCI_66M,PQ_MDS_PIB=1 Dave Liu -Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66_SLAVE MPC8360EMDS:CLKIN_66MHZ,PCI,PCISLAVE Dave Liu -Active powerpc mpc83xx - freescale mpc837xemds MPC837XEMDS - Dave Liu -Active powerpc mpc83xx - freescale mpc837xemds MPC837XEMDS_HOST MPC837XEMDS:PCI Dave Liu -Active powerpc mpc83xx - freescale mpc837xerdb MPC837XERDB - Joe D'Abbraccio -Active powerpc mpc83xx - ids ids8313 ids8313 ids8313:SYS_TEXT_BASE=0xFFF00000 Heiko Schocher -Active powerpc mpc83xx - keymile km83xx kmcoge5ne km8360:KMCOGE5NE Holger Brunck -Active powerpc mpc83xx - keymile km83xx kmeter1 km8360:KMETER1 Holger Brunck -Active powerpc mpc83xx - keymile km83xx kmopti2 tuxx1:KMOPTI2 Holger Brunck -Active powerpc mpc83xx - keymile km83xx kmsupx5 tuxx1:KMSUPX5 Heiko Schocher -Active powerpc mpc83xx - keymile km83xx kmvect1 suvd3:KMVECT1 Holger Brunck -Active powerpc mpc83xx - keymile km83xx suvd3 suvd3:SUVD3 Holger Brunck -Active powerpc mpc83xx - keymile km83xx tuge1 tuxx1:TUGE1 Holger Brunck -Active powerpc mpc83xx - keymile km83xx tuxx1 tuxx1:TUXX1 Holger Brunck -Active powerpc mpc83xx - sheldon simpc8313 SIMPC8313_LP SIMPC8313:NAND_LP Ron Madrid -Active powerpc mpc83xx - sheldon simpc8313 SIMPC8313_SP SIMPC8313:NAND_SP Ron Madrid -Active powerpc mpc83xx - tqc tqm834x TQM834x - - -Active powerpc mpc85xx - - sbc8548 sbc8548 - Paul Gortmaker -Active powerpc mpc85xx - - sbc8548 sbc8548_PCI_33 sbc8548:PCI,33 Paul Gortmaker -Active powerpc mpc85xx - - sbc8548 sbc8548_PCI_33_PCIE sbc8548:PCI,33,PCIE Paul Gortmaker -Active powerpc mpc85xx - - sbc8548 sbc8548_PCI_66 sbc8548:PCI,66 Paul Gortmaker -Active powerpc mpc85xx - - sbc8548 sbc8548_PCI_66_PCIE sbc8548:PCI,66,PCIE Paul Gortmaker -Active powerpc mpc85xx - - socrates socrates - - -Active powerpc mpc85xx - exmeritus hww1u1a HWW1U1A - Kyle Moffett -Active powerpc mpc85xx - freescale b4860qds B4420QDS B4860QDS:PPC_B4420 - -Active powerpc mpc85xx - freescale b4860qds B4420QDS_NAND B4860QDS:PPC_B4420,RAMBOOT_PBL,SPL_FSL_PBL,NAND - -Active powerpc mpc85xx - freescale b4860qds B4420QDS_SPIFLASH B4860QDS:PPC_B4420,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale b4860qds B4860QDS B4860QDS:PPC_B4860 - -Active powerpc mpc85xx - freescale b4860qds B4860QDS_SECURE_BOOT B4860QDS:PPC_B4860,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale b4860qds B4860QDS_NAND B4860QDS:PPC_B4860,RAMBOOT_PBL,SPL_FSL_PBL,NAND -Active powerpc mpc85xx - freescale b4860qds B4860QDS_SPIFLASH B4860QDS:PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale b4860qds B4860QDS_SRIO_PCIE_BOOT B4860QDS:PPC_B4860,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale bsc9131rdb BSC9131RDB_NAND BSC9131RDB:BSC9131RDB,NAND Poonam Aggrwal -Active powerpc mpc85xx - freescale bsc9131rdb BSC9131RDB_NAND_SYSCLK100 BSC9131RDB:BSC9131RDB,NAND,SYS_CLK_100 Poonam Aggrwal -Active powerpc mpc85xx - freescale bsc9131rdb BSC9131RDB_SPIFLASH BSC9131RDB:BSC9131RDB,SPIFLASH Poonam Aggrwal -Active powerpc mpc85xx - freescale bsc9131rdb BSC9131RDB_SPIFLASH_SYSCLK100 BSC9131RDB:BSC9131RDB,SPIFLASH,SYS_CLK_100 Poonam Aggrwal -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NAND_DDRCLK100 BSC9132QDS:BSC9132QDS,NAND,SYS_CLK_100_DDR_100 Naveen Burmi -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NAND_DDRCLK133 BSC9132QDS:BSC9132QDS,NAND,SYS_CLK_100_DDR_133 Naveen Burmi -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NOR_DDRCLK100 BSC9132QDS:BSC9132QDS,SYS_CLK_100_DDR_100 Naveen Burmi -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NOR_DDRCLK133 BSC9132QDS:BSC9132QDS,SYS_CLK_100_DDR_133 Naveen Burmi -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SDCARD_DDRCLK100 BSC9132QDS:BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100 Naveen Burmi -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SDCARD_DDRCLK133 BSC9132QDS:BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133 Naveen Burmi -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SPIFLASH_DDRCLK100 BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100 Naveen Burmi -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SPIFLASH_DDRCLK133 BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133 Naveen Burmi -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NOR_DDRCLK100_SECURE BSC9132QDS:BSC9132QDS,SYS_CLK_100_DDR_100,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NOR_DDRCLK133_SECURE BSC9132QDS:BSC9132QDS,SYS_CLK_100_DDR_133,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SDCARD_DDRCLK100_SECURE BSC9132QDS:BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SDCARD_DDRCLK133_SECURE BSC9132QDS:BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SPIFLASH_DDRCLK100_SECURE BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SPIFLASH_DDRCLK133_SECURE BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NAND_DDRCLK100_SECURE BSC9132QDS:BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_100,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NAND_DDRCLK133_SECURE BSC9132QDS:BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_133,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale c29xpcie C29XPCIE C29XPCIE:C29XPCIE,36BIT Po Liu -Active powerpc mpc85xx - freescale c29xpcie C29XPCIE_NAND C29XPCIE:C29XPCIE,36BIT,NAND Po Liu -Active powerpc mpc85xx - freescale c29xpcie C29XPCIE_SPIFLASH C29XPCIE:C29XPCIE,36BIT,SPIFLASH Po Liu -Active powerpc mpc85xx - freescale corenet_ds P3041DS - - -Active powerpc mpc85xx - freescale corenet_ds P3041DS_NAND P3041DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P3041DS_SDCARD P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P3041DS_SECURE_BOOT P3041DS:SECURE_BOOT - -Active powerpc mpc85xx - freescale corenet_ds P3041DS_SPIFLASH P3041DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P3041DS_SRIO_PCIE_BOOT P3041DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P4080DS - - -Active powerpc mpc85xx - freescale corenet_ds P4080DS_SDCARD P4080DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P4080DS_SECURE_BOOT P4080DS:SECURE_BOOT - -Active powerpc mpc85xx - freescale corenet_ds P4080DS_SPIFLASH P4080DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P4080DS_SRIO_PCIE_BOOT P4080DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P5020DS - - -Active powerpc mpc85xx - freescale corenet_ds P5020DS_NAND P5020DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P5020DS_SDCARD P5020DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P5020DS_SECURE_BOOT P5020DS:SECURE_BOOT - -Active powerpc mpc85xx - freescale corenet_ds P5020DS_SPIFLASH P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P5020DS_SRIO_PCIE_BOOT P5020DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P5040DS - - -Active powerpc mpc85xx - freescale corenet_ds P5040DS_NAND P5040DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P5040DS_SDCARD P5040DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale corenet_ds P5040DS_SPIFLASH P5040DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS - - -Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS_36BIT MPC8536DS:36BIT - -Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS_NAND MPC8536DS:NAND - -Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS_SDCARD MPC8536DS:SDCARD - -Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS_SPIFLASH MPC8536DS:SPIFLASH - -Active powerpc mpc85xx - freescale mpc8540ads MPC8540ADS - Kumar Gala -Active powerpc mpc85xx - freescale mpc8541cds MPC8541CDS - Kumar Gala -Active powerpc mpc85xx - freescale mpc8541cds MPC8541CDS_legacy MPC8541CDS:LEGACY Kumar Gala -Active powerpc mpc85xx - freescale mpc8544ds MPC8544DS - - -Active powerpc mpc85xx - freescale mpc8548cds MPC8548CDS - - -Active powerpc mpc85xx - freescale mpc8548cds MPC8548CDS_36BIT MPC8548CDS:36BIT - -Active powerpc mpc85xx - freescale mpc8548cds MPC8548CDS_legacy MPC8548CDS:LEGACY - -Active powerpc mpc85xx - freescale mpc8555cds MPC8555CDS - Kumar Gala -Active powerpc mpc85xx - freescale mpc8555cds MPC8555CDS_legacy MPC8555CDS:LEGACY Kumar Gala -Active powerpc mpc85xx - freescale mpc8560ads MPC8560ADS - Kumar Gala -Active powerpc mpc85xx - freescale mpc8568mds MPC8568MDS - - -Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS - - -Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS_ATM MPC8569MDS:ATM - -Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS_NAND MPC8569MDS:NAND - -Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS - - -Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_36BIT MPC8572DS:36BIT - -Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_NAND MPC8572DS:NAND - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND P1010RDB:P1010RDB_PA,36BIT,NAND - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND_SECBOOT P1010RDB:P1010RDB_PA,36BIT,NAND_SECBOOT,SECURE_BOOT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NOR P1010RDB:P1010RDB_PA,36BIT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NOR_SECBOOT P1010RDB:P1010RDB_PA,36BIT,SECURE_BOOT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_SDCARD P1010RDB:P1010RDB_PA,36BIT,SDCARD - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_SPIFLASH P1010RDB:P1010RDB_PA,36BIT,SPIFLASH - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_SPIFLASH_SECBOOT P1010RDB:P1010RDB_PA,36BIT,SPIFLASH,SECURE_BOOT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_NAND P1010RDB:P1010RDB_PA,NAND - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_NAND_SECBOOT P1010RDB:P1010RDB_PA,NAND_SECBOOT,SECURE_BOOT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_NOR P1010RDB:P1010RDB_PA - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_NOR_SECBOOT P1010RDB:P1010RDB_PA,SECURE_BOOT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_SDCARD P1010RDB:P1010RDB_PA,SDCARD - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_SPIFLASH P1010RDB:P1010RDB_PA,SPIFLASH - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_SPIFLASH_SECBOOT P1010RDB:P1010RDB_PA,SPIFLASH,SECURE_BOOT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_NAND P1010RDB:P1010RDB_PB,36BIT,NAND - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_NAND_SECBOOT P1010RDB:P1010RDB_PB,36BIT,NAND_SECBOOT,SECURE_BOOT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_NOR P1010RDB:P1010RDB_PB,36BIT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_NOR_SECBOOT P1010RDB:P1010RDB_PB,36BIT,SECURE_BOOT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_SDCARD P1010RDB:P1010RDB_PB,36BIT,SDCARD - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_SPIFLASH P1010RDB:P1010RDB_PB,36BIT,SPIFLASH - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_SPIFLASH_SECBOOT P1010RDB:P1010RDB_PB,36BIT,SPIFLASH,SECURE_BOOT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_NAND P1010RDB:P1010RDB_PB,NAND - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_NAND_SECBOOT P1010RDB:P1010RDB_PB,NAND_SECBOOT,SECURE_BOOT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_NOR P1010RDB:P1010RDB_PB - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_NOR_SECBOOT P1010RDB:P1010RDB_PB,SECURE_BOOT - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_SDCARD P1010RDB:P1010RDB_PB,SDCARD - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_SPIFLASH P1010RDB:P1010RDB_PB,SPIFLASH - -Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_SPIFLASH_SECBOOT P1010RDB:P1010RDB_PB,SPIFLASH,SECURE_BOOT - -Active powerpc mpc85xx - freescale p1022ds P1022DS - Timur Tabi -Active powerpc mpc85xx - freescale p1022ds P1022DS_36BIT P1022DS:36BIT Timur Tabi -Active powerpc mpc85xx - freescale p1022ds P1022DS_36BIT_NAND P1022DS:36BIT,NAND Timur Tabi -Active powerpc mpc85xx - freescale p1022ds P1022DS_36BIT_SDCARD P1022DS:36BIT,SDCARD Timur Tabi -Active powerpc mpc85xx - freescale p1022ds P1022DS_36BIT_SPIFLASH P1022DS:36BIT,SPIFLASH Timur Tabi -Active powerpc mpc85xx - freescale p1022ds P1022DS_NAND P1022DS:NAND Timur Tabi -Active powerpc mpc85xx - freescale p1022ds P1022DS_SDCARD P1022DS:SDCARD Timur Tabi -Active powerpc mpc85xx - freescale p1022ds P1022DS_SPIFLASH P1022DS:SPIFLASH Timur Tabi -Active powerpc mpc85xx - freescale p1023rdb P1023RDB - - -Active powerpc mpc85xx - freescale p1023rds P1023RDS - Roy Zang -Active powerpc mpc85xx - freescale p1023rds P1023RDS_NAND P1023RDS:NAND Roy Zang -Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB P1_P2_RDB:P1011RDB - -Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_36BIT P1_P2_RDB:P1011RDB,36BIT - -Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_36BIT_SDCARD P1_P2_RDB:P1011RDB,36BIT,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_36BIT_SPIFLASH P1_P2_RDB:P1011RDB,36BIT,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_NAND P1_P2_RDB:P1011RDB,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_SDCARD P1_P2_RDB:P1011RDB,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_SPIFLASH P1_P2_RDB:P1011RDB,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB P1_P2_RDB:P1020RDB - -Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB_36BIT P1_P2_RDB:P1020RDB,36BIT - -Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB_36BIT_SDCARD P1_P2_RDB:P1020RDB,36BIT,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB_36BIT_SPIFLASH P1_P2_RDB:P1020RDB,36BIT,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB_NAND P1_P2_RDB:P1020RDB,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB_SDCARD P1_P2_RDB:P1020RDB,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB_SPIFLASH P1_P2_RDB:P1020RDB,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB P1_P2_RDB:P2010RDB - -Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB_36BIT P1_P2_RDB:P2010RDB,36BIT - -Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB_36BIT_SDCARD P1_P2_RDB:P2010RDB,36BIT,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB_36BIT_SPIFLASH P1_P2_RDB:P2010RDB,36BIT,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB_NAND P1_P2_RDB:P2010RDB,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB_SDCARD P1_P2_RDB:P2010RDB,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB_SPIFLASH P1_P2_RDB:P2010RDB,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB P1_P2_RDB:P2020RDB Poonam Aggrwal -Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB_36BIT P1_P2_RDB:P2020RDB,36BIT - -Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB_36BIT_SDCARD P1_P2_RDB:P2020RDB,36BIT,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB_36BIT_SPIFLASH P1_P2_RDB:P2020RDB,36BIT,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB_NAND P1_P2_RDB:P2020RDB,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB_SDCARD P1_P2_RDB:P2020RDB,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB_SPIFLASH P1_P2_RDB:P2020RDB,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020MBG-PC p1_p2_rdb_pc:P1020MBG - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020MBG-PC_36BIT p1_p2_rdb_pc:P1020MBG,36BIT - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020MBG-PC_36BIT_SDCARD p1_p2_rdb_pc:P1020MBG,SDCARD,36BIT - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020MBG-PC_SDCARD p1_p2_rdb_pc:P1020MBG,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC p1_p2_rdb_pc:P1020RDB_PC - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_36BIT p1_p2_rdb_pc:P1020RDB_PC,36BIT - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_36BIT_NAND p1_p2_rdb_pc:P1020RDB_PC,36BIT,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_36BIT_SDCARD p1_p2_rdb_pc:P1020RDB_PC,36BIT,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_36BIT_SPIFLASH p1_p2_rdb_pc:P1020RDB_PC,36BIT,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_NAND p1_p2_rdb_pc:P1020RDB_PC,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_SDCARD p1_p2_rdb_pc:P1020RDB_PC,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_SPIFLASH p1_p2_rdb_pc:P1020RDB_PC,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PD p1_p2_rdb_pc:P1020RDB_PD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PD_NAND p1_p2_rdb_pc:P1020RDB_PD,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PD_SDCARD p1_p2_rdb_pc:P1020RDB_PD,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PD_SPIFLASH p1_p2_rdb_pc:P1020RDB_PD,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020UTM-PC p1_p2_rdb_pc:P1020UTM - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020UTM-PC_36BIT p1_p2_rdb_pc:P1020UTM,36BIT - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020UTM-PC_36BIT_SDCARD p1_p2_rdb_pc:P1020UTM,36BIT,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020UTM-PC_SDCARD p1_p2_rdb_pc:P1020UTM,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC p1_p2_rdb_pc:P1021RDB - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_36BIT p1_p2_rdb_pc:P1021RDB,36BIT - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_36BIT_NAND p1_p2_rdb_pc:P1021RDB,36BIT,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_36BIT_SDCARD p1_p2_rdb_pc:P1021RDB,36BIT,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_36BIT_SPIFLASH p1_p2_rdb_pc:P1021RDB,36BIT,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_NAND p1_p2_rdb_pc:P1021RDB,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_SDCARD p1_p2_rdb_pc:P1021RDB,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_SPIFLASH p1_p2_rdb_pc:P1021RDB,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1024RDB p1_p2_rdb_pc:P1024RDB - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1024RDB_36BIT p1_p2_rdb_pc:P1024RDB,36BIT - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1024RDB_NAND p1_p2_rdb_pc:P1024RDB,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1024RDB_SDCARD p1_p2_rdb_pc:P1024RDB,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1024RDB_SPIFLASH p1_p2_rdb_pc:P1024RDB,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1025RDB p1_p2_rdb_pc:P1025RDB - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1025RDB_36BIT p1_p2_rdb_pc:P1025RDB,36BIT - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1025RDB_NAND p1_p2_rdb_pc:P1025RDB,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1025RDB_SDCARD p1_p2_rdb_pc:P1025RDB,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1025RDB_SPIFLASH p1_p2_rdb_pc:P1025RDB,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC p1_p2_rdb_pc:P2020RDB - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_36BIT p1_p2_rdb_pc:P2020RDB,36BIT - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_36BIT_NAND p1_p2_rdb_pc:P2020RDB,36BIT,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_36BIT_SDCARD p1_p2_rdb_pc:P2020RDB,36BIT,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_36BIT_SPIFLASH p1_p2_rdb_pc:P2020RDB,36BIT,SPIFLASH - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_NAND p1_p2_rdb_pc:P2020RDB,NAND - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_SDCARD p1_p2_rdb_pc:P2020RDB,SDCARD - -Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_SPIFLASH p1_p2_rdb_pc:P2020RDB,SPIFLASH - -Active powerpc mpc85xx - freescale p1_twr TWR-P1025 p1_twr:TWR_P1025 - -Active powerpc mpc85xx - freescale p2020come P2020COME_SDCARD P2020COME:SDCARD Ira W. Snyder -Active powerpc mpc85xx - freescale p2020come P2020COME_SPIFLASH P2020COME:SPIFLASH Ira W. Snyder -Active powerpc mpc85xx - freescale p2020ds P2020DS - - -Active powerpc mpc85xx - freescale p2020ds P2020DS_36BIT P2020DS:36BIT - -Active powerpc mpc85xx - freescale p2020ds P2020DS_DDR2 P2020DS:DDR2 - -Active powerpc mpc85xx - freescale p2020ds P2020DS_SDCARD P2020DS:SDCARD - -Active powerpc mpc85xx - freescale p2020ds P2020DS_SPIFLASH P2020DS:SPIFLASH - -Active powerpc mpc85xx - freescale p2041rdb P2041RDB - - -Active powerpc mpc85xx - freescale p2041rdb P2041RDB_NAND P2041RDB:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale p2041rdb P2041RDB_SDCARD P2041RDB:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale p2041rdb P2041RDB_SECURE_BOOT P2041RDB:SECURE_BOOT - -Active powerpc mpc85xx - freescale p2041rdb P2041RDB_SPIFLASH P2041RDB:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale p2041rdb P2041RDB_SRIO_PCIE_BOOT P2041RDB:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale t1040qds T1040QDS T1040QDS:PPC_T1040 Poonam Aggrwal -Active powerpc mpc85xx - freescale t1040qds T1040QDS_D4 T1040QDS:PPC_T1040,SYS_FSL_DDR4 Poonam Aggrwal -Active powerpc mpc85xx - freescale t1040qds T1040QDS_SECURE_BOOT T1040QDS:PPC_T1040,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale t104xrdb T1040RDB T104xRDB:PPC_T1040,T1040RDB Priyanka Jain -Active powerpc mpc85xx - freescale t104xrdb T1040RDB_NAND T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND Priyanka Jain -Active powerpc mpc85xx - freescale t104xrdb T1040RDB_SDCARD T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD -Active powerpc mpc85xx - freescale t104xrdb T1040RDB_SECURE_BOOT T104xRDB:PPC_T1040,SECURE_BOOT,T1040RDB Aneesh Bansal -Active powerpc mpc85xx - freescale t104xrdb T1040RDB_SPIFLASH T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH Priyanka Jain -Active powerpc mpc85xx - freescale t104xrdb T1042RDB_PI T104xRDB:PPC_T1042,T1042RDB_PI Priyanka Jain -Active powerpc mpc85xx - freescale t104xrdb T1042RDB_PI_NAND T104xRDB:PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND Priyanka Jain -Active powerpc mpc85xx - freescale t104xrdb T1042RDB_PI_SDCARD T104xRDB:PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD -Active powerpc mpc85xx - freescale t104xrdb T1042RDB_PI_SPIFLASH T104xRDB:PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH Priyanka Jain -Active powerpc mpc85xx - freescale t208xqds T2080QDS T208xQDS:PPC_T2080 - -Active powerpc mpc85xx - freescale t208xqds T2080QDS_SECURE_BOOT T208xQDS:PPC_T2080,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale t208xqds T2080QDS_NAND T208xQDS:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND -Active powerpc mpc85xx - freescale t208xqds T2080QDS_SDCARD T208xQDS:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD -Active powerpc mpc85xx - freescale t208xqds T2080QDS_SPIFLASH T208xQDS:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH -Active powerpc mpc85xx - freescale t208xqds T2080QDS_SRIO_PCIE_BOOT T208xQDS:PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale t208xqds T2081QDS T208xQDS:PPC_T2081 - -Active powerpc mpc85xx - freescale t208xqds T2081QDS_NAND T208xQDS:PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,NAND -Active powerpc mpc85xx - freescale t208xqds T2081QDS_SDCARD T208xQDS:PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - -Active powerpc mpc85xx - freescale t208xqds T2081QDS_SPIFLASH T208xQDS:PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH - -Active powerpc mpc85xx - freescale t208xqds T2081QDS_SRIO_PCIE_BOOT T208xQDS:PPC_T2081,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale t208xrdb T2080RDB T208xRDB:PPC_T2080 - -Active powerpc mpc85xx - freescale t208xrdb T2080RDB_NAND T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND -Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SDCARD T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD -Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SPIFLASH T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH -Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SRIO_PCIE_BOOT T208xRDB:PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale t4qds T4160QDS T4240QDS:PPC_T4160 - -Active powerpc mpc85xx - freescale t4qds T4160QDS_SECURE_BOOT T4240QDS:PPC_T4160,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale t4qds T4160QDS_NAND T4240QDS:PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,NAND - -Active powerpc mpc85xx - freescale t4qds T4160QDS_SDCARD T4240QDS:PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - -Active powerpc mpc85xx - freescale t4qds T4160QDS_SPIFLASH T4240QDS:PPC_T4160,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale t4qds T4240EMU T4240EMU:PPC_T4240 York Sun -Active powerpc mpc85xx - freescale t4qds T4240QDS T4240QDS:PPC_T4240 - -Active powerpc mpc85xx - freescale t4qds T4240QDS_SECURE_BOOT T4240QDS:PPC_T4240,SECURE_BOOT Aneesh Bansal -Active powerpc mpc85xx - freescale t4qds T4240QDS_NAND T4240QDS:PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,NAND - -Active powerpc mpc85xx - freescale t4qds T4240QDS_SDCARD T4240QDS:PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - -Active powerpc mpc85xx - freescale t4qds T4240QDS_SPIFLASH T4240QDS:PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale t4qds T4240QDS_SRIO_PCIE_BOOT T4240QDS:PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - -Active powerpc mpc85xx - freescale qemu-ppce500 qemu-ppce500 - Alexander Graf -Active powerpc mpc85xx - gdsys p1022 controlcenterd_36BIT_SDCARD controlcenterd:36BIT,SDCARD Dirk Eibach -Active powerpc mpc85xx - gdsys p1022 controlcenterd_36BIT_SDCARD_DEVELOP controlcenterd:36BIT,SDCARD,DEVELOP Dirk Eibach -Active powerpc mpc85xx - gdsys p1022 controlcenterd_TRAILBLAZER controlcenterd:TRAILBLAZER,SPIFLASH Dirk Eibach -Active powerpc mpc85xx - gdsys p1022 controlcenterd_TRAILBLAZER_DEVELOP controlcenterd:TRAILBLAZER,SPIFLASH,DEVELOP Dirk Eibach -Active powerpc mpc85xx - keymile kmp204x kmcoge4 kmp204x:KMCOGE4 Valentin Longchamp -Active powerpc mpc85xx - keymile kmp204x kmlion1 kmp204x:KMLION1 Valentin Longchamp -Active powerpc mpc85xx - stx stxgp3 stxgp3 - Dan Malek -Active powerpc mpc85xx - stx stxssa stxssa - Dan Malek -Active powerpc mpc85xx - stx stxssa stxssa_4M stxssa:STXSSA_4M Dan Malek -Active powerpc mpc85xx - xes - xpedite520x - - -Active powerpc mpc85xx - xes - xpedite537x - - -Active powerpc mpc85xx - xes - xpedite550x - - -Active powerpc mpc86xx - - - sbc8641d - Paul Gortmaker -Active powerpc mpc86xx - freescale mpc8610hpcd MPC8610HPCD - - -Active powerpc mpc86xx - freescale mpc8641hpcn MPC8641HPCN - Kumar Gala -Active powerpc mpc86xx - freescale mpc8641hpcn MPC8641HPCN_36BIT MPC8641HPCN:PHYS_64BIT Kumar Gala -Active powerpc mpc86xx - xes - xpedite517x - - -Active powerpc mpc8xx - - - hermes - Wolfgang Denk -Active powerpc mpc8xx - - - lwmon - Wolfgang Denk -Active powerpc mpc8xx - - - quantum - - -Active powerpc mpc8xx - - - RRvision - Wolfgang Denk -Active powerpc mpc8xx - - - spc1920 - - -Active powerpc mpc8xx - - - svm_sc8xx - John Zhan -Active powerpc mpc8xx - - - v37 - - -Active powerpc mpc8xx - - cogent cogent_mpc8xx - Murray Jensen -Active powerpc mpc8xx - - esteem192e ESTEEM192E - Conn Clark -Active powerpc mpc8xx - - fads MPC86xADS - - -Active powerpc mpc8xx - - fads MPC885ADS - - -Active powerpc mpc8xx - - flagadm FLAGADM - Kári Davíðsson -Active powerpc mpc8xx - - gen860t GEN860T - Keith Outwater -Active powerpc mpc8xx - - gen860t GEN860T_SC GEN860T:SC Keith Outwater -Active powerpc mpc8xx - - icu862 ICU862 - Wolfgang Denk -Active powerpc mpc8xx - - icu862 ICU862_100MHz ICU862:100MHz Wolfgang Denk -Active powerpc mpc8xx - - ip860 IP860 - Wolfgang Denk -Active powerpc mpc8xx - - ivm IVML24 IVML24:IVML24_16M Wolfgang Denk -Active powerpc mpc8xx - - ivm IVML24_128 IVML24:IVML24_32M Wolfgang Denk -Active powerpc mpc8xx - - ivm IVML24_256 IVML24:IVML24_64M Wolfgang Denk -Active powerpc mpc8xx - - ivm IVMS8 IVMS8:IVMS8_16M Wolfgang Denk -Active powerpc mpc8xx - - ivm IVMS8_128 IVMS8:IVMS8_32M Wolfgang Denk -Active powerpc mpc8xx - - ivm IVMS8_256 IVMS8:IVMS8_64M Wolfgang Denk -Active powerpc mpc8xx - - netphone NETPHONE NETPHONE:NETPHONE_VERSION=1 - -Active powerpc mpc8xx - - netphone NETPHONE_V2 NETPHONE:NETPHONE_VERSION=2 - -Active powerpc mpc8xx - - netta NETTA - - -Active powerpc mpc8xx - - netta NETTA_6412 NETTA:NETTA_6412=1 - -Active powerpc mpc8xx - - netta NETTA_6412_SWAPHOOK NETTA:NETTA_6412=1,NETTA_SWAPHOOK=1 - -Active powerpc mpc8xx - - netta NETTA_ISDN NETTA:NETTA_ISDN=1 - -Active powerpc mpc8xx - - netta NETTA_ISDN_6412 NETTA:NETTA_ISDN=1,NETTA_6412=1 - -Active powerpc mpc8xx - - netta NETTA_ISDN_6412_SWAPHOOK NETTA:NETTA_ISDN=1,NETTA_6412=1,NETTA_SWAPHOOK=1 - -Active powerpc mpc8xx - - netta NETTA_ISDN_SWAPHOOK NETTA:NETTA_ISDN=1,NETTA_SWAPHOOK=1 - -Active powerpc mpc8xx - - netta NETTA_SWAPHOOK NETTA:NETTA_SWAPHOOK=1 - -Active powerpc mpc8xx - - netta2 NETTA2 NETTA2:NETTA2_VERSION=1 - -Active powerpc mpc8xx - - netta2 NETTA2_V2 NETTA2:NETTA2_VERSION=2 - -Active powerpc mpc8xx - - netvia NETVIA NETVIA:NETVIA_VERSION=1 Pantelis Antoniou -Active powerpc mpc8xx - - netvia NETVIA_V2 NETVIA:NETVIA_VERSION=2 Pantelis Antoniou -Active powerpc mpc8xx - - r360mpi R360MPI - Wolfgang Denk -Active powerpc mpc8xx - - rbc823 RBC823 - - -Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW - - -Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_64 RPXlite_DW:RPXlite_64MHz - -Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_64_LCD RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20 - -Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_LCD RPXlite_DW:LCD,NEC_NL6448BC20 - -Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_NVRAM RPXlite_DW:ENV_IS_IN_NVRAM - -Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_NVRAM_64 RPXlite_DW:RPXlite_64MHz,ENV_IS_IN_NVRAM - -Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_NVRAM_64_LCD RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20,ENV_IS_IN_NVRAM - -Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_NVRAM_LCD RPXlite_DW:LCD,NEC_NL6448BC20,ENV_IS_IN_NVRAM - -Active powerpc mpc8xx - - RRvision RRvision_LCD RRvision:LCD,SHARP_LQ104V7DS01 Wolfgang Denk -Active powerpc mpc8xx - - sixnet SXNI855T - Dave Ellis -Active powerpc mpc8xx - - spd8xx SPD823TS - Wolfgang Denk -Active powerpc mpc8xx - eltec mhpc MHPC - Frank Gottschling -Active powerpc mpc8xx - emk top860 TOP860 - Reinhard Meyer -Active powerpc mpc8xx - kup kup4k KUP4K - Klaus Heydeck -Active powerpc mpc8xx - kup kup4x KUP4X - Klaus Heydeck -Active powerpc mpc8xx - LEOX elpt860 ELPT860 - The LEOX team -Active powerpc mpc8xx - manroland - uc100 - Stefan Roese -Active powerpc mpc8xx - snmc qs850 QS823 - - -Active powerpc mpc8xx - snmc qs850 QS850 - - -Active powerpc mpc8xx - snmc qs860t QS860T - - -Active powerpc mpc8xx - stx stxxtc stxxtc - Dan Malek -Active powerpc mpc8xx - tqc tqm8xx FPS850L - Wolfgang Denk -Active powerpc mpc8xx - tqc tqm8xx FPS860L - Wolfgang Denk -Active powerpc mpc8xx - tqc tqm8xx NSCU - - -Active powerpc mpc8xx - tqc tqm8xx SM850 - Wolfgang Denk -Active powerpc mpc8xx - tqc tqm8xx TK885D - - -Active powerpc mpc8xx - tqc tqm8xx TQM823L - Wolfgang Denk -Active powerpc mpc8xx - tqc tqm8xx TQM823L_LCD TQM823L:LCD,NEC_NL6448BC20 Wolfgang Denk -Active powerpc mpc8xx - tqc tqm8xx TQM823M - - -Active powerpc mpc8xx - tqc tqm8xx TQM850L - Wolfgang Denk -Active powerpc mpc8xx - tqc tqm8xx TQM850M - - -Active powerpc mpc8xx - tqc tqm8xx TQM855L - Wolfgang Denk -Active powerpc mpc8xx - tqc tqm8xx TQM855M - - -Active powerpc mpc8xx - tqc tqm8xx TQM860L - Wolfgang Denk -Active powerpc mpc8xx - tqc tqm8xx TQM860M - - -Active powerpc mpc8xx - tqc tqm8xx TQM862L - - -Active powerpc mpc8xx - tqc tqm8xx TQM862M - - -Active powerpc mpc8xx - tqc tqm8xx TQM866M - - -Active powerpc mpc8xx - tqc tqm8xx TQM885D - - -Active powerpc mpc8xx - tqc tqm8xx TTTech TQM823L:LCD,SHARP_LQ104V7DS01 Wolfgang Denk -Active powerpc mpc8xx - tqc tqm8xx virtlab2 - - -Active powerpc mpc8xx - tqc tqm8xx wtk TQM823L:LCD,SHARP_LQ065T9DR51U Wolfgang Denk -Active powerpc ppc4xx - - - csb272 - Tolunay Orkun -Active powerpc ppc4xx - - - csb472 - Tolunay Orkun -Active powerpc ppc4xx - - - korat - Larry Johnson -Active powerpc ppc4xx - - - lwmon5 - Stefan Roese -Active powerpc ppc4xx - - - pcs440ep - Stefan Roese -Active powerpc ppc4xx - - - quad100hd - Gary Jennejohn -Active powerpc ppc4xx - - - sbc405 - - -Active powerpc ppc4xx - - - sc3 - Heiko Schocher -Active powerpc ppc4xx - - - t3corp - Stefan Roese -Active powerpc ppc4xx - - - zeus - Stefan Roese -Active powerpc ppc4xx - - g2000 G2000 - Matthias Fuchs -Active powerpc ppc4xx - - jse JSE - Stephen Williams -Active powerpc ppc4xx - - korat korat_perm korat:KORAT_PERMANENT Larry Johnson -Active powerpc ppc4xx - - lwmon5 lcd4_lwmon5 lwmon5:LCD4_LWMON5 Stefan Roese -Active powerpc ppc4xx - - w7o W7OLMC - Erik Theisen -Active powerpc ppc4xx - - w7o W7OLMG - Erik Theisen -Active powerpc ppc4xx - amcc - acadia - Stefan Roese -Active powerpc ppc4xx - amcc - bamboo - Stefan Roese -Active powerpc ppc4xx - amcc - bubinga - - -Active powerpc ppc4xx - amcc - ebony - Stefan Roese -Active powerpc ppc4xx - amcc - katmai - Stefan Roese -Active powerpc ppc4xx - amcc - luan - John Otken -Active powerpc ppc4xx - amcc - makalu - Stefan Roese -Active powerpc ppc4xx - amcc - ocotea - Stefan Roese -Active powerpc ppc4xx - amcc - redwood - Feng Kan -Active powerpc ppc4xx - amcc - taihu - John Otken -Active powerpc ppc4xx - amcc - taishan - Stefan Roese -Active powerpc ppc4xx - amcc - yucca - - -Active powerpc ppc4xx - amcc canyonlands arches canyonlands:ARCHES Stefan Roese -Active powerpc ppc4xx - amcc canyonlands canyonlands canyonlands:CANYONLANDS Stefan Roese -Active powerpc ppc4xx - amcc canyonlands glacier canyonlands:GLACIER Stefan Roese -Active powerpc ppc4xx - amcc kilauea haleakala kilauea:HALEAKALA Stefan Roese -Active powerpc ppc4xx - amcc kilauea kilauea kilauea:KILAUEA Stefan Roese -Active powerpc ppc4xx - amcc sequoia rainier sequoia:RAINIER Stefan Roese -Active powerpc ppc4xx - amcc sequoia rainier_ramboot sequoia:RAINIER,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds Stefan Roese -Active powerpc ppc4xx - amcc sequoia sequoia sequoia:SEQUOIA Stefan Roese -Active powerpc ppc4xx - amcc sequoia sequoia_ramboot sequoia:SEQUOIA,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds Stefan Roese -Active powerpc ppc4xx - amcc walnut sycamore walnut Stefan Roese -Active powerpc ppc4xx - amcc walnut walnut - Stefan Roese -Active powerpc ppc4xx - amcc yosemite yellowstone yosemite:YELLOWSTONE Stefan Roese -Active powerpc ppc4xx - amcc yosemite yosemite yosemite:YOSEMITE Stefan Roese -Active powerpc ppc4xx - avnet fx12mm fx12mm fx12mm:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,INIT_TLB=board/xilinx/ppc405-generic/init.o Georg Schardt -Active powerpc ppc4xx - avnet fx12mm fx12mm_flash fx12mm:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o Georg Schardt -Active powerpc ppc4xx - avnet v5fx30teval v5fx30teval v5fx30teval:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o Ricardo Ribalda -Active powerpc ppc4xx - avnet v5fx30teval v5fx30teval_flash v5fx30teval:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o Ricardo Ribalda -Active powerpc ppc4xx - dave PPChameleonEVB CATcenter CATcenter:PPCHAMELEON_MODULE_MODEL=1 - -Active powerpc ppc4xx - dave PPChameleonEVB CATcenter_25 CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25 - -Active powerpc ppc4xx - dave PPChameleonEVB CATcenter_33 CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33 - -Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB - Andrea "llandre" Marson -Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB_BA_25 PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_25 Andrea "llandre" Marson -Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB_BA_33 PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_33 Andrea "llandre" Marson -Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB_HI_25 PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_25 Andrea "llandre" Marson -Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB_HI_33 PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_33 Andrea "llandre" Marson -Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB_ME_25 PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25 Andrea "llandre" Marson -Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB_ME_33 PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33 Andrea "llandre" Marson -Active powerpc ppc4xx - esd apc405 APC405 - Matthias Fuchs -Active powerpc ppc4xx - esd ar405 AR405 - Matthias Fuchs -Active powerpc ppc4xx - esd ash405 ASH405 - Matthias Fuchs -Active powerpc ppc4xx - esd cms700 CMS700 - Matthias Fuchs -Active powerpc ppc4xx - esd cpci2dp CPCI2DP - Matthias Fuchs -Active powerpc ppc4xx - esd cpci405 CPCI405 - Matthias Fuchs -Active powerpc ppc4xx - esd cpci405 CPCI4052 - Matthias Fuchs -Active powerpc ppc4xx - esd cpci405 CPCI405AB - Matthias Fuchs -Active powerpc ppc4xx - esd cpci405 CPCI405DT - Matthias Fuchs -Active powerpc ppc4xx - esd cpciiser4 CPCIISER4 - Matthias Fuchs -Active powerpc ppc4xx - esd dp405 DP405 - Matthias Fuchs -Active powerpc ppc4xx - esd du405 DU405 - Matthias Fuchs -Active powerpc ppc4xx - esd du440 DU440 - Matthias Fuchs -Active powerpc ppc4xx - esd hh405 HH405 - Matthias Fuchs -Active powerpc ppc4xx - esd hub405 HUB405 - Matthias Fuchs -Active powerpc ppc4xx - esd ocrtc OCRTC - Matthias Fuchs -Active powerpc ppc4xx - esd pci405 PCI405 - Matthias Fuchs -Active powerpc ppc4xx - esd plu405 PLU405 - Matthias Fuchs -Active powerpc ppc4xx - esd pmc405 PMC405 - Matthias Fuchs -Active powerpc ppc4xx - esd pmc405de PMC405DE - Matthias Fuchs -Active powerpc ppc4xx - esd pmc440 PMC440 - Matthias Fuchs -Active powerpc ppc4xx - esd voh405 VOH405 - Matthias Fuchs -Active powerpc ppc4xx - esd vom405 VOM405 - Matthias Fuchs -Active powerpc ppc4xx - esd wuh405 WUH405 - Matthias Fuchs -Active powerpc ppc4xx - gdsys - dlvision - Dirk Eibach -Active powerpc ppc4xx - gdsys - gdppc440etx - Dirk Eibach -Active powerpc ppc4xx - gdsys 405ep dlvision-10g - Dirk Eibach -Active powerpc ppc4xx - gdsys 405ep io - Dirk Eibach -Active powerpc ppc4xx - gdsys 405ep iocon - Dirk Eibach -Active powerpc ppc4xx - gdsys 405ep neo - Dirk Eibach -Active powerpc ppc4xx - gdsys 405ex io64 - Dirk Eibach -Active powerpc ppc4xx - gdsys intip devconcenter intip:DEVCONCENTER Dirk Eibach -Active powerpc ppc4xx - gdsys intip intip intip:INTIB Dirk Eibach -Active powerpc ppc4xx - mosaixtech - icon - Stefan Roese -Active powerpc ppc4xx - mpl mip405 MIP405 - Denis Peter -Active powerpc ppc4xx - mpl mip405 MIP405T MIP405:MIP405T Denis Peter -Active powerpc ppc4xx - mpl pip405 PIP405 - Denis Peter -Active powerpc ppc4xx - prodrive - alpr - Stefan Roese -Active powerpc ppc4xx - prodrive - p3p440 - Stefan Roese -Active powerpc ppc4xx - xes - xpedite1000 - Peter Tyser -Active powerpc ppc4xx - xilinx ml507 ml507 ml507:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o Ricardo Ribalda -Active powerpc ppc4xx - xilinx ml507 ml507_flash ml507:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o Ricardo Ribalda -Active powerpc ppc4xx - xilinx ppc405-generic xilinx-ppc405-generic xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000 Ricardo Ribalda -Active powerpc ppc4xx - xilinx ppc405-generic xilinx-ppc405-generic_flash xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda -Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1 Ricardo Ribalda -Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic_flash xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda -Active sandbox sandbox - - sandbox - Simon Glass -Active sh sh2 - renesas rsk7203 rsk7203 - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu -Active sh sh2 - renesas rsk7264 rsk7264 - Phil Edworthy -Active sh sh2 - renesas rsk7269 rsk7269 - - -Active sh sh3 - - mpr2 mpr2 - Mark Jonas -Active sh sh3 - - ms7720se ms7720se - Yoshihiro Shimoda -Active sh sh3 - - shmin shmin - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu -Active sh sh4 - - espt espt - - -Active sh sh4 - - ms7722se ms7722se - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu -Active sh sh4 - - ms7750se ms7750se - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu -Active sh sh4 - alphaproject ap_sh4a_4a ap_sh4a_4a - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu -Active sh sh4 - renesas ap325rxa ap325rxa - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu -Active sh sh4 - renesas ecovec ecovec - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu -Active sh sh4 - renesas MigoR MigoR - - -Active sh sh4 - renesas r0p7734 r0p7734 - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu -Active sh sh4 - renesas r2dplus r2dplus - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu -Active sh sh4 - renesas r7780mp r7780mp - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu -Active sh sh4 - renesas sh7752evb sh7752evb - - -Active sh sh4 - renesas sh7753evb sh7753evb - - -Active sh sh4 - renesas sh7757lcr sh7757lcr - - -Active sh sh4 - renesas sh7763rdp sh7763rdp - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu -Active sh sh4 - renesas sh7785lcr sh7785lcr - - -Active sh sh4 - renesas sh7785lcr sh7785lcr_32bit sh7785lcr:SH_32BIT=1 - -Active sparc leon2 - gaisler - grsim_leon2 - - -Active sparc leon3 - gaisler - gr_cpci_ax2000 - - -Active sparc leon3 - gaisler - gr_ep2s60 - - -Active sparc leon3 - gaisler - gr_xc3s_1500 - - -Active sparc leon3 - gaisler - grsim - - -Active x86 x86 coreboot chromebook-x86 coreboot coreboot-x86 coreboot:SYS_TEXT_BASE=0x01110000 - +Active aarch64 armv8 - armltd vexpress64 vexpress_aemv8a vexpress_aemv8a:ARM64 David Feng +Active arc arc700 - synopsys - axs101 - Alexey Brodkin +Active arc arc700 - synopsys arcangel4 - Alexey Brodkin +Active arc arc700 - synopsys arcangel4-be - Alexey Brodkin +Active arm arm1136 - armltd integrator integratorcp_cm1136 integratorcp:CM1136 Linus Walleij +Active arm arm1136 mx31 - - imx31_phycore - - +Active arm arm1136 mx31 davedenx - qong - Wolfgang Denk +Active arm arm1136 mx31 freescale - mx31pdk - Fabio Estevam +Active arm arm1136 mx31 hale - tt01 - Helmut Raiger +Active arm arm1136 mx31 logicpd - imx31_litekit - - +Active arm arm1136 mx35 - - woodburn - Stefano Babic +Active arm arm1136 mx35 - woodburn woodburn_sd woodburn_sd:IMX_CONFIG=board/woodburn/imximage.cfg - +Active arm arm1136 mx35 CarMediaLab - flea3 - Stefano Babic +Active arm arm1136 mx35 freescale - mx35pdk - Stefano Babic +Active arm arm1176 bcm2835 raspberrypi rpi_b rpi_b - Stephen Warren +Active arm arm1176 tnetv107x ti tnetv107xevm tnetv107x_evm - Chan-Taek Park +Active arm arm720t - armltd integrator integratorap_cm720t integratorap:CM720T Linus Walleij +Active arm arm920t - armltd integrator integratorap_cm920t integratorap:CM920T Linus Walleij +Active arm arm920t - armltd integrator integratorcp_cm920t integratorcp:CM920T Linus Walleij +Active arm arm920t a320 faraday - a320evb - Po-Yu Chuang +Active arm arm920t at91 atmel at91rm9200ek at91rm9200ek - Andreas Bießmann +Active arm arm920t at91 atmel at91rm9200ek at91rm9200ek_ram at91rm9200ek:RAMBOOT Andreas Bießmann +Active arm arm920t at91 BuS eb_cpux9k2 eb_cpux9k2 - Jens Scharsig +Active arm arm920t at91 BuS eb_cpux9k2 eb_cpux9k2_ram eb_cpux9k2:RAMBOOT Jens Scharsig +Active arm arm920t at91 eukrea cpuat91 cpuat91 - Eric Benard +Active arm arm920t at91 eukrea cpuat91 cpuat91_ram cpuat91:RAMBOOT Eric Benard +Active arm arm920t imx - - scb9328 - Torsten Koschorrek +Active arm arm920t ks8695 - - cm4008 - Greg Ungerer +Active arm arm920t ks8695 - - cm41xx - - +Active arm arm920t s3c24x0 mpl vcma9 VCMA9 - David Müller +Active arm arm920t s3c24x0 samsung - smdk2410 - David Müller +Active arm arm926ejs - armltd integrator integratorap_cm926ejs integratorap:CM926EJ_S Linus Walleij +Active arm arm926ejs - armltd integrator integratorcp_cm926ejs integratorcp:CM924EJ_S Linus Walleij +Active arm arm926ejs armada100 Marvell - aspenite - Prafulla Wadaskar +Active arm arm926ejs armada100 Marvell - gplugd - Ajay Bhargav +Active arm arm926ejs at91 - - afeb9260 - Sergey Lapin +Active arm arm926ejs at91 atmel at91sam9260ek at91sam9260ek_dataflash_cs0 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS0 Stelian Pop +Active arm arm926ejs at91 atmel at91sam9260ek at91sam9260ek_dataflash_cs1 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS1 Stelian Pop +Active arm arm926ejs at91 atmel at91sam9260ek at91sam9260ek_nandflash at91sam9260ek:AT91SAM9260,SYS_USE_NANDFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9260ek at91sam9g20ek_2mmc_nandflash at91sam9260ek:AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9260ek at91sam9g20ek_dataflash_cs0 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS0 Stelian Pop +Active arm arm926ejs at91 atmel at91sam9260ek at91sam9g20ek_dataflash_cs1 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS1 Stelian Pop +Active arm arm926ejs at91 atmel at91sam9260ek at91sam9g20ek_mmc at91sam9260ek:AT91SAM9G20,SYS_USE_MMC Stelian Pop +Active arm arm926ejs at91 atmel at91sam9260ek at91sam9g20ek_nandflash at91sam9260ek:AT91SAM9G20,SYS_USE_NANDFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9260ek at91sam9xeek_dataflash_cs0 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0 Stelian Pop +Active arm arm926ejs at91 atmel at91sam9260ek at91sam9xeek_dataflash_cs1 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 Stelian Pop +Active arm arm926ejs at91 atmel at91sam9260ek at91sam9xeek_nandflash at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9261ek at91sam9261ek_dataflash_cs0 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS0 Stelian Pop +Active arm arm926ejs at91 atmel at91sam9261ek at91sam9261ek_dataflash_cs3 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS3 Stelian Pop +Active arm arm926ejs at91 atmel at91sam9261ek at91sam9261ek_nandflash at91sam9261ek:AT91SAM9261,SYS_USE_NANDFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9261ek at91sam9g10ek_dataflash_cs0 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS0 Stelian Pop +Active arm arm926ejs at91 atmel at91sam9261ek at91sam9g10ek_dataflash_cs3 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS3 Stelian Pop +Active arm arm926ejs at91 atmel at91sam9261ek at91sam9g10ek_nandflash at91sam9261ek:AT91SAM9G10,SYS_USE_NANDFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9263ek at91sam9263ek_dataflash at91sam9263ek:AT91SAM9263,SYS_USE_DATAFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9263ek at91sam9263ek_dataflash_cs0 at91sam9263ek:AT91SAM9263,SYS_USE_DATAFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9263ek at91sam9263ek_nandflash at91sam9263ek:AT91SAM9263,SYS_USE_NANDFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9263ek at91sam9263ek_norflash at91sam9263ek:AT91SAM9263,SYS_USE_NORFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9263ek at91sam9263ek_norflash_boot at91sam9263ek:AT91SAM9263,SYS_USE_BOOT_NORFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9m10g45ek at91sam9m10g45ek_nandflash at91sam9m10g45ek:AT91SAM9M10G45,SYS_USE_NANDFLASH Bo Shen +Active arm arm926ejs at91 atmel at91sam9n12ek at91sam9n12ek_mmc at91sam9n12ek:AT91SAM9N12,SYS_USE_MMC Josh Wu +Active arm arm926ejs at91 atmel at91sam9n12ek at91sam9n12ek_nandflash at91sam9n12ek:AT91SAM9N12,SYS_USE_NANDFLASH Josh Wu +Active arm arm926ejs at91 atmel at91sam9n12ek at91sam9n12ek_spiflash at91sam9n12ek:AT91SAM9N12,SYS_USE_SPIFLASH Josh Wu +Active arm arm926ejs at91 atmel at91sam9rlek at91sam9rlek_dataflash at91sam9rlek:AT91SAM9RL,SYS_USE_DATAFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9rlek at91sam9rlek_nandflash at91sam9rlek:AT91SAM9RL,SYS_USE_NANDFLASH Stelian Pop +Active arm arm926ejs at91 atmel at91sam9x5ek at91sam9x5ek_dataflash at91sam9x5ek:AT91SAM9X5,SYS_USE_DATAFLASH Bo Shen +Active arm arm926ejs at91 atmel at91sam9x5ek at91sam9x5ek_mmc at91sam9x5ek:AT91SAM9X5,SYS_USE_MMC Bo Shen +Active arm arm926ejs at91 atmel at91sam9x5ek at91sam9x5ek_nandflash at91sam9x5ek:AT91SAM9X5,SYS_USE_NANDFLASH Bo Shen +Active arm arm926ejs at91 atmel at91sam9x5ek at91sam9x5ek_spiflash at91sam9x5ek:AT91SAM9X5,SYS_USE_SPIFLASH Bo Shen +Active arm arm926ejs at91 bluewater - snapper9260 snapper9260:AT91SAM9260 Ryan Mallon +Active arm arm926ejs at91 bluewater snapper9260 snapper9g20 snapper9260:AT91SAM9G20 Ryan Mallon +Active arm arm926ejs at91 BuS vl_ma2sc vl_ma2sc - Jens Scharsig +Active arm arm926ejs at91 BuS vl_ma2sc vl_ma2sc_ram vl_ma2sc:RAMLOAD Jens Scharsig +Active arm arm926ejs at91 calao sbc35_a9g20 sbc35_a9g20_eeprom sbc35_a9g20:AT91SAM9G20,SYS_USE_EEPROM Albin Tonnerre +Active arm arm926ejs at91 calao sbc35_a9g20 sbc35_a9g20_nandflash sbc35_a9g20:AT91SAM9G20,SYS_USE_NANDFLASH Albin Tonnerre +Active arm arm926ejs at91 calao tny_a9260 tny_a9260_eeprom tny_a9260:AT91SAM9260,SYS_USE_EEPROM Albin Tonnerre +Active arm arm926ejs at91 calao tny_a9260 tny_a9260_nandflash tny_a9260:AT91SAM9260,SYS_USE_NANDFLASH Albin Tonnerre +Active arm arm926ejs at91 calao tny_a9260 tny_a9g20_eeprom tny_a9260:AT91SAM9G20,SYS_USE_EEPROM Albin Tonnerre +Active arm arm926ejs at91 calao tny_a9260 tny_a9g20_nandflash tny_a9260:AT91SAM9G20,SYS_USE_NANDFLASH Albin Tonnerre +Active arm arm926ejs at91 calao usb_a9263 usb_a9263_dataflash usb_a9263:AT91SAM9263,SYS_USE_DATAFLASH Mateusz Kulikowski +Active arm arm926ejs at91 egnite ethernut5 ethernut5 ethernut5:AT91SAM9XE egnite GmbH +Active arm arm926ejs at91 emk top9000 top9000eval_xe top9000:EVAL9000 Reinhard Meyer +Active arm arm926ejs at91 emk top9000 top9000su_xe top9000:SU9000 Reinhard Meyer +Active arm arm926ejs at91 esd meesc meesc meesc:AT91SAM9263,SYS_USE_NANDFLASH Daniel Gorsulowski +Active arm arm926ejs at91 esd meesc meesc_dataflash meesc:AT91SAM9263,SYS_USE_DATAFLASH Daniel Gorsulowski +Active arm arm926ejs at91 esd otc570 otc570 otc570:AT91SAM9263,SYS_USE_NANDFLASH Daniel Gorsulowski +Active arm arm926ejs at91 esd otc570 otc570_dataflash otc570:AT91SAM9263,SYS_USE_DATAFLASH Daniel Gorsulowski +Active arm arm926ejs at91 eukrea cpu9260 cpu9260 cpu9260:CPU9260 Eric Benard +Active arm arm926ejs at91 eukrea cpu9260 cpu9260_128M cpu9260:CPU9260,CPU9260_128M Eric Benard +Active arm arm926ejs at91 eukrea cpu9260 cpu9260_nand cpu9260:CPU9260,NANDBOOT Eric Benard +Active arm arm926ejs at91 eukrea cpu9260 cpu9260_nand_128M cpu9260:CPU9260,CPU9260_128M,NANDBOOT Eric Benard +Active arm arm926ejs at91 eukrea cpu9260 cpu9G20 cpu9260:CPU9G20 Eric Benard +Active arm arm926ejs at91 eukrea cpu9260 cpu9G20_128M cpu9260:CPU9G20,CPU9G20_128M Eric Benard +Active arm arm926ejs at91 eukrea cpu9260 cpu9G20_nand cpu9260:CPU9G20,NANDBOOT Eric Benard +Active arm arm926ejs at91 eukrea cpu9260 cpu9G20_nand_128M cpu9260:CPU9G20,CPU9G20_128M,NANDBOOT Eric Benard +Active arm arm926ejs at91 ronetix pm9261 pm9261 pm9261:AT91SAM9261 Ilko Iliev +Active arm arm926ejs at91 ronetix pm9263 pm9263 pm9263:AT91SAM9263 Ilko Iliev +Active arm arm926ejs at91 ronetix pm9g45 pm9g45 pm9g45:AT91SAM9G45 Ilko Iliev +Active arm arm926ejs at91 siemens corvus corvus corvus:AT91SAM9M10G45,SYS_USE_NANDFLASH Heiko Schocher +Active arm arm926ejs at91 siemens taurus axm taurus:AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM Heiko Schocher +Active arm arm926ejs at91 siemens taurus taurus taurus:AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS Heiko Schocher +Active arm arm926ejs at91 taskit stamp9g20 portuxg20 stamp9g20:AT91SAM9G20,PORTUXG20 Markus Hubig +Active arm arm926ejs at91 taskit stamp9g20 stamp9g20 stamp9g20:AT91SAM9G20 Markus Hubig +Active arm arm926ejs davinci ait cam_enc_4xx cam_enc_4xx - Heiko Schocher +Active arm arm926ejs davinci Barix ipam390 ipam390 - Heiko Schocher +Active arm arm926ejs davinci davinci da8xxevm da830evm - Nick Thompson +Active arm arm926ejs davinci davinci da8xxevm da850_am18xxevm da850evm:DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50 Sudhakar Rajashekhara +Active arm arm926ejs davinci davinci da8xxevm da850evm da850evm:MAC_ADDR_IN_SPIFLASH Sudhakar Rajashekhara +Active arm arm926ejs davinci davinci da8xxevm da850evm_direct_nor da850evm:MAC_ADDR_IN_SPIFLASH,USE_NOR,DIRECT_NOR_BOOT Sudhakar Rajashekhara +Active arm arm926ejs davinci davinci da8xxevm hawkboard - Syed Mohammed Khasim :Sughosh Ganu +Active arm arm926ejs davinci davinci da8xxevm hawkboard_uart hawkboard:UART_U_BOOT Syed Mohammed Khasim :Sughosh Ganu +Active arm arm926ejs davinci davinci dm355evm davinci_dm355evm - Sandeep Paulraj +Active arm arm926ejs davinci davinci dm355leopard davinci_dm355leopard - Sandeep Paulraj +Active arm arm926ejs davinci davinci dm365evm davinci_dm365evm - Sandeep Paulraj +Active arm arm926ejs davinci davinci dm6467evm davinci_dm6467evm davinci_dm6467evm:REFCLK_FREQ=27000000 Sandeep Paulraj +Active arm arm926ejs davinci davinci dm6467evm davinci_dm6467Tevm davinci_dm6467evm:DAVINCI_DM6467TEVM,REFCLK_FREQ=33000000 Sandeep Paulraj +Active arm arm926ejs davinci davinci dvevm davinci_dvevm - - +Active arm arm926ejs davinci davinci ea20 ea20 - Stefano Babic +Active arm arm926ejs davinci davinci schmoogie davinci_schmoogie - - +Active arm arm926ejs davinci davinci sffsdr davinci_sffsdr - - +Active arm arm926ejs davinci davinci sonata davinci_sonata - - +Active arm arm926ejs davinci enbw enbw_cmc enbw_cmc - Heiko Schocher +Active arm arm926ejs davinci omicron calimain calimain - Manfred Rudigier :Christian Riesch +Active arm arm926ejs kirkwood buffalo lsxl lschlv2 lsxl:LSCHLV2 Michael Walle +Active arm arm926ejs kirkwood buffalo lsxl lsxhl lsxl:LSXHL Michael Walle +Active arm arm926ejs kirkwood cloudengines - pogo_e02 - Dave Purdy +Active arm arm926ejs kirkwood d-link - dns325 - Stefan Herbrechtsmeier +Active arm arm926ejs kirkwood iomega - iconnect - Luka Perkov +Active arm arm926ejs kirkwood karo tk71 tk71 - - +Active arm arm926ejs kirkwood keymile km_arm km_kirkwood km_kirkwood:KM_KIRKWOOD Valentin Longchamp +Active arm arm926ejs kirkwood keymile km_arm km_kirkwood_128m16 km_kirkwood:KM_KIRKWOOD_128M16 Valentin Longchamp +Active arm arm926ejs kirkwood keymile km_arm km_kirkwood_pci km_kirkwood:KM_KIRKWOOD_PCI Valentin Longchamp +Active arm arm926ejs kirkwood keymile km_arm kmcoge5un km_kirkwood:KM_COGE5UN Valentin Longchamp +Active arm arm926ejs kirkwood keymile km_arm kmnusa km_kirkwood:KM_NUSA Valentin Longchamp +Active arm arm926ejs kirkwood keymile km_arm kmsugp1 km_kirkwood:KM_SUGP1 Valentin Longchamp +Active arm arm926ejs kirkwood keymile km_arm kmsuv31 km_kirkwood:KM_SUV31 Valentin Longchamp +Active arm arm926ejs kirkwood keymile km_arm mgcoge3un km_kirkwood:KM_MGCOGE3UN Valentin Longchamp +Active arm arm926ejs kirkwood keymile km_arm portl2 km_kirkwood:KM_PORTL2 Valentin Longchamp +Active arm arm926ejs kirkwood LaCie net2big_v2 d2net_v2 lacie_kw:D2NET_V2 - +Active arm arm926ejs kirkwood LaCie net2big_v2 net2big_v2 lacie_kw:NET2BIG_V2 Simon Guinot +Active arm arm926ejs kirkwood LaCie netspace_v2 inetspace_v2 lacie_kw:INETSPACE_V2 Simon Guinot +Active arm arm926ejs kirkwood LaCie netspace_v2 netspace_lite_v2 lacie_kw:NETSPACE_LITE_V2 - +Active arm arm926ejs kirkwood LaCie netspace_v2 netspace_max_v2 lacie_kw:NETSPACE_MAX_V2 Simon Guinot +Active arm arm926ejs kirkwood LaCie netspace_v2 netspace_mini_v2 lacie_kw:NETSPACE_MINI_V2 - +Active arm arm926ejs kirkwood LaCie netspace_v2 netspace_v2 lacie_kw:NETSPACE_V2 Simon Guinot +Active arm arm926ejs kirkwood LaCie wireless_space wireless_space - - +Active arm arm926ejs kirkwood Marvell - dreamplug - Jason Cooper +Active arm arm926ejs kirkwood Marvell - guruplug - Siddarth Gore +Active arm arm926ejs kirkwood Marvell - mv88f6281gtw_ge - Prafulla Wadaskar +Active arm arm926ejs kirkwood Marvell - rd6281a - Prafulla Wadaskar +Active arm arm926ejs kirkwood Marvell - sheevaplug - Prafulla Wadaskar +Active arm arm926ejs kirkwood Marvell openrd openrd_base openrd:BOARD_IS_OPENRD_BASE Prafulla Wadaskar +Active arm arm926ejs kirkwood Marvell openrd openrd_client openrd:BOARD_IS_OPENRD_CLIENT - +Active arm arm926ejs kirkwood Marvell openrd openrd_ultimate openrd:BOARD_IS_OPENRD_ULTIMATE - +Active arm arm926ejs kirkwood raidsonic ib62x0 ib62x0 - Luka Perkov +Active arm arm926ejs kirkwood Seagate - dockstar - Eric Cooper +Active arm arm926ejs kirkwood Seagate - goflexhome - Suriyan Ramasami +Active arm arm926ejs lpc32xx timll devkit3250 devkit3250 - Vladimir Zapolskiy +Active arm arm926ejs mb86r0x syteco jadecpu jadecpu - Matthias Weisser +Active arm arm926ejs mx25 freescale mx25pdk mx25pdk mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg Fabio Estevam +Active arm arm926ejs mx25 karo tx25 tx25 - John Rigby +Active arm arm926ejs mx25 syteco zmx25 zmx25 - Matthias Weisser +Active arm arm926ejs mx27 armadeus apf27 apf27 - Philippe Reynes :Eric Jarrige +Active arm arm926ejs mx27 logicpd imx27lite imx27lite - Wolfgang Denk +Active arm arm926ejs mx27 logicpd imx27lite magnesium - Heiko Schocher +Active arm arm926ejs mxs bluegiga apx4devkit apx4devkit - Lauri Hintsala +Active arm arm926ejs mxs creative xfi3 xfi3 - Marek Vasut +Active arm arm926ejs mxs denx m28evk m28evk - Marek Vasut +Active arm arm926ejs mxs freescale mx23evk mx23evk - Otavio Salvador +Active arm arm926ejs mxs freescale mx28evk mx28evk mx28evk:ENV_IS_IN_MMC Fabio Estevam +Active arm arm926ejs mxs freescale mx28evk mx28evk_auart_console mx28evk:MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE,ENV_IS_IN_MMC Fabio Estevam +Active arm arm926ejs mxs freescale mx28evk mx28evk_nand mx28evk:ENV_IS_IN_NAND Fabio Estevam +Active arm arm926ejs mxs olimex mx23_olinuxino mx23_olinuxino - Marek Vasut +Active arm arm926ejs mxs ppcag bg0900 bg0900 - Marek Vasut +Active arm arm926ejs mxs sandisk sansa_fuze_plus sansa_fuze_plus - Marek Vasut +Active arm arm926ejs mxs schulercontrol sc_sps_1 sc_sps_1 - Marek Vasut +Active arm arm926ejs nomadik st nhk8815 nhk8815 - Nomadik Linux Team :Alessandro Rubini +Active arm arm926ejs nomadik st nhk8815 nhk8815_onenand nhk8815:BOOT_ONENAND Nomadik Linux Team :Alessandro Rubini +Active arm arm926ejs omap ti - omap5912osk - Rishi Bhattacharya +Active arm arm926ejs orion5x LaCie - edminiv2 - Albert ARIBAUD +Active arm arm926ejs pantheon Marvell - dkb - Lei Wen +Active arm arm926ejs spear spear - x600 - Stefan Roese +Active arm arm926ejs spear spear spear300 spear300 spear3xx_evb:spear300 Vipin Kumar +Active arm arm926ejs spear spear spear300 spear300_nand spear3xx_evb:spear300,nand - +Active arm arm926ejs spear spear spear300 spear300_usbtty spear3xx_evb:spear300,usbtty - +Active arm arm926ejs spear spear spear300 spear300_usbtty_nand spear3xx_evb:spear300,usbtty,nand - +Active arm arm926ejs spear spear spear310 spear310 spear3xx_evb:spear310 Vipin Kumar +Active arm arm926ejs spear spear spear310 spear310_nand spear3xx_evb:spear310,nand - +Active arm arm926ejs spear spear spear310 spear310_pnor spear3xx_evb:spear310,FLASH_PNOR - +Active arm arm926ejs spear spear spear310 spear310_usbtty spear3xx_evb:spear310,usbtty - +Active arm arm926ejs spear spear spear310 spear310_usbtty_nand spear3xx_evb:spear310,usbtty,nand - +Active arm arm926ejs spear spear spear310 spear310_usbtty_pnor spear3xx_evb:spear310,usbtty,FLASH_PNOR - +Active arm arm926ejs spear spear spear320 spear320 spear3xx_evb:spear320 Vipin Kumar +Active arm arm926ejs spear spear spear320 spear320_nand spear3xx_evb:spear320,nand - +Active arm arm926ejs spear spear spear320 spear320_pnor spear3xx_evb:spear320,FLASH_PNOR - +Active arm arm926ejs spear spear spear320 spear320_usbtty spear3xx_evb:spear320,usbtty - +Active arm arm926ejs spear spear spear320 spear320_usbtty_nand spear3xx_evb:spear320,usbtty,nand - +Active arm arm926ejs spear spear spear320 spear320_usbtty_pnor spear3xx_evb:spear320,usbtty,FLASH_PNOR - +Active arm arm926ejs spear spear spear600 spear600 spear6xx_evb:spear600 Vipin Kumar +Active arm arm926ejs spear spear spear600 spear600_nand spear6xx_evb:spear600,nand - +Active arm arm926ejs spear spear spear600 spear600_usbtty spear6xx_evb:spear600,usbtty - +Active arm arm926ejs spear spear spear600 spear600_usbtty_nand spear6xx_evb:spear600,usbtty,nand - +Active arm arm926ejs versatile armltd versatile versatileab versatile:ARCH_VERSATILE_AB - +Active arm arm926ejs versatile armltd versatile versatilepb versatile:ARCH_VERSATILE_PB - +Active arm arm926ejs versatile armltd versatile versatileqemu versatile:ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB - +Active arm arm946es - armltd integrator integratorap_cm946es integratorap:CM946ES Linus Walleij +Active arm arm946es - armltd integrator integratorcp_cm946es integratorcp:CM946ES Linus Walleij +Active arm armv7 - armltd vexpress vexpress_ca15_tc2 - - +Active arm armv7 - armltd vexpress vexpress_ca5x2 - Matt Waddel +Active arm armv7 - armltd vexpress vexpress_ca9x4 - Matt Waddel +Active arm armv7 am33xx BuR kwb kwb kwb:SERIAL1,CONS_INDEX=1 Hannes Petermaier +Active arm armv7 am33xx BuR tseries tseries_mmc tseries:SERIAL1,CONS_INDEX=1,EMMC_BOOT Hannes Petermaier +Active arm armv7 am33xx BuR tseries tseries_nand tseries:SERIAL1,CONS_INDEX=1,NAND Hannes Petermaier +Active arm armv7 am33xx BuR tseries tseries_spi tseries:SERIAL1,CONS_INDEX=1,SPI_BOOT,EMMC_BOOT Hannes Petermaier +Active arm armv7 am33xx compulab cm_t335 cm_t335 - Igor Grinberg +Active arm armv7 am33xx isee igep0033 am335x_igep0033 - Enric Balletbo i Serra +Active arm armv7 am33xx phytec pcm051 pcm051_rev1 pcm051:REV1 Lars Poeschel +Active arm armv7 am33xx phytec pcm051 pcm051_rev3 pcm051:REV3 Lars Poeschel +Active arm armv7 am33xx siemens dxr2 dxr2 - Roger Meier +Active arm armv7 am33xx siemens pxm2 pxm2 - Roger Meier +Active arm armv7 am33xx siemens rut rut - Roger Meier +Active arm armv7 am33xx silica pengwyn pengwyn - Lothar Felten +Active arm armv7 am33xx ti am335x am335x_boneblack am335x_evm:SERIAL1,CONS_INDEX=1,EMMC_BOOT Tom Rini +Active arm armv7 am33xx ti am335x am335x_evm am335x_evm:SERIAL1,CONS_INDEX=1,NAND Tom Rini +Active arm armv7 am33xx ti am335x am335x_evm_nor am335x_evm:SERIAL1,CONS_INDEX=1,NAND,NOR Tom Rini +Active arm armv7 am33xx ti am335x am335x_evm_norboot am335x_evm:SERIAL1,CONS_INDEX=1,NOR,NOR_BOOT Tom Rini +Active arm armv7 am33xx ti am335x am335x_evm_spiboot am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT Tom Rini +Active arm armv7 am33xx ti am335x am335x_evm_uart1 am335x_evm:SERIAL2,CONS_INDEX=2,NAND Tom Rini +Active arm armv7 am33xx ti am335x am335x_evm_uart2 am335x_evm:SERIAL3,CONS_INDEX=3,NAND Tom Rini +Active arm armv7 am33xx ti am335x am335x_evm_uart3 am335x_evm:SERIAL4,CONS_INDEX=4,NAND Tom Rini +Active arm armv7 am33xx ti am335x am335x_evm_uart4 am335x_evm:SERIAL5,CONS_INDEX=5,NAND Tom Rini +Active arm armv7 am33xx ti am335x am335x_evm_uart5 am335x_evm:SERIAL6,CONS_INDEX=6,NAND Tom Rini +Active arm armv7 am33xx ti am335x am335x_evm_usbspl am335x_evm:SERIAL1,CONS_INDEX=1,NAND,SPL_USBETH_SUPPORT Tom Rini +Active arm armv7 am33xx ti am43xx am43xx_evm am43xx_evm:SERIAL1,CONS_INDEX=1 Lokesh Vutla +Active arm armv7 am33xx ti ti814x ti814x_evm - Matt Porter +Active arm armv7 am33xx ti ti816x ti816x_evm - - +Active arm armv7 at91 atmel sama5d3_xplained sama5d3_xplained_mmc sama5d3_xplained:SAMA5D3,SYS_USE_MMC Bo Shen +Active arm armv7 at91 atmel sama5d3_xplained sama5d3_xplained_nandflash sama5d3_xplained:SAMA5D3,SYS_USE_NANDFLASH Bo Shen +Active arm armv7 at91 atmel sama5d3xek sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC Bo Shen +Active arm armv7 at91 atmel sama5d3xek sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH Bo Shen +Active arm armv7 at91 atmel sama5d3xek sama5d3xek_spiflash sama5d3xek:SAMA5D3,SYS_USE_SERIALFLASH Bo Shen +Active arm armv7 bcm281xx broadcom bcm28155_ap bcm28155_ap bcm28155_ap Tim Kryger +Active arm armv7 exynos samsung arndale arndale - Inderpal Singh +Active arm armv7 exynos samsung origen origen - Chander Kashyap +Active arm armv7 exynos samsung smdk5250 smdk5250 - Chander Kashyap +Active arm armv7 exynos samsung smdk5250 snow - Rajeshwari Shinde +Active arm armv7 exynos samsung smdk5420 smdk5420 - Rajeshwari Shinde +Active arm armv7 exynos samsung smdkv310 smdkv310 - Chander Kashyap +Active arm armv7 exynos samsung trats trats - Lukasz Majewski +Active arm armv7 exynos samsung trats2 trats2 - Piotr Wilczek +Active arm armv7 exynos samsung universal_c210 s5pc210_universal - Przemyslaw Marczak +Active arm armv7 highbank - highbank highbank - Rob Herring +Active arm armv7 keystone ti k2hk_evm k2hk_evm - Vitaly Andrianov +Active arm armv7 mx5 denx m53evk m53evk m53evk:IMX_CONFIG=board/denx/m53evk/imximage.cfg Marek Vasut +Active arm armv7 mx5 esg ima3-mx53 ima3-mx53 ima3-mx53:IMX_CONFIG=board/esg/ima3-mx53/imximage.cfg - +Active arm armv7 mx5 freescale mx51evk mx51evk mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg Stefano Babic +Active arm armv7 mx5 freescale mx53ard mx53ard mx53ard:IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg Fabio Estevam +Active arm armv7 mx5 freescale mx53evk mx53evk mx53evk:IMX_CONFIG=board/freescale/mx53evk/imximage.cfg Jason Liu +Active arm armv7 mx5 freescale mx53loco mx53loco mx53loco:IMX_CONFIG=board/freescale/mx53loco/imximage.cfg Jason Liu +Active arm armv7 mx5 freescale mx53smd mx53smd mx53smd:IMX_CONFIG=board/freescale/mx53smd/imximage.cfg Fabio Estevam +Active arm armv7 mx5 genesi mx51_efikamx mx51_efikamx mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_mx.cfg - +Active arm armv7 mx5 genesi mx51_efikamx mx51_efikasb mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_sb.cfg - +Active arm armv7 mx5 ttcontrol vision2 vision2 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg Stefano Babic +Active arm armv7 mx6 - udoo udoo_quad udoo:IMX_CONFIG=board/udoo/udoo.cfg,MX6Q,DDR_MB=1024 Fabio Estevam +Active arm armv7 mx6 - wandboard wandboard_dl wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024 Fabio Estevam +Active arm armv7 mx6 - wandboard wandboard_quad wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048 Fabio Estevam +Active arm armv7 mx6 - wandboard wandboard_solo wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512 Fabio Estevam +Active arm armv7 mx6 barco titanium titanium titanium:IMX_CONFIG=board/barco/titanium/imximage.cfg Stefan Roese +Active arm armv7 mx6 boundary nitrogen6x mx6qsabrelite nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE Eric Nelson +Active arm armv7 mx6 boundary nitrogen6x nitrogen6dl nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024 Eric Nelson +Active arm armv7 mx6 boundary nitrogen6x nitrogen6dl2g nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048 Eric Nelson +Active arm armv7 mx6 boundary nitrogen6x nitrogen6q nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024 Eric Nelson +Active arm armv7 mx6 boundary nitrogen6x nitrogen6q2g nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048 Eric Nelson +Active arm armv7 mx6 boundary nitrogen6x nitrogen6s nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512 Eric Nelson +Active arm armv7 mx6 boundary nitrogen6x nitrogen6s1g nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024 Eric Nelson +Active arm armv7 mx6 congatec cgtqmx6eval cgtqmx6qeval cgtqmx6eval:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Leo Sartre +Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg Jason Liu +Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q Fabio Estevam +Active arm armv7 mx6 freescale mx6sabresd mx6dlsabresd mx6sabresd:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL Fabio Estevam +Active arm armv7 mx6 freescale mx6sabresd mx6qsabresd mx6sabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Fabio Estevam +Active arm armv7 mx6 freescale mx6slevk mx6slevk mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL Fabio Estevam +Active arm armv7 mx6 gateworks gw_ventana gwventanadl gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6DL,DDR_MB=512 Tim Harvey +Active arm armv7 mx6 gateworks gw_ventana gwventanadl1g gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6DL,DDR_MB=1024 Tim Harvey +Active arm armv7 mx6 gateworks gw_ventana gwventanaq gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=512 Tim Harvey +Active arm armv7 mx6 gateworks gw_ventana gwventanaq1g gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=1024 Tim Harvey +Active arm armv7 mx6 gateworks gw_ventana gwventanaq1gspi gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=1024,SPI_FLASH Tim Harvey +Active arm armv7 mx6 solidrun hummingboard hummingboard_solo hummingboard:IMX_CONFIG=board/solidrun/hummingboard/solo.cfg,MX6S,DDR_MB=512 Jon Nettleton +Active arm armv7 omap3 - overo omap3_overo - Steve Sakoman +Active arm armv7 omap3 - pandora omap3_pandora - Grazvydas Ignotas +Active arm armv7 omap3 8dtech eco5pk eco5pk - Raphael Assenat +Active arm armv7 omap3 comelit dig297 dig297 - Luca Ceresoli +Active arm armv7 omap3 compulab cm_t35 cm_t35 - Igor Grinberg +Active arm armv7 omap3 corscience tricorder tricorder - Thomas Weber +Active arm armv7 omap3 corscience tricorder tricorder_flash tricorder:FLASHCARD Thomas Weber +Active arm armv7 omap3 htkw mcx mcx - Ilya Yanok +Active arm armv7 omap3 isee igep00x0 igep0020 omap3_igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_ONENAND Enric Balletbo i Serra +Active arm armv7 omap3 isee igep00x0 igep0020_nand omap3_igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020,BOOT_NAND - +Active arm armv7 omap3 isee igep00x0 igep0030 omap3_igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_ONENAND Enric Balletbo i Serra +Active arm armv7 omap3 isee igep00x0 igep0030_nand omap3_igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030,BOOT_NAND - +Active arm armv7 omap3 isee igep00x0 igep0032 omap3_igep00x0:MACH_TYPE=MACH_TYPE_IGEP0032,BOOT_ONENAND Enric Balletbo i Serra +Active arm armv7 omap3 logicpd am3517evm am3517_evm - Vaibhav Hiremath +Active arm armv7 omap3 logicpd omap3som omap3_logic - Peter Barada +Active arm armv7 omap3 logicpd zoom1 omap3_zoom1 - Nishanth Menon +Active arm armv7 omap3 matrix_vision mvblx omap3_mvblx - Michael Jones +Active arm armv7 omap3 nokia rx51 nokia_rx51 - Pali Rohár +Active arm armv7 omap3 technexion tao3530 omap3_ha tao3530:SYS_BOARD_OMAP3_HA Stefan Roese +Active arm armv7 omap3 technexion tao3530 tao3530 - Tapani Utriainen +Active arm armv7 omap3 technexion twister twister - Stefano Babic +Active arm armv7 omap3 teejet mt_ventoux mt_ventoux - Stefano Babic +Active arm armv7 omap3 ti am3517crane am3517_crane - Nagendra T S +Active arm armv7 omap3 ti beagle omap3_beagle omap3_beagle:NAND Tom Rini +Active arm armv7 omap3 ti evm omap3_evm - Tom Rini +Active arm armv7 omap3 ti evm omap3_evm_quick_mmc - - +Active arm armv7 omap3 ti evm omap3_evm_quick_nand - - +Active arm armv7 omap3 ti sdp3430 omap3_sdp3430 - Nishanth Menon +Active arm armv7 omap3 timll devkit8000 devkit8000 - Thomas Weber +Active arm armv7 omap4 ti panda omap4_panda - Sricharan R +Active arm armv7 omap4 ti sdp4430 omap4_sdp4430 - Sricharan R +Active arm armv7 omap5 ti dra7xx dra7xx_evm dra7xx_evm:CONS_INDEX=1 Lokesh Vutla +Active arm armv7 omap5 ti dra7xx dra7xx_evm_qspiboot dra7xx_evm:CONS_INDEX=1,QSPI_BOOT Lokesh Vutla +Active arm armv7 omap5 ti dra7xx dra7xx_evm_uart3 dra7xx_evm:CONS_INDEX=3,SPL_YMODEM_SUPPORT Lokesh Vutla +Active arm armv7 omap5 ti omap5_uevm omap5_uevm - - +Active arm armv7 rmobile atmark-techno armadillo-800eva armadillo-800eva - Nobuhiro Iwamatsu +Active arm armv7 rmobile kmc kzm9g kzm9g - Nobuhiro Iwamatsu :Tetsuyuki Kobayashi +Active arm armv7 rmobile renesas koelsch koelsch - Nobuhiro Iwamatsu +Active arm armv7 rmobile renesas koelsch koelsch_nor koelsch:NORFLASH Nobuhiro Iwamatsu +Active arm armv7 rmobile renesas lager lager - Nobuhiro Iwamatsu +Active arm armv7 rmobile renesas lager lager_nor lager:NORFLASH Nobuhiro Iwamatsu +Active arm armv7 s5pc1xx samsung goni s5p_goni - Mateusz Zalega +Active arm armv7 s5pc1xx samsung smdkc100 smdkc100 - Minkyu Kang +Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - - +Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier +Active arm armv7 u8500 st-ericsson u8500 u8500_href - - +Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang +Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek :Jagannadha Sutradharudu Teki +Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek :Jagannadha Sutradharudu Teki +Active arm armv7 zynq xilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek :Jagannadha Sutradharudu Teki +Active arm armv7 zynq xilinx zynq zynq_zc770_xm012 zynq_zc770:ZC770_XM012 Michal Simek :Jagannadha Sutradharudu Teki +Active arm armv7 zynq xilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek :Jagannadha Sutradharudu Teki +Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek :Jagannadha Sutradharudu Teki +Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren +Active arm armv7:arm720t tegra124 nvidia jetson-tk1 jetson-tk1 jetson-tk1:BOARD_JETSON_TK1= Stephen Warren +Active arm armv7:arm720t tegra124 nvidia venice2 venice2 - Tom Warren +Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel +Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel +Active arm armv7:arm720t tegra20 avionic-design tec tec - Alban Bedel +Active arm armv7:arm720t tegra20 compal paz00 paz00 - Tom Warren :Stephen Warren +Active arm armv7:arm720t tegra20 compulab trimslice trimslice - Tom Warren :Stephen Warren +Active arm armv7:arm720t tegra20 nvidia harmony harmony - Tom Warren +Active arm armv7:arm720t tegra20 nvidia seaboard seaboard - Tom Warren +Active arm armv7:arm720t tegra20 nvidia ventana ventana - Tom Warren :Stephen Warren +Active arm armv7:arm720t tegra20 nvidia whistler whistler - Tom Warren :Stephen Warren +Active arm armv7:arm720t tegra20 toradex colibri_t20_iris colibri_t20_iris - Lucas Stach +Active arm armv7:arm720t tegra30 avionic-design tec-ng tec-ng - Alban Bedel +Active arm armv7:arm720t tegra30 nvidia beaver beaver - Tom Warren :Stephen Warren +Active arm armv7:arm720t tegra30 nvidia cardhu cardhu - Tom Warren +Active arm pxa - - - balloon3 - Marek Vasut +Active arm pxa - - - h2200 - Lukasz Dalek +Active arm pxa - - - palmld - Marek Vasut +Active arm pxa - - - palmtc - Marek Vasut +Active arm pxa - - - palmtreo680 - Mike Dunn +Active arm pxa - - - pxa255_idp - Cliff Brake +Active arm pxa - - - trizepsiv - Stefano Babic +Active arm pxa - - - xaeniax - - +Active arm pxa - - - zipitz2 - Marek Vasut +Active arm pxa - - trizepsiv polaris trizepsiv:POLARIS Stefano Babic +Active arm pxa - - vpac270 vpac270_nor_128 vpac270:NOR,RAM_128M Marek Vasut +Active arm pxa - - vpac270 vpac270_nor_256 vpac270:NOR,RAM_256M Marek Vasut +Active arm pxa - - vpac270 vpac270_ond_256 vpac270:ONENAND,RAM_256M Marek Vasut +Active arm pxa - icpdas lp8x4x lp8x4x - Sergey Yanovich +Active arm pxa - toradex - colibri_pxa270 - Marek Vasut +Active arm sa1100 - - - jornada - Kristoffer Ericson +Active avr32 at32ap at32ap700x atmel - atngw100 - Haavard Skinnemoen +Active avr32 at32ap at32ap700x atmel - atngw100mkii - Andreas Bießmann +Active avr32 at32ap at32ap700x atmel atstk1000 atstk1002 - Haavard Skinnemoen +Active avr32 at32ap at32ap700x atmel atstk1000 atstk1003 - Haavard Skinnemoen +Active avr32 at32ap at32ap700x atmel atstk1000 atstk1004 - Haavard Skinnemoen +Active avr32 at32ap at32ap700x atmel atstk1000 atstk1006 - Haavard Skinnemoen +Active avr32 at32ap at32ap700x earthlcd - favr-32-ezkit - Hans-Christian Egtvedt +Active avr32 at32ap at32ap700x in-circuit - grasshopper - Andreas Bießmann +Active avr32 at32ap at32ap700x mimc - mimc200 - Mark Jackson +Active avr32 at32ap at32ap700x miromico - hammerhead - Julien May :Alex Raimondi +Active blackfin blackfin - - - bct-brettl2 - Peter Meerwald +Active blackfin blackfin - - - bf506f-ezkit - Sonic Zhang +Active blackfin blackfin - - - bf518f-ezbrd - Sonic Zhang +Active blackfin blackfin - - - bf525-ucr2 - Haitao Zhang :Chong Huang +Active blackfin blackfin - - - bf526-ezbrd - Sonic Zhang +Active blackfin blackfin - - - bf527-ad7160-eval - Sonic Zhang +Active blackfin blackfin - - - bf527-ezkit - Sonic Zhang +Active blackfin blackfin - - - bf527-sdp - Sonic Zhang +Active blackfin blackfin - - - bf533-ezkit - Sonic Zhang +Active blackfin blackfin - - - bf533-stamp - Sonic Zhang +Active blackfin blackfin - - - bf537-minotaur - Martin Strubel +Active blackfin blackfin - - - bf537-pnav - Sonic Zhang +Active blackfin blackfin - - - bf537-srv1 - Martin Strubel +Active blackfin blackfin - - - bf537-stamp - Sonic Zhang +Active blackfin blackfin - - - bf538f-ezkit - Sonic Zhang +Active blackfin blackfin - - - bf548-ezkit - Sonic Zhang +Active blackfin blackfin - - - bf561-acvilon - Anton Shurpin :Valentin Yakovenkov +Active blackfin blackfin - - - bf561-ezkit - Sonic Zhang +Active blackfin blackfin - - - bf609-ezkit - Sonic Zhang +Active blackfin blackfin - - - blackstamp - Wojtek Skulski :Wojtek Skulski :Benjamin Matthews +Active blackfin blackfin - - - blackvme - Wojtek Skulski :Wojtek Skulski :Benjamin Matthews +Active blackfin blackfin - - - br4 - Dimitar Penev +Active blackfin blackfin - - - dnp5370 - M.Hasewinkel (MHA) +Active blackfin blackfin - - - ibf-dsp561 - I-SYST Micromodule +Active blackfin blackfin - - - ip04 - Brent Kandetzki +Active blackfin blackfin - - - pr1 - Dimitar Penev +Active blackfin blackfin - - bf527-ezkit bf527-ezkit-v2 bf527-ezkit:BF527_EZKIT_REV_2_1 Sonic Zhang +Active m68k mcf5227x - freescale m52277evb M52277EVB M52277EVB:SYS_SPANSION_BOOT,SYS_TEXT_BASE=0x00000000 TsiChung Liew +Active m68k mcf5227x - freescale m52277evb M52277EVB_stmicro M52277EVB:CF_SBF,SYS_STMICRO_BOOT,SYS_TEXT_BASE=0x43E00000 TsiChung Liew +Active m68k mcf523x - freescale m5235evb M5235EVB M5235EVB:SYS_TEXT_BASE=0xFFE00000 TsiChung Liew +Active m68k mcf523x - freescale m5235evb M5235EVB_Flash32 M5235EVB:NORFLASH_PS32BIT,SYS_TEXT_BASE=0xFFC00000 TsiChung Liew +Active m68k mcf52x2 - - cobra5272 cobra5272 - - +Active m68k mcf52x2 - BuS eb_cpu5282 eb_cpu5282 eb_cpu5282:SYS_TEXT_BASE=0xFF000000,SYS_MONITOR_BASE=0xFF000400 Jens Scharsig +Active m68k mcf52x2 - BuS eb_cpu5282 eb_cpu5282_internal eb_cpu5282:SYS_TEXT_BASE=0xF0000000,SYS_MONITOR_BASE=0xF0000418 Jens Scharsig +Active m68k mcf52x2 - esd tasreg TASREG - Matthias Fuchs +Active m68k mcf52x2 - freescale m5208evbe M5208EVBE - - +Active m68k mcf52x2 - freescale m5249evb M5249EVB - - +Active m68k mcf52x2 - freescale m5253demo M5253DEMO - TsiChung Liew +Active m68k mcf52x2 - freescale m5253evbe M5253EVBE - Hayden Fraser +Active m68k mcf52x2 - freescale m5272c3 M5272C3 - - +Active m68k mcf52x2 - freescale m5275evb M5275EVB - - +Active m68k mcf52x2 - freescale m5282evb M5282EVB - - +Active m68k mcf532x - astro mcf5373l astro_mcf5373l - Wolfgang Wegner +Active m68k mcf532x - freescale m53017evb M53017EVB - TsiChung Liew +Active m68k mcf532x - freescale m5329evb M5329AFEE M5329EVB:NANDFLASH_SIZE=0 TsiChung Liew +Active m68k mcf532x - freescale m5329evb M5329BFEE M5329EVB:NANDFLASH_SIZE=16 TsiChung Liew +Active m68k mcf532x - freescale m5373evb M5373EVB M5373EVB:NANDFLASH_SIZE=16 TsiChung Liew +Active m68k mcf5445x - freescale m54418twr M54418TWR M54418TWR:CF_SBF,SYS_SERIAL_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000 - +Active m68k mcf5445x - freescale m54418twr M54418TWR_nand_mii M54418TWR:SYS_NAND_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=25000000 - +Active m68k mcf5445x - freescale m54418twr M54418TWR_nand_rmii M54418TWR:SYS_NAND_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000 - +Active m68k mcf5445x - freescale m54418twr M54418TWR_nand_rmii_lowfreq M54418TWR:SYS_NAND_BOOT,LOW_MCFCLK,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000 - +Active m68k mcf5445x - freescale m54418twr M54418TWR_serial_mii M54418TWR:CF_SBF,SYS_SERIAL_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=25000000 - +Active m68k mcf5445x - freescale m54418twr M54418TWR_serial_rmii M54418TWR:CF_SBF,SYS_SERIAL_BOOT,SYS_TEXT_BASE=0x47E00000,SYS_INPUT_CLKSRC=50000000 - +Active m68k mcf5445x - freescale m54451evb M54451EVB M54451EVB:SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=24000000 - +Active m68k mcf5445x - freescale m54451evb M54451EVB_stmicro M54451EVB:CF_SBF,SYS_STMICRO_BOOT,SYS_TEXT_BASE=0x47e00000,SYS_INPUT_CLKSRC=24000000 - +Active m68k mcf5445x - freescale m54455evb M54455EVB M54455EVB:SYS_ATMEL_BOOT,SYS_TEXT_BASE=0x04000000,SYS_INPUT_CLKSRC=33333333 TsiChung Liew +Active m68k mcf5445x - freescale m54455evb M54455EVB_a66 M54455EVB:SYS_ATMEL_BOOT,SYS_TEXT_BASE=0x04000000,SYS_INPUT_CLKSRC=66666666 TsiChung Liew +Active m68k mcf5445x - freescale m54455evb M54455EVB_i66 M54455EVB:SYS_INTEL_BOOT,SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=66666666 TsiChung Liew +Active m68k mcf5445x - freescale m54455evb M54455EVB_intel M54455EVB:SYS_INTEL_BOOT,SYS_TEXT_BASE=0x00000000,SYS_INPUT_CLKSRC=33333333 TsiChung Liew +Active m68k mcf5445x - freescale m54455evb M54455EVB_stm33 M54455EVB:SYS_STMICRO_BOOT,CF_SBF,SYS_TEXT_BASE=0x4FE00000,SYS_INPUT_CLKSRC=33333333 TsiChung Liew +Active m68k mcf547x_8x - freescale m547xevb M5475AFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64 TsiChung Liew +Active m68k mcf547x_8x - freescale m547xevb M5475BFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16 TsiChung Liew +Active m68k mcf547x_8x - freescale m547xevb M5475CFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL TsiChung Liew +Active m68k mcf547x_8x - freescale m547xevb M5475DFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL TsiChung Liew +Active m68k mcf547x_8x - freescale m547xevb M5475EFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL TsiChung Liew +Active m68k mcf547x_8x - freescale m547xevb M5475FFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64 TsiChung Liew +Active m68k mcf547x_8x - freescale m547xevb M5475GFE M5475EVB:SYS_BUSCLK=133333333,SYS_BOOTSZ=4,SYS_DRAMSZ=64 TsiChung Liew +Active m68k mcf547x_8x - freescale m548xevb M5485AFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64 TsiChung Liew +Active m68k mcf547x_8x - freescale m548xevb M5485BFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16 TsiChung Liew +Active m68k mcf547x_8x - freescale m548xevb M5485CFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL TsiChung Liew +Active m68k mcf547x_8x - freescale m548xevb M5485DFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL TsiChung Liew +Active m68k mcf547x_8x - freescale m548xevb M5485EFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL TsiChung Liew +Active m68k mcf547x_8x - freescale m548xevb M5485FFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64 TsiChung Liew +Active m68k mcf547x_8x - freescale m548xevb M5485GFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=4,SYS_DRAMSZ=64 TsiChung Liew +Active m68k mcf547x_8x - freescale m548xevb M5485HFE M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO TsiChung Liew +Active microblaze microblaze - xilinx microblaze-generic microblaze-generic - Michal Simek +Active mips mips32 - - qemu-mips qemu_mips qemu-mips:SYS_BIG_ENDIAN Vlad Lungu +Active mips mips32 - - qemu-mips qemu_mipsel qemu-mips:SYS_LITTLE_ENDIAN - +Active mips mips32 - imgtec malta malta malta:SYS_BIG_ENDIAN Paul Burton +Active mips mips32 - imgtec malta maltael malta:SYS_LITTLE_ENDIAN Paul Burton +Active mips mips32 - micronas vct vct_platinum vct:VCT_PLATINUM - +Active mips mips32 - micronas vct vct_platinum_onenand vct:VCT_PLATINUM,VCT_ONENAND - +Active mips mips32 - micronas vct vct_platinum_onenand_small vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE - +Active mips mips32 - micronas vct vct_platinum_small vct:VCT_PLATINUM,VCT_SMALL_IMAGE - +Active mips mips32 - micronas vct vct_platinumavc vct:VCT_PLATINUMAVC - +Active mips mips32 - micronas vct vct_platinumavc_onenand vct:VCT_PLATINUMAVC,VCT_ONENAND - +Active mips mips32 - micronas vct vct_platinumavc_onenand_small vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE - +Active mips mips32 - micronas vct vct_platinumavc_small vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE - +Active mips mips32 - micronas vct vct_premium vct:VCT_PREMIUM - +Active mips mips32 - micronas vct vct_premium_onenand vct:VCT_PREMIUM,VCT_ONENAND - +Active mips mips32 - micronas vct vct_premium_onenand_small vct:VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE - +Active mips mips32 - micronas vct vct_premium_small vct:VCT_PREMIUM,VCT_SMALL_IMAGE - +Active mips mips32 au1x00 - dbau1x00 dbau1000 dbau1x00:DBAU1000 Thomas Lange +Active mips mips32 au1x00 - dbau1x00 dbau1100 dbau1x00:DBAU1100 Thomas Lange +Active mips mips32 au1x00 - dbau1x00 dbau1500 dbau1x00:DBAU1500 Thomas Lange +Active mips mips32 au1x00 - dbau1x00 dbau1550 dbau1x00:DBAU1550 Thomas Lange +Active mips mips32 au1x00 - dbau1x00 dbau1550_el dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN Thomas Lange +Active mips mips32 au1x00 - pb1x00 pb1000 pb1x00:PB1000 - +Active mips mips64 - - qemu-mips qemu_mips64 qemu-mips64:SYS_BIG_ENDIAN - +Active mips mips64 - - qemu-mips qemu_mips64el qemu-mips64:SYS_LITTLE_ENDIAN - +Active nds32 n1213 ag101 AndesTech adp-ag101 adp-ag101 - Andes +Active nds32 n1213 ag101 AndesTech adp-ag101p adp-ag101p - Andes +Active nds32 n1213 ag102 AndesTech adp-ag102 adp-ag102 - Andes +Active nios2 nios2 - altera nios2-generic nios2-generic - Scott McNutt +Active nios2 nios2 - psyent pci5441 PCI5441 - Scott McNutt +Active nios2 nios2 - psyent pk1c20 PK1C20 - Scott McNutt +Active openrisc or1200 - openrisc openrisc-generic openrisc-generic - Stefan Kristiansson +Active powerpc 74xx_7xx - - - ppmc7xx - - +Active powerpc 74xx_7xx - - evb64260 P3G4 - Wolfgang Denk +Active powerpc 74xx_7xx - eltec elppc ELPPC - - +Active powerpc 74xx_7xx - esd cpci750 CPCI750 - Reinhard Arlt +Active powerpc 74xx_7xx - freescale mpc7448hpc2 mpc7448hpc2 - Roy Zang +Active powerpc 74xx_7xx - Marvell db64360 DB64360 - - +Active powerpc 74xx_7xx - Marvell db64460 DB64460 - - +Active powerpc 74xx_7xx - prodrive p3mx p3m7448 p3mx:P3M7448 Stefan Roese +Active powerpc 74xx_7xx - prodrive p3mx p3m750 p3mx:P3M750 Stefan Roese +Active powerpc mpc512x - - - pdm360ng - Michael Weiss +Active powerpc mpc512x - davedenx - aria - Wolfgang Denk +Active powerpc mpc512x - esd - mecp5123 - Reinhard Arlt +Active powerpc mpc512x - freescale mpc5121ads mpc5121ads - - +Active powerpc mpc512x - freescale mpc5121ads mpc5121ads_rev2 mpc5121ads:MPC5121ADS_REV2 - +Active powerpc mpc512x - ifm ac14xx ac14xx - Anatolij Gustschin +Active powerpc mpc5xx - - cmi cmi_mpc5xx - - +Active powerpc mpc5xx - mpl pati PATI - - +Active powerpc mpc5xxx - - - canmb - - +Active powerpc mpc5xxx - - - cm5200 - - +Active powerpc mpc5xxx - - - inka4x0 - Detlev Zundel +Active powerpc mpc5xxx - - - ipek01 - Wolfgang Grandegger +Active powerpc mpc5xxx - - - jupiter - Heiko Schocher +Active powerpc mpc5xxx - - - motionpro - - +Active powerpc mpc5xxx - - - munices - - +Active powerpc mpc5xxx - - - v38b - - +Active powerpc mpc5xxx - - a3m071 a3m071 - Stefan Roese +Active powerpc mpc5xxx - - a3m071 a4m2k a3m071:A4M2K Stefan Roese +Active powerpc mpc5xxx - - a4m072 a4m072 - Sergei Poselenov +Active powerpc mpc5xxx - - bc3450 BC3450 - - +Active powerpc mpc5xxx - - galaxy5200 galaxy5200 galaxy5200:galaxy5200 Eric Millbrandt +Active powerpc mpc5xxx - - galaxy5200 galaxy5200_LOWBOOT galaxy5200:galaxy5200_LOWBOOT Eric Millbrandt +Active powerpc mpc5xxx - - icecube icecube_5200 IceCube Wolfgang Denk +Active powerpc mpc5xxx - - icecube icecube_5200_DDR IceCube:MPC5200_DDR - +Active powerpc mpc5xxx - - icecube icecube_5200_DDR_LOWBOOT IceCube:SYS_TEXT_BASE=0xFF800000,MPC5200_DDR - +Active powerpc mpc5xxx - - icecube icecube_5200_DDR_LOWBOOT08 IceCube:SYS_TEXT_BASE=0xFF800000,MPC5200_DDR - +Active powerpc mpc5xxx - - icecube icecube_5200_LOWBOOT IceCube:SYS_TEXT_BASE=0xFF000000 - +Active powerpc mpc5xxx - - icecube icecube_5200_LOWBOOT08 IceCube:SYS_TEXT_BASE=0xFF800000 - +Active powerpc mpc5xxx - - icecube Lite5200 IceCube - +Active powerpc mpc5xxx - - icecube Lite5200_LOWBOOT IceCube:SYS_TEXT_BASE=0xFF000000 - +Active powerpc mpc5xxx - - icecube Lite5200_LOWBOOT08 IceCube:SYS_TEXT_BASE=0xFF800000 - +Active powerpc mpc5xxx - - icecube lite5200b IceCube:MPC5200_DDR,LITE5200B - +Active powerpc mpc5xxx - - icecube lite5200b_LOWBOOT IceCube:MPC5200_DDR,LITE5200B,SYS_TEXT_BASE=0xFF000000 - +Active powerpc mpc5xxx - - icecube lite5200b_PM IceCube:MPC5200_DDR,LITE5200B,LITE5200B_PM - +Active powerpc mpc5xxx - - mcc200 mcc200 - - +Active powerpc mpc5xxx - - mcc200 mcc200_COM12 mcc200:CONSOLE_COM12 - +Active powerpc mpc5xxx - - mcc200 mcc200_COM12_highboot mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000 - +Active powerpc mpc5xxx - - mcc200 mcc200_COM12_highboot_SDRAM mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM - +Active powerpc mpc5xxx - - mcc200 mcc200_COM12_SDRAM mcc200:CONSOLE_COM12,MCC200_SDRAM - +Active powerpc mpc5xxx - - mcc200 mcc200_highboot mcc200:SYS_TEXT_BASE=0xFFF00000 - +Active powerpc mpc5xxx - - mcc200 mcc200_highboot_SDRAM mcc200:SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM - +Active powerpc mpc5xxx - - mcc200 mcc200_SDRAM mcc200:MCC200_SDRAM - +Active powerpc mpc5xxx - - mcc200 prs200 mcc200:PRS200,MCC200_SDRAM - +Active powerpc mpc5xxx - - mcc200 prs200_DDR mcc200:PRS200 - +Active powerpc mpc5xxx - - mcc200 prs200_highboot mcc200:PRS200,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM - +Active powerpc mpc5xxx - - mcc200 prs200_highboot_DDR mcc200:PRS200,SYS_TEXT_BASE=0xFFF00000 - +Active powerpc mpc5xxx - - pm520 PM520 - Josef Wagner +Active powerpc mpc5xxx - - pm520 PM520_DDR PM520:MPC5200_DDR Josef Wagner +Active powerpc mpc5xxx - - pm520 PM520_ROMBOOT PM520:BOOT_ROM Josef Wagner +Active powerpc mpc5xxx - - pm520 PM520_ROMBOOT_DDR PM520:MPC5200_DDR,BOOT_ROM Josef Wagner +Active powerpc mpc5xxx - - total5200 Total5200 Total5200:TOTAL5200_REV=1 - +Active powerpc mpc5xxx - - total5200 Total5200_lowboot Total5200:TOTAL5200_REV=1,SYS_TEXT_BASE=0xFE000000 - +Active powerpc mpc5xxx - - total5200 Total5200_Rev2 Total5200:TOTAL5200_REV=2 - +Active powerpc mpc5xxx - - total5200 Total5200_Rev2_lowboot Total5200:TOTAL5200_REV=2,SYS_TEXT_BASE=0xFE000000 - +Active powerpc mpc5xxx - emk top5200 EVAL5200 TOP5200:EVAL5200 Reinhard Meyer +Active powerpc mpc5xxx - emk top5200 MINI5200 TOP5200:MINI5200 Reinhard Meyer +Active powerpc mpc5xxx - emk top5200 TOP5200 TOP5200:TOP5200 Reinhard Meyer +Active powerpc mpc5xxx - esd - cpci5200 - Reinhard Arlt +Active powerpc mpc5xxx - esd - mecp5200 - Reinhard Arlt +Active powerpc mpc5xxx - esd - pf5200 - Reinhard Arlt +Active powerpc mpc5xxx - ifm o2dnt2 O2D o2d Anatolij Gustschin +Active powerpc mpc5xxx - ifm o2dnt2 O2D300 o2d300 Anatolij Gustschin +Active powerpc mpc5xxx - ifm o2dnt2 O2DNT2 o2dnt2 Anatolij Gustschin +Active powerpc mpc5xxx - ifm o2dnt2 O2DNT2_RAMBOOT o2dnt2:SYS_TEXT_BASE=0x00100000 Anatolij Gustschin +Active powerpc mpc5xxx - ifm o2dnt2 O2I o2i Anatolij Gustschin +Active powerpc mpc5xxx - ifm o2dnt2 O2MNT o2mnt Anatolij Gustschin +Active powerpc mpc5xxx - ifm o2dnt2 O2MNT_O2M110 o2mnt:IFM_SENSOR_TYPE="O2M110" Anatolij Gustschin +Active powerpc mpc5xxx - ifm o2dnt2 O2MNT_O2M112 o2mnt:IFM_SENSOR_TYPE="O2M112" Anatolij Gustschin +Active powerpc mpc5xxx - ifm o2dnt2 O2MNT_O2M113 o2mnt:IFM_SENSOR_TYPE="O2M113" Anatolij Gustschin +Active powerpc mpc5xxx - ifm o2dnt2 O3DNT o3dnt Anatolij Gustschin +Active powerpc mpc5xxx - intercontrol digsy_mtc digsy_mtc - Werner Pfister +Active powerpc mpc5xxx - intercontrol digsy_mtc digsy_mtc_RAMBOOT digsy_mtc:SYS_TEXT_BASE=0x00100000 Werner Pfister +Active powerpc mpc5xxx - intercontrol digsy_mtc digsy_mtc_rev5 digsy_mtc:DIGSY_REV5 Werner Pfister +Active powerpc mpc5xxx - intercontrol digsy_mtc digsy_mtc_rev5_RAMBOOT digsy_mtc:SYS_TEXT_BASE=0x00100000,DIGSY_REV5 Werner Pfister +Active powerpc mpc5xxx - manroland - hmi1001 - - +Active powerpc mpc5xxx - manroland - mucmc52 - Heiko Schocher +Active powerpc mpc5xxx - manroland - uc101 - Heiko Schocher +Active powerpc mpc5xxx - phytec pcm030 pcm030 - Jon Smirl +Active powerpc mpc5xxx - phytec pcm030 pcm030_LOWBOOT pcm030:SYS_TEXT_BASE=0xFF000000 Jon Smirl +Active powerpc mpc5xxx - tqc tqm5200 aev - - +Active powerpc mpc5xxx - tqc tqm5200 cam5200 TQM5200:CAM5200,TQM5200S,TQM5200_B - +Active powerpc mpc5xxx - tqc tqm5200 cam5200_niosflash TQM5200:CAM5200,TQM5200S,TQM5200_B,CAM5200_NIOSFLASH - +Active powerpc mpc5xxx - tqc tqm5200 charon - Heiko Schocher +Active powerpc mpc5xxx - tqc tqm5200 fo300 TQM5200:FO300 - +Active powerpc mpc5xxx - tqc tqm5200 MiniFAP TQM5200:MINIFAP - +Active powerpc mpc5xxx - tqc tqm5200 TB5200 - - +Active powerpc mpc5xxx - tqc tqm5200 TB5200_B TB5200:TQM5200_B - +Active powerpc mpc5xxx - tqc tqm5200 TQM5200 - - +Active powerpc mpc5xxx - tqc tqm5200 TQM5200_B TQM5200:TQM5200_B - +Active powerpc mpc5xxx - tqc tqm5200 TQM5200_B_HIGHBOOT TQM5200:TQM5200_B,SYS_TEXT_BASE=0xFFF00000 - +Active powerpc mpc5xxx - tqc tqm5200 TQM5200_STK100 TQM5200:STK52XX_REV100 - +Active powerpc mpc5xxx - tqc tqm5200 TQM5200S TQM5200:TQM5200_B,TQM5200S - +Active powerpc mpc5xxx - tqc tqm5200 TQM5200S_HIGHBOOT TQM5200:TQM5200_B,TQM5200S,SYS_TEXT_BASE=0xFFF00000 - +Active powerpc mpc824x - - - utx8245 - Greg Allen +Active powerpc mpc824x - - a3000 A3000 - - +Active powerpc mpc824x - - cpc45 CPC45 - Josef Wagner +Active powerpc mpc824x - - cpc45 CPC45_ROMBOOT CPC45:BOOT_ROM Josef Wagner +Active powerpc mpc824x - - cu824 CU824 - Wolfgang Denk +Active powerpc mpc824x - - eXalion eXalion - Torsten Demke +Active powerpc mpc824x - - mvblue MVBLUE - - +Active powerpc mpc824x - - sandpoint Sandpoint8240 - Wolfgang Denk +Active powerpc mpc8260 - - - atc - Wolfgang Denk +Active powerpc mpc8260 - - - ep8260 - Frank Panno +Active powerpc mpc8260 - - - ep82xxm - - +Active powerpc mpc8260 - - - gw8260 - Oliver Brown +Active powerpc mpc8260 - - - hymod - Murray Jensen +Active powerpc mpc8260 - - - sacsng - Jerry Van Baren +Active powerpc mpc8260 - - cogent cogent_mpc8260 - Murray Jensen +Active powerpc mpc8260 - - cpu86 CPU86 - Wolfgang Denk +Active powerpc mpc8260 - - cpu86 CPU86_ROMBOOT CPU86:BOOT_ROM Wolfgang Denk +Active powerpc mpc8260 - - cpu87 CPU87 - - +Active powerpc mpc8260 - - cpu87 CPU87_ROMBOOT CPU87:BOOT_ROM - +Active powerpc mpc8260 - - ep8248 ep8248 - Yuli Barcohen +Active powerpc mpc8260 - - iphase4539 IPHASE4539 - Wolfgang Grandegger +Active powerpc mpc8260 - - muas3001 muas3001 - Heiko Schocher +Active powerpc mpc8260 - - muas3001 muas3001_dev muas3001:MUAS_DEV_BOARD Heiko Schocher +Active powerpc mpc8260 - - pm826 PM825 PM826:PCI,SYS_TEXT_BASE=0xFF000000 Wolfgang Denk +Active powerpc mpc8260 - - pm826 PM825_BIGFLASH PM826:PCI,FLASH_32MB,SYS_TEXT_BASE=0x40000000 Wolfgang Denk +Active powerpc mpc8260 - - pm826 PM825_ROMBOOT PM826:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000 Wolfgang Denk +Active powerpc mpc8260 - - pm826 PM825_ROMBOOT_BIGFLASH PM826:PCI,BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000 Wolfgang Denk +Active powerpc mpc8260 - - pm826 PM826 PM826:SYS_TEXT_BASE=0xFF000000 Wolfgang Denk +Active powerpc mpc8260 - - pm826 PM826_BIGFLASH PM826:FLASH_32MB,SYS_TEXT_BASE=0x40000000 Wolfgang Denk +Active powerpc mpc8260 - - pm826 PM826_ROMBOOT PM826:BOOT_ROM,SYS_TEXT_BASE=0xFF800000 Wolfgang Denk +Active powerpc mpc8260 - - pm826 PM826_ROMBOOT_BIGFLASH PM826:BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000 Wolfgang Denk +Active powerpc mpc8260 - - pm828 PM828 - - +Active powerpc mpc8260 - - pm828 PM828_PCI PM828:PCI - +Active powerpc mpc8260 - - pm828 PM828_ROMBOOT PM828:BOOT_ROM,SYS_TEXT_BASE=0xFF800000 - +Active powerpc mpc8260 - - pm828 PM828_ROMBOOT_PCI PM828:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000 - +Active powerpc mpc8260 - freescale mpc8266ads MPC8266ADS - Rune Torgersen +Active powerpc mpc8260 - funkwerk vovpn-gw VoVPN-GW_66MHz VoVPN-GW:CLKIN_66MHz - +Active powerpc mpc8260 - ids ids8247 IDS8247 - Heiko Schocher +Active powerpc mpc8260 - keymile km82xx mgcoge km82xx:MGCOGE Holger Brunck +Active powerpc mpc8260 - keymile km82xx mgcoge3ne km82xx:MGCOGE3NE Holger Brunck +Active powerpc mpc8260 - tqc tqm8260 TQM8255_AA TQM8260:MPC8255,300MHz Wolfgang Denk +Active powerpc mpc8260 - tqc tqm8260 TQM8260_AA TQM8260:MPC8260,200MHz Wolfgang Denk +Active powerpc mpc8260 - tqc tqm8260 TQM8260_AB TQM8260:MPC8260,200MHz,L2_CACHE,BUSMODE_60x Wolfgang Denk +Active powerpc mpc8260 - tqc tqm8260 TQM8260_AC TQM8260:MPC8260,200MHz,L2_CACHE,BUSMODE_60x Wolfgang Denk +Active powerpc mpc8260 - tqc tqm8260 TQM8260_AD TQM8260:MPC8260,300MHz,BUSMODE_60x Wolfgang Denk +Active powerpc mpc8260 - tqc tqm8260 TQM8260_AE TQM8260:MPC8260,266MHz Wolfgang Denk +Active powerpc mpc8260 - tqc tqm8260 TQM8260_AF TQM8260:MPC8260,300MHz,BUSMODE_60x Wolfgang Denk +Active powerpc mpc8260 - tqc tqm8260 TQM8260_AG TQM8260:MPC8260,300MHz Wolfgang Denk +Active powerpc mpc8260 - tqc tqm8260 TQM8260_AH TQM8260:MPC8260,300MHz,L2_CACHE,BUSMODE_60x Wolfgang Denk +Active powerpc mpc8260 - tqc tqm8260 TQM8260_AI TQM8260:MPC8260,300MHz,BUSMODE_60x Wolfgang Denk +Active powerpc mpc8260 - tqc tqm8260 TQM8265_AA TQM8260:MPC8265,300MHz,BUSMODE_60x Wolfgang Denk +Active powerpc mpc8260 - tqc tqm8272 TQM8272 - - +Active powerpc mpc83xx - - - mpc8308_p1m - Ilya Yanok +Active powerpc mpc83xx - - sbc8349 sbc8349 - Paul Gortmaker +Active powerpc mpc83xx - - sbc8349 sbc8349_PCI_33 sbc8349:PCI,PCI_33M Paul Gortmaker +Active powerpc mpc83xx - - sbc8349 sbc8349_PCI_66 sbc8349:PCI,PCI_66M Paul Gortmaker +Active powerpc mpc83xx - - ve8313 ve8313 - Heiko Schocher +Active powerpc mpc83xx - esd vme8349 caddy2 vme8349:CADDY2 Reinhard Arlt +Active powerpc mpc83xx - esd vme8349 vme8349 - Reinhard Arlt +Active powerpc mpc83xx - freescale mpc8308rdb MPC8308RDB - Ilya Yanok +Active powerpc mpc83xx - freescale mpc8313erdb MPC8313ERDB_33 MPC8313ERDB:SYS_33MHZ - +Active powerpc mpc83xx - freescale mpc8313erdb MPC8313ERDB_66 MPC8313ERDB:SYS_66MHZ - +Active powerpc mpc83xx - freescale mpc8313erdb MPC8313ERDB_NAND_33 MPC8313ERDB:SYS_33MHZ,NAND - +Active powerpc mpc83xx - freescale mpc8313erdb MPC8313ERDB_NAND_66 MPC8313ERDB:SYS_66MHZ,NAND - +Active powerpc mpc83xx - freescale mpc8315erdb MPC8315ERDB - Dave Liu +Active powerpc mpc83xx - freescale mpc8315erdb MPC8315ERDB_NAND MPC8315ERDB:NAND_U_BOOT Dave Liu +Active powerpc mpc83xx - freescale mpc8323erdb MPC8323ERDB - Michael Barkowski +Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS - Dave Liu +Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS_ATM MPC832XEMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 Dave Liu +Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS_HOST_33 MPC832XEMDS:PCI,PCI_33M,PQ_MDS_PIB=1 Dave Liu +Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS_HOST_66 MPC832XEMDS:PCI,PCI_66M,PQ_MDS_PIB=1 Dave Liu +Active powerpc mpc83xx - freescale mpc832xemds MPC832XEMDS_SLAVE MPC832XEMDS:PCI,PCISLAVE Dave Liu +Active powerpc mpc83xx - freescale mpc8349emds MPC8349EMDS - Kim Phillips +Active powerpc mpc83xx - freescale mpc8349itx MPC8349ITX MPC8349ITX:MPC8349ITX - +Active powerpc mpc83xx - freescale mpc8349itx MPC8349ITX_LOWBOOT MPC8349ITX:MPC8349ITX,SYS_TEXT_BASE=0xFE000000 - +Active powerpc mpc83xx - freescale mpc8349itx MPC8349ITXGP MPC8349ITX:MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000 - +Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_33 MPC8360EMDS:CLKIN_33MHZ Dave Liu +Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_33_ATM MPC8360EMDS:CLKIN_33MHZ,PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 Dave Liu +Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_33_HOST_33 MPC8360EMDS:CLKIN_33MHZ,PCI,PCI_33M,PQ_MDS_PIB=1 Dave Liu +Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_33_HOST_66 MPC8360EMDS:CLKIN_33MHZ,PCI,PCI_66M,PQ_MDS_PIB=1 Dave Liu +Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_33_SLAVE MPC8360EMDS:CLKIN_33MHZ,PCI,PCISLAVE Dave Liu +Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66 MPC8360EMDS:CLKIN_66MHZ Dave Liu +Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66_ATM MPC8360EMDS:CLKIN_66MHZ,PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 Dave Liu +Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66_HOST_33 MPC8360EMDS:CLKIN_66MHZ,PCI,PCI_33M,PQ_MDS_PIB=1 Dave Liu +Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66_HOST_66 MPC8360EMDS:CLKIN_66MHZ,PCI,PCI_66M,PQ_MDS_PIB=1 Dave Liu +Active powerpc mpc83xx - freescale mpc8360emds MPC8360EMDS_66_SLAVE MPC8360EMDS:CLKIN_66MHZ,PCI,PCISLAVE Dave Liu +Active powerpc mpc83xx - freescale mpc837xemds MPC837XEMDS - Dave Liu +Active powerpc mpc83xx - freescale mpc837xemds MPC837XEMDS_HOST MPC837XEMDS:PCI Dave Liu +Active powerpc mpc83xx - freescale mpc837xerdb MPC837XERDB - Joe D'Abbraccio +Active powerpc mpc83xx - ids ids8313 ids8313 ids8313:SYS_TEXT_BASE=0xFFF00000 Heiko Schocher +Active powerpc mpc83xx - keymile km83xx kmcoge5ne km8360:KMCOGE5NE Holger Brunck +Active powerpc mpc83xx - keymile km83xx kmeter1 km8360:KMETER1 Holger Brunck +Active powerpc mpc83xx - keymile km83xx kmopti2 tuxx1:KMOPTI2 Holger Brunck +Active powerpc mpc83xx - keymile km83xx kmsupx5 tuxx1:KMSUPX5 Heiko Schocher +Active powerpc mpc83xx - keymile km83xx kmvect1 suvd3:KMVECT1 Holger Brunck +Active powerpc mpc83xx - keymile km83xx suvd3 suvd3:SUVD3 Holger Brunck +Active powerpc mpc83xx - keymile km83xx tuge1 tuxx1:TUGE1 Holger Brunck +Active powerpc mpc83xx - keymile km83xx tuxx1 tuxx1:TUXX1 Holger Brunck +Active powerpc mpc83xx - sheldon simpc8313 SIMPC8313_LP SIMPC8313:NAND_LP Ron Madrid +Active powerpc mpc83xx - sheldon simpc8313 SIMPC8313_SP SIMPC8313:NAND_SP Ron Madrid +Active powerpc mpc83xx - tqc tqm834x TQM834x - - +Active powerpc mpc85xx - - sbc8548 sbc8548 - Paul Gortmaker +Active powerpc mpc85xx - - sbc8548 sbc8548_PCI_33 sbc8548:PCI,33 Paul Gortmaker +Active powerpc mpc85xx - - sbc8548 sbc8548_PCI_33_PCIE sbc8548:PCI,33,PCIE Paul Gortmaker +Active powerpc mpc85xx - - sbc8548 sbc8548_PCI_66 sbc8548:PCI,66 Paul Gortmaker +Active powerpc mpc85xx - - sbc8548 sbc8548_PCI_66_PCIE sbc8548:PCI,66,PCIE Paul Gortmaker +Active powerpc mpc85xx - - socrates socrates - - +Active powerpc mpc85xx - exmeritus hww1u1a HWW1U1A - Kyle Moffett +Active powerpc mpc85xx - freescale b4860qds B4420QDS B4860QDS:PPC_B4420 - +Active powerpc mpc85xx - freescale b4860qds B4420QDS_NAND B4860QDS:PPC_B4420,RAMBOOT_PBL,SPL_FSL_PBL,NAND - +Active powerpc mpc85xx - freescale b4860qds B4420QDS_SPIFLASH B4860QDS:PPC_B4420,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale b4860qds B4860QDS B4860QDS:PPC_B4860 - +Active powerpc mpc85xx - freescale b4860qds B4860QDS_NAND B4860QDS:PPC_B4860,RAMBOOT_PBL,SPL_FSL_PBL,NAND - +Active powerpc mpc85xx - freescale b4860qds B4860QDS_SECURE_BOOT B4860QDS:PPC_B4860,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale b4860qds B4860QDS_SPIFLASH B4860QDS:PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale b4860qds B4860QDS_SRIO_PCIE_BOOT B4860QDS:PPC_B4860,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale bsc9131rdb BSC9131RDB_NAND BSC9131RDB:BSC9131RDB,NAND Poonam Aggrwal +Active powerpc mpc85xx - freescale bsc9131rdb BSC9131RDB_NAND_SYSCLK100 BSC9131RDB:BSC9131RDB,NAND,SYS_CLK_100 Poonam Aggrwal +Active powerpc mpc85xx - freescale bsc9131rdb BSC9131RDB_SPIFLASH BSC9131RDB:BSC9131RDB,SPIFLASH Poonam Aggrwal +Active powerpc mpc85xx - freescale bsc9131rdb BSC9131RDB_SPIFLASH_SYSCLK100 BSC9131RDB:BSC9131RDB,SPIFLASH,SYS_CLK_100 Poonam Aggrwal +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NAND_DDRCLK100 BSC9132QDS:BSC9132QDS,NAND,SYS_CLK_100_DDR_100 Naveen Burmi +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NAND_DDRCLK100_SECURE BSC9132QDS:BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_100,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NAND_DDRCLK133 BSC9132QDS:BSC9132QDS,NAND,SYS_CLK_100_DDR_133 Naveen Burmi +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NAND_DDRCLK133_SECURE BSC9132QDS:BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_133,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NOR_DDRCLK100 BSC9132QDS:BSC9132QDS,SYS_CLK_100_DDR_100 Naveen Burmi +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NOR_DDRCLK100_SECURE BSC9132QDS:BSC9132QDS,SYS_CLK_100_DDR_100,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NOR_DDRCLK133 BSC9132QDS:BSC9132QDS,SYS_CLK_100_DDR_133 Naveen Burmi +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_NOR_DDRCLK133_SECURE BSC9132QDS:BSC9132QDS,SYS_CLK_100_DDR_133,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SDCARD_DDRCLK100 BSC9132QDS:BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100 Naveen Burmi +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SDCARD_DDRCLK100_SECURE BSC9132QDS:BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SDCARD_DDRCLK133 BSC9132QDS:BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133 Naveen Burmi +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SDCARD_DDRCLK133_SECURE BSC9132QDS:BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SPIFLASH_DDRCLK100 BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100 Naveen Burmi +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SPIFLASH_DDRCLK100_SECURE BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SPIFLASH_DDRCLK133 BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133 Naveen Burmi +Active powerpc mpc85xx - freescale bsc9132qds BSC9132QDS_SPIFLASH_DDRCLK133_SECURE BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale c29xpcie C29XPCIE C29XPCIE:C29XPCIE,36BIT Po Liu +Active powerpc mpc85xx - freescale c29xpcie C29XPCIE_NAND C29XPCIE:C29XPCIE,36BIT,NAND Po Liu +Active powerpc mpc85xx - freescale c29xpcie C29XPCIE_SPIFLASH C29XPCIE:C29XPCIE,36BIT,SPIFLASH Po Liu +Active powerpc mpc85xx - freescale corenet_ds P3041DS - - +Active powerpc mpc85xx - freescale corenet_ds P3041DS_NAND P3041DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P3041DS_SDCARD P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P3041DS_SECURE_BOOT P3041DS:SECURE_BOOT - +Active powerpc mpc85xx - freescale corenet_ds P3041DS_SPIFLASH P3041DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P3041DS_SRIO_PCIE_BOOT P3041DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P4080DS - - +Active powerpc mpc85xx - freescale corenet_ds P4080DS_SDCARD P4080DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P4080DS_SECURE_BOOT P4080DS:SECURE_BOOT - +Active powerpc mpc85xx - freescale corenet_ds P4080DS_SPIFLASH P4080DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P4080DS_SRIO_PCIE_BOOT P4080DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P5020DS - - +Active powerpc mpc85xx - freescale corenet_ds P5020DS_NAND P5020DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P5020DS_SDCARD P5020DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P5020DS_SECURE_BOOT P5020DS:SECURE_BOOT - +Active powerpc mpc85xx - freescale corenet_ds P5020DS_SPIFLASH P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P5020DS_SRIO_PCIE_BOOT P5020DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P5040DS - - +Active powerpc mpc85xx - freescale corenet_ds P5040DS_NAND P5040DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P5040DS_SDCARD P5040DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale corenet_ds P5040DS_SPIFLASH P5040DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS - - +Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS_36BIT MPC8536DS:36BIT - +Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS_NAND MPC8536DS:NAND - +Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS_SDCARD MPC8536DS:SDCARD - +Active powerpc mpc85xx - freescale mpc8536ds MPC8536DS_SPIFLASH MPC8536DS:SPIFLASH - +Active powerpc mpc85xx - freescale mpc8540ads MPC8540ADS - Kumar Gala +Active powerpc mpc85xx - freescale mpc8541cds MPC8541CDS - Kumar Gala +Active powerpc mpc85xx - freescale mpc8541cds MPC8541CDS_legacy MPC8541CDS:LEGACY Kumar Gala +Active powerpc mpc85xx - freescale mpc8544ds MPC8544DS - - +Active powerpc mpc85xx - freescale mpc8548cds MPC8548CDS - - +Active powerpc mpc85xx - freescale mpc8548cds MPC8548CDS_36BIT MPC8548CDS:36BIT - +Active powerpc mpc85xx - freescale mpc8548cds MPC8548CDS_legacy MPC8548CDS:LEGACY - +Active powerpc mpc85xx - freescale mpc8555cds MPC8555CDS - Kumar Gala +Active powerpc mpc85xx - freescale mpc8555cds MPC8555CDS_legacy MPC8555CDS:LEGACY Kumar Gala +Active powerpc mpc85xx - freescale mpc8560ads MPC8560ADS - Kumar Gala +Active powerpc mpc85xx - freescale mpc8568mds MPC8568MDS - - +Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS - - +Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS_ATM MPC8569MDS:ATM - +Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS_NAND MPC8569MDS:NAND - +Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS - - +Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_36BIT MPC8572DS:36BIT - +Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_NAND MPC8572DS:NAND - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND P1010RDB:P1010RDB_PA,36BIT,NAND - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND_SECBOOT P1010RDB:P1010RDB_PA,36BIT,NAND_SECBOOT,SECURE_BOOT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NOR P1010RDB:P1010RDB_PA,36BIT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NOR_SECBOOT P1010RDB:P1010RDB_PA,36BIT,SECURE_BOOT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_SDCARD P1010RDB:P1010RDB_PA,36BIT,SDCARD - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_SPIFLASH P1010RDB:P1010RDB_PA,36BIT,SPIFLASH - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_SPIFLASH_SECBOOT P1010RDB:P1010RDB_PA,36BIT,SPIFLASH,SECURE_BOOT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_NAND P1010RDB:P1010RDB_PA,NAND - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_NAND_SECBOOT P1010RDB:P1010RDB_PA,NAND_SECBOOT,SECURE_BOOT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_NOR P1010RDB:P1010RDB_PA - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_NOR_SECBOOT P1010RDB:P1010RDB_PA,SECURE_BOOT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_SDCARD P1010RDB:P1010RDB_PA,SDCARD - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_SPIFLASH P1010RDB:P1010RDB_PA,SPIFLASH - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_SPIFLASH_SECBOOT P1010RDB:P1010RDB_PA,SPIFLASH,SECURE_BOOT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_NAND P1010RDB:P1010RDB_PB,36BIT,NAND - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_NAND_SECBOOT P1010RDB:P1010RDB_PB,36BIT,NAND_SECBOOT,SECURE_BOOT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_NOR P1010RDB:P1010RDB_PB,36BIT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_NOR_SECBOOT P1010RDB:P1010RDB_PB,36BIT,SECURE_BOOT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_SDCARD P1010RDB:P1010RDB_PB,36BIT,SDCARD - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_SPIFLASH P1010RDB:P1010RDB_PB,36BIT,SPIFLASH - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_SPIFLASH_SECBOOT P1010RDB:P1010RDB_PB,36BIT,SPIFLASH,SECURE_BOOT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_NAND P1010RDB:P1010RDB_PB,NAND - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_NAND_SECBOOT P1010RDB:P1010RDB_PB,NAND_SECBOOT,SECURE_BOOT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_NOR P1010RDB:P1010RDB_PB - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_NOR_SECBOOT P1010RDB:P1010RDB_PB,SECURE_BOOT - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_SDCARD P1010RDB:P1010RDB_PB,SDCARD - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_SPIFLASH P1010RDB:P1010RDB_PB,SPIFLASH - +Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_SPIFLASH_SECBOOT P1010RDB:P1010RDB_PB,SPIFLASH,SECURE_BOOT - +Active powerpc mpc85xx - freescale p1022ds P1022DS - Timur Tabi +Active powerpc mpc85xx - freescale p1022ds P1022DS_36BIT P1022DS:36BIT Timur Tabi +Active powerpc mpc85xx - freescale p1022ds P1022DS_36BIT_NAND P1022DS:36BIT,NAND Timur Tabi +Active powerpc mpc85xx - freescale p1022ds P1022DS_36BIT_SDCARD P1022DS:36BIT,SDCARD Timur Tabi +Active powerpc mpc85xx - freescale p1022ds P1022DS_36BIT_SPIFLASH P1022DS:36BIT,SPIFLASH Timur Tabi +Active powerpc mpc85xx - freescale p1022ds P1022DS_NAND P1022DS:NAND Timur Tabi +Active powerpc mpc85xx - freescale p1022ds P1022DS_SDCARD P1022DS:SDCARD Timur Tabi +Active powerpc mpc85xx - freescale p1022ds P1022DS_SPIFLASH P1022DS:SPIFLASH Timur Tabi +Active powerpc mpc85xx - freescale p1023rdb P1023RDB - - +Active powerpc mpc85xx - freescale p1023rds P1023RDS - Roy Zang +Active powerpc mpc85xx - freescale p1023rds P1023RDS_NAND P1023RDS:NAND Roy Zang +Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB P1_P2_RDB:P1011RDB - +Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_36BIT P1_P2_RDB:P1011RDB,36BIT - +Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_36BIT_SDCARD P1_P2_RDB:P1011RDB,36BIT,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_36BIT_SPIFLASH P1_P2_RDB:P1011RDB,36BIT,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_NAND P1_P2_RDB:P1011RDB,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_SDCARD P1_P2_RDB:P1011RDB,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_SPIFLASH P1_P2_RDB:P1011RDB,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB P1_P2_RDB:P1020RDB - +Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB_36BIT P1_P2_RDB:P1020RDB,36BIT - +Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB_36BIT_SDCARD P1_P2_RDB:P1020RDB,36BIT,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB_36BIT_SPIFLASH P1_P2_RDB:P1020RDB,36BIT,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB_NAND P1_P2_RDB:P1020RDB,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB_SDCARD P1_P2_RDB:P1020RDB,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb P1020RDB_SPIFLASH P1_P2_RDB:P1020RDB,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB P1_P2_RDB:P2010RDB - +Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB_36BIT P1_P2_RDB:P2010RDB,36BIT - +Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB_36BIT_SDCARD P1_P2_RDB:P2010RDB,36BIT,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB_36BIT_SPIFLASH P1_P2_RDB:P2010RDB,36BIT,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB_NAND P1_P2_RDB:P2010RDB,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB_SDCARD P1_P2_RDB:P2010RDB,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb P2010RDB_SPIFLASH P1_P2_RDB:P2010RDB,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB P1_P2_RDB:P2020RDB Poonam Aggrwal +Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB_36BIT P1_P2_RDB:P2020RDB,36BIT - +Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB_36BIT_SDCARD P1_P2_RDB:P2020RDB,36BIT,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB_36BIT_SPIFLASH P1_P2_RDB:P2020RDB,36BIT,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB_NAND P1_P2_RDB:P2020RDB,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB_SDCARD P1_P2_RDB:P2020RDB,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb P2020RDB_SPIFLASH P1_P2_RDB:P2020RDB,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020MBG-PC p1_p2_rdb_pc:P1020MBG - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020MBG-PC_36BIT p1_p2_rdb_pc:P1020MBG,36BIT - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020MBG-PC_36BIT_SDCARD p1_p2_rdb_pc:P1020MBG,SDCARD,36BIT - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020MBG-PC_SDCARD p1_p2_rdb_pc:P1020MBG,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC p1_p2_rdb_pc:P1020RDB_PC - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_36BIT p1_p2_rdb_pc:P1020RDB_PC,36BIT - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_36BIT_NAND p1_p2_rdb_pc:P1020RDB_PC,36BIT,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_36BIT_SDCARD p1_p2_rdb_pc:P1020RDB_PC,36BIT,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_36BIT_SPIFLASH p1_p2_rdb_pc:P1020RDB_PC,36BIT,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_NAND p1_p2_rdb_pc:P1020RDB_PC,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_SDCARD p1_p2_rdb_pc:P1020RDB_PC,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PC_SPIFLASH p1_p2_rdb_pc:P1020RDB_PC,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PD p1_p2_rdb_pc:P1020RDB_PD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PD_NAND p1_p2_rdb_pc:P1020RDB_PD,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PD_SDCARD p1_p2_rdb_pc:P1020RDB_PD,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020RDB-PD_SPIFLASH p1_p2_rdb_pc:P1020RDB_PD,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020UTM-PC p1_p2_rdb_pc:P1020UTM - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020UTM-PC_36BIT p1_p2_rdb_pc:P1020UTM,36BIT - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020UTM-PC_36BIT_SDCARD p1_p2_rdb_pc:P1020UTM,36BIT,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1020UTM-PC_SDCARD p1_p2_rdb_pc:P1020UTM,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC p1_p2_rdb_pc:P1021RDB - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_36BIT p1_p2_rdb_pc:P1021RDB,36BIT - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_36BIT_NAND p1_p2_rdb_pc:P1021RDB,36BIT,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_36BIT_SDCARD p1_p2_rdb_pc:P1021RDB,36BIT,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_36BIT_SPIFLASH p1_p2_rdb_pc:P1021RDB,36BIT,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_NAND p1_p2_rdb_pc:P1021RDB,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_SDCARD p1_p2_rdb_pc:P1021RDB,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1021RDB-PC_SPIFLASH p1_p2_rdb_pc:P1021RDB,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1024RDB p1_p2_rdb_pc:P1024RDB - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1024RDB_36BIT p1_p2_rdb_pc:P1024RDB,36BIT - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1024RDB_NAND p1_p2_rdb_pc:P1024RDB,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1024RDB_SDCARD p1_p2_rdb_pc:P1024RDB,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1024RDB_SPIFLASH p1_p2_rdb_pc:P1024RDB,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1025RDB p1_p2_rdb_pc:P1025RDB - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1025RDB_36BIT p1_p2_rdb_pc:P1025RDB,36BIT - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1025RDB_NAND p1_p2_rdb_pc:P1025RDB,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1025RDB_SDCARD p1_p2_rdb_pc:P1025RDB,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P1025RDB_SPIFLASH p1_p2_rdb_pc:P1025RDB,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC p1_p2_rdb_pc:P2020RDB - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_36BIT p1_p2_rdb_pc:P2020RDB,36BIT - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_36BIT_NAND p1_p2_rdb_pc:P2020RDB,36BIT,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_36BIT_SDCARD p1_p2_rdb_pc:P2020RDB,36BIT,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_36BIT_SPIFLASH p1_p2_rdb_pc:P2020RDB,36BIT,SPIFLASH - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_NAND p1_p2_rdb_pc:P2020RDB,NAND - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_SDCARD p1_p2_rdb_pc:P2020RDB,SDCARD - +Active powerpc mpc85xx - freescale p1_p2_rdb_pc P2020RDB-PC_SPIFLASH p1_p2_rdb_pc:P2020RDB,SPIFLASH - +Active powerpc mpc85xx - freescale p1_twr TWR-P1025 p1_twr:TWR_P1025 - +Active powerpc mpc85xx - freescale p2020come P2020COME_SDCARD P2020COME:SDCARD Ira W. Snyder +Active powerpc mpc85xx - freescale p2020come P2020COME_SPIFLASH P2020COME:SPIFLASH Ira W. Snyder +Active powerpc mpc85xx - freescale p2020ds P2020DS - - +Active powerpc mpc85xx - freescale p2020ds P2020DS_36BIT P2020DS:36BIT - +Active powerpc mpc85xx - freescale p2020ds P2020DS_DDR2 P2020DS:DDR2 - +Active powerpc mpc85xx - freescale p2020ds P2020DS_SDCARD P2020DS:SDCARD - +Active powerpc mpc85xx - freescale p2020ds P2020DS_SPIFLASH P2020DS:SPIFLASH - +Active powerpc mpc85xx - freescale p2041rdb P2041RDB - - +Active powerpc mpc85xx - freescale p2041rdb P2041RDB_NAND P2041RDB:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale p2041rdb P2041RDB_SDCARD P2041RDB:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale p2041rdb P2041RDB_SECURE_BOOT P2041RDB:SECURE_BOOT - +Active powerpc mpc85xx - freescale p2041rdb P2041RDB_SPIFLASH P2041RDB:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale p2041rdb P2041RDB_SRIO_PCIE_BOOT P2041RDB:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale qemu-ppce500 qemu-ppce500 - Alexander Graf +Active powerpc mpc85xx - freescale t1040qds T1040QDS T1040QDS:PPC_T1040 Poonam Aggrwal +Active powerpc mpc85xx - freescale t1040qds T1040QDS_D4 T1040QDS:PPC_T1040,SYS_FSL_DDR4 Poonam Aggrwal +Active powerpc mpc85xx - freescale t1040qds T1040QDS_SECURE_BOOT T1040QDS:PPC_T1040,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale t104xrdb T1040RDB T104xRDB:PPC_T1040,T1040RDB Priyanka Jain +Active powerpc mpc85xx - freescale t104xrdb T1040RDB_NAND T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND Priyanka Jain +Active powerpc mpc85xx - freescale t104xrdb T1040RDB_SDCARD T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - +Active powerpc mpc85xx - freescale t104xrdb T1040RDB_SECURE_BOOT T104xRDB:PPC_T1040,SECURE_BOOT,T1040RDB Aneesh Bansal +Active powerpc mpc85xx - freescale t104xrdb T1040RDB_SPIFLASH T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH Priyanka Jain +Active powerpc mpc85xx - freescale t104xrdb T1042RDB_PI T104xRDB:PPC_T1042,T1042RDB_PI Priyanka Jain +Active powerpc mpc85xx - freescale t104xrdb T1042RDB_PI_NAND T104xRDB:PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND Priyanka Jain +Active powerpc mpc85xx - freescale t104xrdb T1042RDB_PI_SDCARD T104xRDB:PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - +Active powerpc mpc85xx - freescale t104xrdb T1042RDB_PI_SPIFLASH T104xRDB:PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH Priyanka Jain +Active powerpc mpc85xx - freescale t208xqds T2080QDS T208xQDS:PPC_T2080 - +Active powerpc mpc85xx - freescale t208xqds T2080QDS_NAND T208xQDS:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND - +Active powerpc mpc85xx - freescale t208xqds T2080QDS_SDCARD T208xQDS:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - +Active powerpc mpc85xx - freescale t208xqds T2080QDS_SECURE_BOOT T208xQDS:PPC_T2080,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale t208xqds T2080QDS_SPIFLASH T208xQDS:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH - +Active powerpc mpc85xx - freescale t208xqds T2080QDS_SRIO_PCIE_BOOT T208xQDS:PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale t208xqds T2081QDS T208xQDS:PPC_T2081 - +Active powerpc mpc85xx - freescale t208xqds T2081QDS_NAND T208xQDS:PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,NAND - +Active powerpc mpc85xx - freescale t208xqds T2081QDS_SDCARD T208xQDS:PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - +Active powerpc mpc85xx - freescale t208xqds T2081QDS_SPIFLASH T208xQDS:PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH - +Active powerpc mpc85xx - freescale t208xqds T2081QDS_SRIO_PCIE_BOOT T208xQDS:PPC_T2081,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale t208xrdb T2080RDB T208xRDB:PPC_T2080 - +Active powerpc mpc85xx - freescale t208xrdb T2080RDB_NAND T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND - +Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SDCARD T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - +Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SPIFLASH T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH - +Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SRIO_PCIE_BOOT T208xRDB:PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale t4qds T4160QDS T4240QDS:PPC_T4160 - +Active powerpc mpc85xx - freescale t4qds T4160QDS_NAND T4240QDS:PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,NAND - +Active powerpc mpc85xx - freescale t4qds T4160QDS_SDCARD T4240QDS:PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - +Active powerpc mpc85xx - freescale t4qds T4160QDS_SECURE_BOOT T4240QDS:PPC_T4160,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale t4qds T4160QDS_SPIFLASH T4240QDS:PPC_T4160,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale t4qds T4240EMU T4240EMU:PPC_T4240 York Sun +Active powerpc mpc85xx - freescale t4qds T4240QDS T4240QDS:PPC_T4240 - +Active powerpc mpc85xx - freescale t4qds T4240QDS_NAND T4240QDS:PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,NAND - +Active powerpc mpc85xx - freescale t4qds T4240QDS_SDCARD T4240QDS:PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - +Active powerpc mpc85xx - freescale t4qds T4240QDS_SECURE_BOOT T4240QDS:PPC_T4240,SECURE_BOOT Aneesh Bansal +Active powerpc mpc85xx - freescale t4qds T4240QDS_SPIFLASH T4240QDS:PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale t4qds T4240QDS_SRIO_PCIE_BOOT T4240QDS:PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - gdsys p1022 controlcenterd_36BIT_SDCARD controlcenterd:36BIT,SDCARD Dirk Eibach +Active powerpc mpc85xx - gdsys p1022 controlcenterd_36BIT_SDCARD_DEVELOP controlcenterd:36BIT,SDCARD,DEVELOP Dirk Eibach +Active powerpc mpc85xx - gdsys p1022 controlcenterd_TRAILBLAZER controlcenterd:TRAILBLAZER,SPIFLASH Dirk Eibach +Active powerpc mpc85xx - gdsys p1022 controlcenterd_TRAILBLAZER_DEVELOP controlcenterd:TRAILBLAZER,SPIFLASH,DEVELOP Dirk Eibach +Active powerpc mpc85xx - keymile kmp204x kmcoge4 kmp204x:KMCOGE4 Valentin Longchamp +Active powerpc mpc85xx - keymile kmp204x kmlion1 kmp204x:KMLION1 Valentin Longchamp +Active powerpc mpc85xx - stx stxgp3 stxgp3 - Dan Malek +Active powerpc mpc85xx - stx stxssa stxssa - Dan Malek +Active powerpc mpc85xx - stx stxssa stxssa_4M stxssa:STXSSA_4M Dan Malek +Active powerpc mpc85xx - xes - xpedite520x - - +Active powerpc mpc85xx - xes - xpedite537x - - +Active powerpc mpc85xx - xes - xpedite550x - - +Active powerpc mpc86xx - - - sbc8641d - Paul Gortmaker +Active powerpc mpc86xx - freescale mpc8610hpcd MPC8610HPCD - - +Active powerpc mpc86xx - freescale mpc8641hpcn MPC8641HPCN - Kumar Gala +Active powerpc mpc86xx - freescale mpc8641hpcn MPC8641HPCN_36BIT MPC8641HPCN:PHYS_64BIT Kumar Gala +Active powerpc mpc86xx - xes - xpedite517x - - +Active powerpc mpc8xx - - - hermes - Wolfgang Denk +Active powerpc mpc8xx - - - lwmon - Wolfgang Denk +Active powerpc mpc8xx - - - quantum - - +Active powerpc mpc8xx - - - RRvision - Wolfgang Denk +Active powerpc mpc8xx - - - spc1920 - - +Active powerpc mpc8xx - - - svm_sc8xx - John Zhan +Active powerpc mpc8xx - - - v37 - - +Active powerpc mpc8xx - - cogent cogent_mpc8xx - Murray Jensen +Active powerpc mpc8xx - - esteem192e ESTEEM192E - Conn Clark +Active powerpc mpc8xx - - fads MPC86xADS - - +Active powerpc mpc8xx - - fads MPC885ADS - - +Active powerpc mpc8xx - - flagadm FLAGADM - Kári Davíðsson +Active powerpc mpc8xx - - gen860t GEN860T - Keith Outwater +Active powerpc mpc8xx - - gen860t GEN860T_SC GEN860T:SC Keith Outwater +Active powerpc mpc8xx - - icu862 ICU862 - Wolfgang Denk +Active powerpc mpc8xx - - icu862 ICU862_100MHz ICU862:100MHz Wolfgang Denk +Active powerpc mpc8xx - - ip860 IP860 - Wolfgang Denk +Active powerpc mpc8xx - - ivm IVML24 IVML24:IVML24_16M Wolfgang Denk +Active powerpc mpc8xx - - ivm IVML24_128 IVML24:IVML24_32M Wolfgang Denk +Active powerpc mpc8xx - - ivm IVML24_256 IVML24:IVML24_64M Wolfgang Denk +Active powerpc mpc8xx - - ivm IVMS8 IVMS8:IVMS8_16M Wolfgang Denk +Active powerpc mpc8xx - - ivm IVMS8_128 IVMS8:IVMS8_32M Wolfgang Denk +Active powerpc mpc8xx - - ivm IVMS8_256 IVMS8:IVMS8_64M Wolfgang Denk +Active powerpc mpc8xx - - netphone NETPHONE NETPHONE:NETPHONE_VERSION=1 - +Active powerpc mpc8xx - - netphone NETPHONE_V2 NETPHONE:NETPHONE_VERSION=2 - +Active powerpc mpc8xx - - netta NETTA - - +Active powerpc mpc8xx - - netta NETTA_6412 NETTA:NETTA_6412=1 - +Active powerpc mpc8xx - - netta NETTA_6412_SWAPHOOK NETTA:NETTA_6412=1,NETTA_SWAPHOOK=1 - +Active powerpc mpc8xx - - netta NETTA_ISDN NETTA:NETTA_ISDN=1 - +Active powerpc mpc8xx - - netta NETTA_ISDN_6412 NETTA:NETTA_ISDN=1,NETTA_6412=1 - +Active powerpc mpc8xx - - netta NETTA_ISDN_6412_SWAPHOOK NETTA:NETTA_ISDN=1,NETTA_6412=1,NETTA_SWAPHOOK=1 - +Active powerpc mpc8xx - - netta NETTA_ISDN_SWAPHOOK NETTA:NETTA_ISDN=1,NETTA_SWAPHOOK=1 - +Active powerpc mpc8xx - - netta NETTA_SWAPHOOK NETTA:NETTA_SWAPHOOK=1 - +Active powerpc mpc8xx - - netta2 NETTA2 NETTA2:NETTA2_VERSION=1 - +Active powerpc mpc8xx - - netta2 NETTA2_V2 NETTA2:NETTA2_VERSION=2 - +Active powerpc mpc8xx - - netvia NETVIA NETVIA:NETVIA_VERSION=1 Pantelis Antoniou +Active powerpc mpc8xx - - netvia NETVIA_V2 NETVIA:NETVIA_VERSION=2 Pantelis Antoniou +Active powerpc mpc8xx - - r360mpi R360MPI - Wolfgang Denk +Active powerpc mpc8xx - - rbc823 RBC823 - - +Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW - - +Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_64 RPXlite_DW:RPXlite_64MHz - +Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_64_LCD RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20 - +Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_LCD RPXlite_DW:LCD,NEC_NL6448BC20 - +Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_NVRAM RPXlite_DW:ENV_IS_IN_NVRAM - +Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_NVRAM_64 RPXlite_DW:RPXlite_64MHz,ENV_IS_IN_NVRAM - +Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_NVRAM_64_LCD RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20,ENV_IS_IN_NVRAM - +Active powerpc mpc8xx - - RPXlite_dw RPXlite_DW_NVRAM_LCD RPXlite_DW:LCD,NEC_NL6448BC20,ENV_IS_IN_NVRAM - +Active powerpc mpc8xx - - RRvision RRvision_LCD RRvision:LCD,SHARP_LQ104V7DS01 Wolfgang Denk +Active powerpc mpc8xx - - sixnet SXNI855T - Dave Ellis +Active powerpc mpc8xx - - spd8xx SPD823TS - Wolfgang Denk +Active powerpc mpc8xx - eltec mhpc MHPC - Frank Gottschling +Active powerpc mpc8xx - emk top860 TOP860 - Reinhard Meyer +Active powerpc mpc8xx - kup kup4k KUP4K - Klaus Heydeck +Active powerpc mpc8xx - kup kup4x KUP4X - Klaus Heydeck +Active powerpc mpc8xx - LEOX elpt860 ELPT860 - The LEOX team +Active powerpc mpc8xx - manroland - uc100 - Stefan Roese +Active powerpc mpc8xx - snmc qs850 QS823 - - +Active powerpc mpc8xx - snmc qs850 QS850 - - +Active powerpc mpc8xx - snmc qs860t QS860T - - +Active powerpc mpc8xx - stx stxxtc stxxtc - Dan Malek +Active powerpc mpc8xx - tqc tqm8xx FPS850L - Wolfgang Denk +Active powerpc mpc8xx - tqc tqm8xx FPS860L - Wolfgang Denk +Active powerpc mpc8xx - tqc tqm8xx NSCU - - +Active powerpc mpc8xx - tqc tqm8xx SM850 - Wolfgang Denk +Active powerpc mpc8xx - tqc tqm8xx TK885D - - +Active powerpc mpc8xx - tqc tqm8xx TQM823L - Wolfgang Denk +Active powerpc mpc8xx - tqc tqm8xx TQM823L_LCD TQM823L:LCD,NEC_NL6448BC20 Wolfgang Denk +Active powerpc mpc8xx - tqc tqm8xx TQM823M - - +Active powerpc mpc8xx - tqc tqm8xx TQM850L - Wolfgang Denk +Active powerpc mpc8xx - tqc tqm8xx TQM850M - - +Active powerpc mpc8xx - tqc tqm8xx TQM855L - Wolfgang Denk +Active powerpc mpc8xx - tqc tqm8xx TQM855M - - +Active powerpc mpc8xx - tqc tqm8xx TQM860L - Wolfgang Denk +Active powerpc mpc8xx - tqc tqm8xx TQM860M - - +Active powerpc mpc8xx - tqc tqm8xx TQM862L - - +Active powerpc mpc8xx - tqc tqm8xx TQM862M - - +Active powerpc mpc8xx - tqc tqm8xx TQM866M - - +Active powerpc mpc8xx - tqc tqm8xx TQM885D - - +Active powerpc mpc8xx - tqc tqm8xx TTTech TQM823L:LCD,SHARP_LQ104V7DS01 Wolfgang Denk +Active powerpc mpc8xx - tqc tqm8xx virtlab2 - - +Active powerpc mpc8xx - tqc tqm8xx wtk TQM823L:LCD,SHARP_LQ065T9DR51U Wolfgang Denk +Active powerpc ppc4xx - - - csb272 - Tolunay Orkun +Active powerpc ppc4xx - - - csb472 - Tolunay Orkun +Active powerpc ppc4xx - - - korat - Larry Johnson +Active powerpc ppc4xx - - - lwmon5 - Stefan Roese +Active powerpc ppc4xx - - - pcs440ep - Stefan Roese +Active powerpc ppc4xx - - - quad100hd - Gary Jennejohn +Active powerpc ppc4xx - - - sbc405 - - +Active powerpc ppc4xx - - - sc3 - Heiko Schocher +Active powerpc ppc4xx - - - t3corp - Stefan Roese +Active powerpc ppc4xx - - - zeus - Stefan Roese +Active powerpc ppc4xx - - g2000 G2000 - Matthias Fuchs +Active powerpc ppc4xx - - jse JSE - Stephen Williams +Active powerpc ppc4xx - - korat korat_perm korat:KORAT_PERMANENT Larry Johnson +Active powerpc ppc4xx - - lwmon5 lcd4_lwmon5 lwmon5:LCD4_LWMON5 Stefan Roese +Active powerpc ppc4xx - - w7o W7OLMC - Erik Theisen +Active powerpc ppc4xx - - w7o W7OLMG - Erik Theisen +Active powerpc ppc4xx - amcc - acadia - Stefan Roese +Active powerpc ppc4xx - amcc - bamboo - Stefan Roese +Active powerpc ppc4xx - amcc - bubinga - - +Active powerpc ppc4xx - amcc - ebony - Stefan Roese +Active powerpc ppc4xx - amcc - katmai - Stefan Roese +Active powerpc ppc4xx - amcc - luan - John Otken +Active powerpc ppc4xx - amcc - makalu - Stefan Roese +Active powerpc ppc4xx - amcc - ocotea - Stefan Roese +Active powerpc ppc4xx - amcc - redwood - Feng Kan +Active powerpc ppc4xx - amcc - taihu - John Otken +Active powerpc ppc4xx - amcc - taishan - Stefan Roese +Active powerpc ppc4xx - amcc - yucca - - +Active powerpc ppc4xx - amcc canyonlands arches canyonlands:ARCHES Stefan Roese +Active powerpc ppc4xx - amcc canyonlands canyonlands canyonlands:CANYONLANDS Stefan Roese +Active powerpc ppc4xx - amcc canyonlands glacier canyonlands:GLACIER Stefan Roese +Active powerpc ppc4xx - amcc kilauea haleakala kilauea:HALEAKALA Stefan Roese +Active powerpc ppc4xx - amcc kilauea kilauea kilauea:KILAUEA Stefan Roese +Active powerpc ppc4xx - amcc sequoia rainier sequoia:RAINIER Stefan Roese +Active powerpc ppc4xx - amcc sequoia rainier_ramboot sequoia:RAINIER,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds Stefan Roese +Active powerpc ppc4xx - amcc sequoia sequoia sequoia:SEQUOIA Stefan Roese +Active powerpc ppc4xx - amcc sequoia sequoia_ramboot sequoia:SEQUOIA,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds Stefan Roese +Active powerpc ppc4xx - amcc walnut sycamore walnut Stefan Roese +Active powerpc ppc4xx - amcc walnut walnut - Stefan Roese +Active powerpc ppc4xx - amcc yosemite yellowstone yosemite:YELLOWSTONE Stefan Roese +Active powerpc ppc4xx - amcc yosemite yosemite yosemite:YOSEMITE Stefan Roese +Active powerpc ppc4xx - avnet fx12mm fx12mm fx12mm:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,INIT_TLB=board/xilinx/ppc405-generic/init.o Georg Schardt +Active powerpc ppc4xx - avnet fx12mm fx12mm_flash fx12mm:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o Georg Schardt +Active powerpc ppc4xx - avnet v5fx30teval v5fx30teval v5fx30teval:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o Ricardo Ribalda +Active powerpc ppc4xx - avnet v5fx30teval v5fx30teval_flash v5fx30teval:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o Ricardo Ribalda +Active powerpc ppc4xx - dave PPChameleonEVB CATcenter CATcenter:PPCHAMELEON_MODULE_MODEL=1 - +Active powerpc ppc4xx - dave PPChameleonEVB CATcenter_25 CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25 - +Active powerpc ppc4xx - dave PPChameleonEVB CATcenter_33 CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33 - +Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB - Andrea "llandre" Marson +Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB_BA_25 PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_25 Andrea "llandre" Marson +Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB_BA_33 PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_33 Andrea "llandre" Marson +Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB_HI_25 PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_25 Andrea "llandre" Marson +Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB_HI_33 PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_33 Andrea "llandre" Marson +Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB_ME_25 PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25 Andrea "llandre" Marson +Active powerpc ppc4xx - dave PPChameleonEVB PPChameleonEVB_ME_33 PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33 Andrea "llandre" Marson +Active powerpc ppc4xx - esd apc405 APC405 - Matthias Fuchs +Active powerpc ppc4xx - esd ar405 AR405 - Matthias Fuchs +Active powerpc ppc4xx - esd ash405 ASH405 - Matthias Fuchs +Active powerpc ppc4xx - esd cms700 CMS700 - Matthias Fuchs +Active powerpc ppc4xx - esd cpci2dp CPCI2DP - Matthias Fuchs +Active powerpc ppc4xx - esd cpci405 CPCI405 - Matthias Fuchs +Active powerpc ppc4xx - esd cpci405 CPCI4052 - Matthias Fuchs +Active powerpc ppc4xx - esd cpci405 CPCI405AB - Matthias Fuchs +Active powerpc ppc4xx - esd cpci405 CPCI405DT - Matthias Fuchs +Active powerpc ppc4xx - esd cpciiser4 CPCIISER4 - Matthias Fuchs +Active powerpc ppc4xx - esd dp405 DP405 - Matthias Fuchs +Active powerpc ppc4xx - esd du405 DU405 - Matthias Fuchs +Active powerpc ppc4xx - esd du440 DU440 - Matthias Fuchs +Active powerpc ppc4xx - esd hh405 HH405 - Matthias Fuchs +Active powerpc ppc4xx - esd hub405 HUB405 - Matthias Fuchs +Active powerpc ppc4xx - esd ocrtc OCRTC - Matthias Fuchs +Active powerpc ppc4xx - esd pci405 PCI405 - Matthias Fuchs +Active powerpc ppc4xx - esd plu405 PLU405 - Matthias Fuchs +Active powerpc ppc4xx - esd pmc405 PMC405 - Matthias Fuchs +Active powerpc ppc4xx - esd pmc405de PMC405DE - Matthias Fuchs +Active powerpc ppc4xx - esd pmc440 PMC440 - Matthias Fuchs +Active powerpc ppc4xx - esd voh405 VOH405 - Matthias Fuchs +Active powerpc ppc4xx - esd vom405 VOM405 - Matthias Fuchs +Active powerpc ppc4xx - esd wuh405 WUH405 - Matthias Fuchs +Active powerpc ppc4xx - gdsys - dlvision - Dirk Eibach +Active powerpc ppc4xx - gdsys - gdppc440etx - Dirk Eibach +Active powerpc ppc4xx - gdsys 405ep dlvision-10g - Dirk Eibach +Active powerpc ppc4xx - gdsys 405ep io - Dirk Eibach +Active powerpc ppc4xx - gdsys 405ep iocon - Dirk Eibach +Active powerpc ppc4xx - gdsys 405ep neo - Dirk Eibach +Active powerpc ppc4xx - gdsys 405ex io64 - Dirk Eibach +Active powerpc ppc4xx - gdsys intip devconcenter intip:DEVCONCENTER Dirk Eibach +Active powerpc ppc4xx - gdsys intip intip intip:INTIB Dirk Eibach +Active powerpc ppc4xx - mosaixtech - icon - Stefan Roese +Active powerpc ppc4xx - mpl mip405 MIP405 - Denis Peter +Active powerpc ppc4xx - mpl mip405 MIP405T MIP405:MIP405T Denis Peter +Active powerpc ppc4xx - mpl pip405 PIP405 - Denis Peter +Active powerpc ppc4xx - prodrive - alpr - Stefan Roese +Active powerpc ppc4xx - prodrive - p3p440 - Stefan Roese +Active powerpc ppc4xx - xes - xpedite1000 - Peter Tyser +Active powerpc ppc4xx - xilinx ml507 ml507 ml507:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o Ricardo Ribalda +Active powerpc ppc4xx - xilinx ml507 ml507_flash ml507:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o Ricardo Ribalda +Active powerpc ppc4xx - xilinx ppc405-generic xilinx-ppc405-generic xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000 Ricardo Ribalda +Active powerpc ppc4xx - xilinx ppc405-generic xilinx-ppc405-generic_flash xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda +Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1 Ricardo Ribalda +Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic_flash xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda +Active sandbox sandbox - - sandbox - Simon Glass +Active sh sh2 - renesas rsk7203 rsk7203 - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu +Active sh sh2 - renesas rsk7264 rsk7264 - Phil Edworthy +Active sh sh2 - renesas rsk7269 rsk7269 - - +Active sh sh3 - - mpr2 mpr2 - Mark Jonas +Active sh sh3 - - ms7720se ms7720se - Yoshihiro Shimoda +Active sh sh3 - - shmin shmin - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu +Active sh sh4 - - espt espt - - +Active sh sh4 - - ms7722se ms7722se - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu +Active sh sh4 - - ms7750se ms7750se - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu +Active sh sh4 - alphaproject ap_sh4a_4a ap_sh4a_4a - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu +Active sh sh4 - renesas ap325rxa ap325rxa - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu +Active sh sh4 - renesas ecovec ecovec - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu +Active sh sh4 - renesas MigoR MigoR - - +Active sh sh4 - renesas r0p7734 r0p7734 - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu +Active sh sh4 - renesas r2dplus r2dplus - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu +Active sh sh4 - renesas r7780mp r7780mp - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu +Active sh sh4 - renesas sh7752evb sh7752evb - - +Active sh sh4 - renesas sh7753evb sh7753evb - - +Active sh sh4 - renesas sh7757lcr sh7757lcr - - +Active sh sh4 - renesas sh7763rdp sh7763rdp - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu +Active sh sh4 - renesas sh7785lcr sh7785lcr - - +Active sh sh4 - renesas sh7785lcr sh7785lcr_32bit sh7785lcr:SH_32BIT=1 - +Active sparc leon2 - gaisler - grsim_leon2 - - +Active sparc leon3 - gaisler - gr_cpci_ax2000 - - +Active sparc leon3 - gaisler - gr_ep2s60 - - +Active sparc leon3 - gaisler - gr_xc3s_1500 - - +Active sparc leon3 - gaisler - grsim - - +Active x86 x86 coreboot chromebook-x86 coreboot coreboot-x86 coreboot:SYS_TEXT_BASE=0x01110000 - # The following were moved to "Orphan" in April, 2014 -Orphan powerpc 74xx_7xx - - evb64260 ZUMA - Nye Liu -Orphan powerpc mpc824x - - musenki MUSENKI - Jim Thompson -Orphan powerpc mpc824x - - sandpoint Sandpoint8245 - Jim Thompson -Orphan powerpc mpc8260 - - - ppmc8260 - Brad Kemp +Orphan powerpc 74xx_7xx - - evb64260 ZUMA - Nye Liu +Orphan powerpc mpc824x - - musenki MUSENKI - Jim Thompson +Orphan powerpc mpc824x - - sandpoint Sandpoint8245 - Jim Thompson +Orphan powerpc mpc8260 - - - ppmc8260 - Brad Kemp # The following were moved to "Orphan" in March, 2014 -Orphan blackfin blackfin - - - cm-bf527 - Bluetechnix Tinyboards -Orphan blackfin blackfin - - - cm-bf533 - Bluetechnix Tinyboards -Orphan blackfin blackfin - - - cm-bf537e - Bluetechnix Tinyboards -Orphan blackfin blackfin - - - cm-bf537u - Bluetechnix Tinyboards -Orphan blackfin blackfin - - - cm-bf548 - Bluetechnix Tinyboards -Orphan blackfin blackfin - - - cm-bf561 - Bluetechnix Tinyboards -Orphan blackfin blackfin - - - tcm-bf518 - Bluetechnix Tinyboards -Orphan blackfin blackfin - - - tcm-bf537 - Bluetechnix Tinyboards -Orphan powerpc mpc5xxx - matrix_vision mvbc_p MVBC_P MVBC_P:MVBC_P Andre Schwarz -Orphan powerpc mpc5xxx - matrix_vision mvsmr MVSMR - Andre Schwarz -Orphan powerpc mpc824x - - hidden_dragon HIDDEN_DRAGON - Yusdi Santoso -Orphan powerpc mpc824x - etin - debris - Sangmoon Kim -Orphan powerpc mpc824x - etin - kvme080 - Sangmoon Kim -Orphan powerpc mpc8260 - - ep8248 ep8248 - Yuli Barcohen -Orphan powerpc mpc8260 - - ispan ISPAN - Yuli Barcohen -Orphan powerpc mpc8260 - - ispan ISPAN_REVB ISPAN:SYS_REV_B Yuli Barcohen -Orphan powerpc mpc8260 - - rattler Rattler - Yuli Barcohen -Orphan powerpc mpc8260 - - rattler Rattler8248 Rattler:MPC8248 Yuli Barcohen -Orphan powerpc mpc8260 - - zpc1900 ZPC1900 - Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads MPC8260ADS MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads MPC8260ADS_33MHz MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=33000000 Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads MPC8260ADS_33MHz_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=33000000,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads MPC8260ADS_40MHz MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=40000000 Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads MPC8260ADS_40MHz_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=40000000,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads MPC8260ADS_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads MPC8272ADS MPC8260ADS:ADSTYPE=CONFIG_SYS_8272ADS Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads MPC8272ADS_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_8272ADS,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS-VR MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000 Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS-VR_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS-ZU MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS-ZU_66MHz MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000 Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS-ZU_66MHz_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS-ZU_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen -Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen -Orphan powerpc mpc83xx - freescale mpc8360erdk MPC8360ERDK - Anton Vorontsov -Orphan powerpc mpc83xx - freescale mpc8360erdk MPC8360ERDK_33 MPC8360ERDK:CLKIN_33MHZ Anton Vorontsov -Orphan powerpc mpc83xx - matrix_vision mergerbox MERGERBOX - Andre Schwarz -Orphan powerpc mpc83xx - matrix_vision mvblm7 MVBLM7 - Andre Schwarz -Orphan powerpc mpc8xx - - adder Adder - Yuli Barcohen -Orphan powerpc mpc8xx - - adder AdderII Adder:MPC852T Yuli Barcohen -Orphan powerpc ppc4xx - amcc - bluestone - Tirumala Marri -Orphan powerpc ppc4xx - cray L1 CRAYL1 - David Updegraff -Orphan powerpc ppc4xx - sandburst karef KAREF - Travis Sawyer -Orphan powerpc ppc4xx - sandburst metrobox METROBOX - Travis Sawyer +Orphan blackfin blackfin - - - cm-bf527 - Bluetechnix Tinyboards +Orphan blackfin blackfin - - - cm-bf533 - Bluetechnix Tinyboards +Orphan blackfin blackfin - - - cm-bf537e - Bluetechnix Tinyboards +Orphan blackfin blackfin - - - cm-bf537u - Bluetechnix Tinyboards +Orphan blackfin blackfin - - - cm-bf548 - Bluetechnix Tinyboards +Orphan blackfin blackfin - - - cm-bf561 - Bluetechnix Tinyboards +Orphan blackfin blackfin - - - tcm-bf518 - Bluetechnix Tinyboards +Orphan blackfin blackfin - - - tcm-bf537 - Bluetechnix Tinyboards +Orphan powerpc mpc5xxx - matrix_vision mvbc_p MVBC_P MVBC_P:MVBC_P Andre Schwarz +Orphan powerpc mpc5xxx - matrix_vision mvsmr MVSMR - Andre Schwarz +Orphan powerpc mpc824x - - hidden_dragon HIDDEN_DRAGON - Yusdi Santoso +Orphan powerpc mpc824x - etin - debris - Sangmoon Kim +Orphan powerpc mpc824x - etin - kvme080 - Sangmoon Kim +Orphan powerpc mpc8260 - - ep8248 ep8248 - Yuli Barcohen +Orphan powerpc mpc8260 - - ispan ISPAN - Yuli Barcohen +Orphan powerpc mpc8260 - - ispan ISPAN_REVB ISPAN:SYS_REV_B Yuli Barcohen +Orphan powerpc mpc8260 - - rattler Rattler - Yuli Barcohen +Orphan powerpc mpc8260 - - rattler Rattler8248 Rattler:MPC8248 Yuli Barcohen +Orphan powerpc mpc8260 - - zpc1900 ZPC1900 - Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads MPC8260ADS MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads MPC8260ADS_33MHz MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=33000000 Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads MPC8260ADS_33MHz_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=33000000,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads MPC8260ADS_40MHz MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=40000000 Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads MPC8260ADS_40MHz_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=40000000,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads MPC8260ADS_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads MPC8272ADS MPC8260ADS:ADSTYPE=CONFIG_SYS_8272ADS Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads MPC8272ADS_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_8272ADS,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS-VR MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000 Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS-VR_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS-ZU MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS-ZU_66MHz MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000 Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS-ZU_66MHz_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS-ZU_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen +Orphan powerpc mpc8260 - freescale mpc8260ads PQ2FADS_lowboot MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,SYS_TEXT_BASE=0xFF800000 Yuli Barcohen +Orphan powerpc mpc83xx - freescale mpc8360erdk MPC8360ERDK - Anton Vorontsov +Orphan powerpc mpc83xx - freescale mpc8360erdk MPC8360ERDK_33 MPC8360ERDK:CLKIN_33MHZ Anton Vorontsov +Orphan powerpc mpc83xx - matrix_vision mergerbox MERGERBOX - Andre Schwarz +Orphan powerpc mpc83xx - matrix_vision mvblm7 MVBLM7 - Andre Schwarz +Orphan powerpc mpc8xx - - adder Adder - Yuli Barcohen +Orphan powerpc mpc8xx - - adder AdderII Adder:MPC852T Yuli Barcohen +Orphan powerpc ppc4xx - amcc - bluestone - Tirumala Marri +Orphan powerpc ppc4xx - cray L1 CRAYL1 - David Updegraff +Orphan powerpc ppc4xx - sandburst karef KAREF - Travis Sawyer +Orphan powerpc ppc4xx - sandburst metrobox METROBOX - Travis Sawyer # The following were move to "Orphan" in September, 2013 -Orphan arm arm1136 mx31 - imx31_phycore imx31_phycore_eet imx31_phycore:IMX31_PHYCORE_EET (resigned) Guennadi Liakhovetski -Orphan arm arm1136 mx31 freescale - mx31ads - (resigned) Guennadi Liakhovetski +Orphan arm arm1136 mx31 - imx31_phycore imx31_phycore_eet imx31_phycore:IMX31_PHYCORE_EET (resigned) Guennadi Liakhovetski +Orphan arm arm1136 mx31 freescale - mx31ads - (resigned) Guennadi Liakhovetski From 15e82e5309ed706fa2878aed3b225aa48ae960c7 Mon Sep 17 00:00:00 2001 From: Ian Campbell Date: Mon, 28 Apr 2014 20:14:05 +0100 Subject: [PATCH 050/105] net/designware: call phy_connect_dev() to properly setup phylib device This sets up the linkage from the phydev back to the ethernet device. This symptom of not doing this which I noticed was: Waiting for PHY auto negotiation to complete.... rather than: dwmac.1c50000 Waiting for PHY auto negotiation to complete.... Signed-off-by: Ian Campbell Cc: Alexey Brodkin --- drivers/net/designware.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index c45593bcc09..78751b2600c 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -390,6 +390,8 @@ static int dw_phy_init(struct eth_device *dev) if (!phydev) return -1; + phy_connect_dev(phydev, dev); + phydev->supported &= PHY_GBIT_FEATURES; phydev->advertising = phydev->supported; From 69c0d323e325f48f3124fb0696de3d68fcbcae8e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 24 Apr 2014 15:24:28 +0200 Subject: [PATCH 051/105] kbuild: Fix trailing whitespaces Trivial fix. Signed-off-by: Michal Simek --- Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index 125baa33641..e82f616a861 100644 --- a/Makefile +++ b/Makefile @@ -285,7 +285,7 @@ export KBUILD_CHECKSRC KBUILD_SRC KBUILD_EXTMOD # cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $< # # If $(quiet) is empty, the whole command will be printed. -# If it is set to "quiet_", only the short version will be printed. +# If it is set to "quiet_", only the short version will be printed. # If it is set to "silent_", nothing will be printed at all, since # the variable $(silent_cmd_cc_o_c) doesn't exist. # @@ -998,7 +998,7 @@ ifeq ($(CONFIG_KALLSYMS),y) $(call cmd,u-boot__) common/system_map.o endif -# The actual objects are generated when descending, +# The actual objects are generated when descending, # make sure no implicit rule kicks in $(sort $(u-boot-init) $(u-boot-main)): $(u-boot-dirs) ; @@ -1437,7 +1437,7 @@ endif $(build)=$(build-dir) $(@:.ko=.o) $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost -# FIXME Should go into a make.lib or something +# FIXME Should go into a make.lib or something # =========================================================================== quiet_cmd_rmdirs = $(if $(wildcard $(rm-dirs)),CLEAN $(wildcard $(rm-dirs))) From b625b9aef383be4366670e8d22b13d48ef8aa870 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 13 Mar 2014 11:23:43 +0100 Subject: [PATCH 052/105] fpga: spartan2: Avoid CamelCase No functional changes. Signed-off-by: Michal Simek --- board/esd/pmc440/fpga.c | 2 +- board/matrix_vision/mvsmr/fpga.c | 2 +- drivers/fpga/spartan2.c | 40 ++++++++++++++++---------------- drivers/fpga/xilinx.c | 14 +++++------ include/spartan2.h | 32 ++++++++++++------------- include/xilinx.h | 2 +- 6 files changed, 46 insertions(+), 46 deletions(-) diff --git a/board/esd/pmc440/fpga.c b/board/esd/pmc440/fpga.c index b7b62dd94db..cef20508827 100644 --- a/board/esd/pmc440/fpga.c +++ b/board/esd/pmc440/fpga.c @@ -47,7 +47,7 @@ Xilinx_Spartan3_Slave_Serial_fns pmc440_fpga_fns = { }; #endif -Xilinx_Spartan2_Slave_Serial_fns ngcc_fpga_fns = { +xilinx_spartan2_slave_serial_fns ngcc_fpga_fns = { ngcc_fpga_pre_config_fn, ngcc_fpga_pgm_fn, ngcc_fpga_clk_fn, diff --git a/board/matrix_vision/mvsmr/fpga.c b/board/matrix_vision/mvsmr/fpga.c index 88035a9e9e3..639bc7c75b9 100644 --- a/board/matrix_vision/mvsmr/fpga.c +++ b/board/matrix_vision/mvsmr/fpga.c @@ -27,7 +27,7 @@ Xilinx_Spartan3_Slave_Serial_fns fpga_fns = { }; Xilinx_desc spartan3 = { - Xilinx_Spartan2, + xilinx_spartan2, slave_serial, XILINX_XC3S200_SIZE, (void *) &fpga_fns, diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c index 6eab1b51e55..bd317095c65 100644 --- a/drivers/fpga/spartan2.c +++ b/drivers/fpga/spartan2.c @@ -31,29 +31,29 @@ #define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */ #endif -static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int Spartan2_sp_info(Xilinx_desc *desc ); */ +static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan2_sp_info(Xilinx_desc *desc ); */ -static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int Spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int Spartan2_ss_info(Xilinx_desc *desc ); */ +static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan2_ss_info(Xilinx_desc *desc ); */ /* ------------------------------------------------------------------------- */ /* Spartan-II Generic Implementation */ -int Spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; switch (desc->iface) { case slave_serial: PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__); - ret_val = Spartan2_ss_load (desc, buf, bsize); + ret_val = spartan2_ss_load(desc, buf, bsize); break; case slave_parallel: PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__); - ret_val = Spartan2_sp_load (desc, buf, bsize); + ret_val = spartan2_sp_load(desc, buf, bsize); break; default: @@ -64,19 +64,19 @@ int Spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int Spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; switch (desc->iface) { case slave_serial: PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__); - ret_val = Spartan2_ss_dump (desc, buf, bsize); + ret_val = spartan2_ss_dump(desc, buf, bsize); break; case slave_parallel: PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__); - ret_val = Spartan2_sp_dump (desc, buf, bsize); + ret_val = spartan2_sp_dump(desc, buf, bsize); break; default: @@ -87,7 +87,7 @@ int Spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int Spartan2_info( Xilinx_desc *desc ) +int spartan2_info(Xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -96,10 +96,10 @@ int Spartan2_info( Xilinx_desc *desc ) /* ------------------------------------------------------------------------- */ /* Spartan-II Slave Parallel Generic Implementation */ -static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ - Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns; + xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns; PRINTF ("%s: start with interface functions @ 0x%p\n", __FUNCTION__, fn); @@ -248,10 +248,10 @@ static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ - Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns; + xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns; if (fn) { unsigned char *data = (unsigned char *) buf; @@ -296,10 +296,10 @@ static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) /* ------------------------------------------------------------------------- */ -static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ - Xilinx_Spartan2_Slave_Serial_fns *fn = desc->iface_fns; + xilinx_spartan2_slave_serial_fns *fn = desc->iface_fns; int i; unsigned char val; @@ -439,7 +439,7 @@ static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int Spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) { /* Readback is only available through the Slave Parallel and */ /* boundary-scan interfaces. */ diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index 2e0db535d47..47bbf395140 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -149,11 +149,11 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize) printf ("%s: Invalid device descriptor\n", __FUNCTION__); } else switch (desc->family) { - case Xilinx_Spartan2: + case xilinx_spartan2: #if defined(CONFIG_FPGA_SPARTAN2) PRINTF ("%s: Launching the Spartan-II Loader...\n", __FUNCTION__); - ret_val = Spartan2_load (desc, buf, bsize); + ret_val = spartan2_load(desc, buf, bsize); #else printf ("%s: No support for Spartan-II devices.\n", __FUNCTION__); @@ -206,11 +206,11 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize) printf ("%s: Invalid device descriptor\n", __FUNCTION__); } else switch (desc->family) { - case Xilinx_Spartan2: + case xilinx_spartan2: #if defined(CONFIG_FPGA_SPARTAN2) PRINTF ("%s: Launching the Spartan-II Reader...\n", __FUNCTION__); - ret_val = Spartan2_dump (desc, buf, bsize); + ret_val = spartan2_dump(desc, buf, bsize); #else printf ("%s: No support for Spartan-II devices.\n", __FUNCTION__); @@ -262,7 +262,7 @@ int xilinx_info (Xilinx_desc * desc) if (xilinx_validate (desc, (char *)__FUNCTION__)) { printf ("Family: \t"); switch (desc->family) { - case Xilinx_Spartan2: + case xilinx_spartan2: printf ("Spartan-II\n"); break; case Xilinx_Spartan3: @@ -316,9 +316,9 @@ int xilinx_info (Xilinx_desc * desc) if (desc->iface_fns) { printf ("Device Function Table @ 0x%p\n", desc->iface_fns); switch (desc->family) { - case Xilinx_Spartan2: + case xilinx_spartan2: #if defined(CONFIG_FPGA_SPARTAN2) - Spartan2_info (desc); + spartan2_info(desc); #else /* just in case */ printf ("%s: No support for Spartan-II devices.\n", diff --git a/include/spartan2.h b/include/spartan2.h index 087a27d3cc0..a9fc68acc89 100644 --- a/include/spartan2.h +++ b/include/spartan2.h @@ -10,9 +10,9 @@ #include -extern int Spartan2_load(Xilinx_desc *desc, const void *image, size_t size); -extern int Spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -extern int Spartan2_info(Xilinx_desc *desc); +int spartan2_load(Xilinx_desc *desc, const void *image, size_t size); +int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +int spartan2_info(Xilinx_desc *desc); /* Slave Parallel Implementation function table */ typedef struct { @@ -29,7 +29,7 @@ typedef struct { Xilinx_busy_fn busy; Xilinx_abort_fn abort; Xilinx_post_fn post; -} Xilinx_Spartan2_Slave_Parallel_fns; +} xilinx_spartan2_slave_parallel_fns; /* Slave Serial Implementation function table */ typedef struct { @@ -40,7 +40,7 @@ typedef struct { Xilinx_done_fn done; Xilinx_wr_fn wr; Xilinx_post_fn post; -} Xilinx_Spartan2_Slave_Serial_fns; +} xilinx_spartan2_slave_serial_fns; /* Device Image Sizes *********************************************************************/ @@ -63,36 +63,36 @@ typedef struct { *********************************************************************/ /* Spartan-II devices */ #define XILINX_XC2S15_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie } #define XILINX_XC2S30_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie } #define XILINX_XC2S50_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie } #define XILINX_XC2S100_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie } #define XILINX_XC2S150_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie } #define XILINX_XC2S200_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie } #define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie } #define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie } #define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie } #define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie } #define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie } #endif /* _SPARTAN2_H_ */ diff --git a/include/xilinx.h b/include/xilinx.h index 00a585e5fc3..9d870b2d848 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -26,7 +26,7 @@ typedef enum { /* typedef Xilinx_iface */ typedef enum { /* typedef Xilinx_Family */ min_xilinx_type, /* low range check value */ - Xilinx_Spartan2, /* Spartan-II Family */ + xilinx_spartan2, /* Spartan-II Family */ Xilinx_VirtexE, /* Virtex-E Family */ Xilinx_Virtex2, /* Virtex2 Family */ Xilinx_Spartan3, /* Spartan-III Family */ From 2a6e3869f25093cd4032a3cd64ee455afbd668bf Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 13 Mar 2014 11:28:42 +0100 Subject: [PATCH 053/105] fpga: spartan3: Avoid CamelCase No functional changes. Signed-off-by: Michal Simek --- board/armadeus/apf27/fpga.c | 4 +-- board/astro/mcf5373l/fpga.c | 4 +-- board/balloon3/balloon3.c | 2 +- board/esd/pmc440/fpga.c | 4 +-- board/matrix_vision/mvsmr/fpga.c | 2 +- board/spear/x600/fpga.c | 2 +- board/teejet/mt_ventoux/mt_ventoux.c | 2 +- drivers/fpga/spartan3.c | 40 ++++++++++++++-------------- drivers/fpga/xilinx.c | 14 +++++----- include/spartan3.h | 38 +++++++++++++------------- include/xilinx.h | 2 +- 11 files changed, 57 insertions(+), 57 deletions(-) diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c index 0c08c0640ef..56fde200e79 100644 --- a/board/armadeus/apf27/fpga.c +++ b/board/armadeus/apf27/fpga.c @@ -26,7 +26,7 @@ * Spartan2 code is used to download our Spartan 3 :) code is compatible. * Just take care about the file size */ -Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = { +xilinx_spartan3_slave_parallel_fns fpga_fns = { fpga_pre_fn, fpga_pgm_fn, fpga_init_fn, @@ -43,7 +43,7 @@ Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = { }; Xilinx_desc fpga[CONFIG_FPGA_COUNT] = { - {Xilinx_Spartan3, + {xilinx_spartan3, slave_parallel, 1196128l/8, (void *)&fpga_fns, diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c index c679ad7f65c..152ff1f58c9 100644 --- a/board/astro/mcf5373l/fpga.c +++ b/board/astro/mcf5373l/fpga.c @@ -363,7 +363,7 @@ int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie) * relocated at runtime. * FIXME: relocation not yet working for coldfire, see below! */ -Xilinx_Spartan3_Slave_Serial_fns xilinx_fns = { +xilinx_spartan3_slave_serial_fns xilinx_fns = { xilinx_pre_config_fn, xilinx_pgm_fn, xilinx_clk_fn, @@ -375,7 +375,7 @@ Xilinx_Spartan3_Slave_Serial_fns xilinx_fns = { }; Xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = { - {Xilinx_Spartan3, + {xilinx_spartan3, slave_serial, XILINX_XC3S4000_SIZE, (void *)&xilinx_fns, diff --git a/board/balloon3/balloon3.c b/board/balloon3/balloon3.c index 04e0574658a..4aa66052da9 100644 --- a/board/balloon3/balloon3.c +++ b/board/balloon3/balloon3.c @@ -191,7 +191,7 @@ int fpga_cs_fn(int assert_clk, int flush, int cookie) return assert_clk; } -Xilinx_Spartan3_Slave_Parallel_fns balloon3_fpga_fns = { +xilinx_spartan3_slave_parallel_fns balloon3_fpga_fns = { fpga_pre_config_fn, fpga_pgm_fn, fpga_init_fn, diff --git a/board/esd/pmc440/fpga.c b/board/esd/pmc440/fpga.c index cef20508827..18a1b63088d 100644 --- a/board/esd/pmc440/fpga.c +++ b/board/esd/pmc440/fpga.c @@ -20,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR; #define USE_SP_CODE #ifdef USE_SP_CODE -Xilinx_Spartan3_Slave_Parallel_fns pmc440_fpga_fns = { +xilinx_spartan3_slave_parallel_fns pmc440_fpga_fns = { fpga_pre_config_fn, fpga_pgm_fn, fpga_init_fn, @@ -36,7 +36,7 @@ Xilinx_Spartan3_Slave_Parallel_fns pmc440_fpga_fns = { fpga_post_config_fn, }; #else -Xilinx_Spartan3_Slave_Serial_fns pmc440_fpga_fns = { +xilinx_spartan3_slave_serial_fns pmc440_fpga_fns = { fpga_pre_config_fn, fpga_pgm_fn, fpga_clk_fn, diff --git a/board/matrix_vision/mvsmr/fpga.c b/board/matrix_vision/mvsmr/fpga.c index 639bc7c75b9..b2074552439 100644 --- a/board/matrix_vision/mvsmr/fpga.c +++ b/board/matrix_vision/mvsmr/fpga.c @@ -16,7 +16,7 @@ #include "fpga.h" #include "mvsmr.h" -Xilinx_Spartan3_Slave_Serial_fns fpga_fns = { +xilinx_spartan3_slave_serial_fns fpga_fns = { fpga_pre_config_fn, fpga_pgm_fn, fpga_clk_fn, diff --git a/board/spear/x600/fpga.c b/board/spear/x600/fpga.c index c06c9947777..c26eba42845 100644 --- a/board/spear/x600/fpga.c +++ b/board/spear/x600/fpga.c @@ -163,7 +163,7 @@ static int fpga_wr_fn(int assert_write, int flush, int cookie) return assert_write; } -static Xilinx_Spartan3_Slave_Serial_fns x600_fpga_fns = { +static xilinx_spartan3_slave_serial_fns x600_fpga_fns = { fpga_pre_config_fn, fpga_pgm_fn, fpga_clk_fn, diff --git a/board/teejet/mt_ventoux/mt_ventoux.c b/board/teejet/mt_ventoux/mt_ventoux.c index c32d554ea42..a36176494e4 100644 --- a/board/teejet/mt_ventoux/mt_ventoux.c +++ b/board/teejet/mt_ventoux/mt_ventoux.c @@ -190,7 +190,7 @@ int fpga_clk_fn(int assert_clk, int flush, int cookie) return assert_clk; } -Xilinx_Spartan3_Slave_Serial_fns mt_ventoux_fpga_fns = { +xilinx_spartan3_slave_serial_fns mt_ventoux_fpga_fns = { fpga_pre_config_fn, fpga_pgm_fn, fpga_clk_fn, diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c index 3edc5c2c66a..e40abbfb946 100644 --- a/drivers/fpga/spartan3.c +++ b/drivers/fpga/spartan3.c @@ -35,29 +35,29 @@ #define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */ #endif -static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int Spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int Spartan3_sp_info(Xilinx_desc *desc ); */ +static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan3_sp_info(Xilinx_desc *desc ); */ -static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int Spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int Spartan3_ss_info(Xilinx_desc *desc); */ +static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan3_ss_info(Xilinx_desc *desc); */ /* ------------------------------------------------------------------------- */ /* Spartan-II Generic Implementation */ -int Spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; switch (desc->iface) { case slave_serial: PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__); - ret_val = Spartan3_ss_load (desc, buf, bsize); + ret_val = spartan3_ss_load(desc, buf, bsize); break; case slave_parallel: PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__); - ret_val = Spartan3_sp_load (desc, buf, bsize); + ret_val = spartan3_sp_load(desc, buf, bsize); break; default: @@ -68,19 +68,19 @@ int Spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int Spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; switch (desc->iface) { case slave_serial: PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__); - ret_val = Spartan3_ss_dump (desc, buf, bsize); + ret_val = spartan3_ss_dump(desc, buf, bsize); break; case slave_parallel: PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__); - ret_val = Spartan3_sp_dump (desc, buf, bsize); + ret_val = spartan3_sp_dump(desc, buf, bsize); break; default: @@ -91,7 +91,7 @@ int Spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int Spartan3_info( Xilinx_desc *desc ) +int spartan3_info(Xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -100,10 +100,10 @@ int Spartan3_info( Xilinx_desc *desc ) /* ------------------------------------------------------------------------- */ /* Spartan-II Slave Parallel Generic Implementation */ -static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ - Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns; + xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns; PRINTF ("%s: start with interface functions @ 0x%p\n", __FUNCTION__, fn); @@ -254,10 +254,10 @@ static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int Spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ - Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns; + xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns; if (fn) { unsigned char *data = (unsigned char *) buf; @@ -302,10 +302,10 @@ static int Spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) /* ------------------------------------------------------------------------- */ -static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ - Xilinx_Spartan3_Slave_Serial_fns *fn = desc->iface_fns; + xilinx_spartan3_slave_serial_fns *fn = desc->iface_fns; int i; unsigned char val; @@ -457,7 +457,7 @@ static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int Spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) { /* Readback is only available through the Slave Parallel and */ /* boundary-scan interfaces. */ diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index 47bbf395140..7d93d641f6a 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -159,11 +159,11 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize) __FUNCTION__); #endif break; - case Xilinx_Spartan3: + case xilinx_spartan3: #if defined(CONFIG_FPGA_SPARTAN3) PRINTF ("%s: Launching the Spartan-III Loader...\n", __FUNCTION__); - ret_val = Spartan3_load (desc, buf, bsize); + ret_val = spartan3_load(desc, buf, bsize); #else printf ("%s: No support for Spartan-III devices.\n", __FUNCTION__); @@ -216,11 +216,11 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize) __FUNCTION__); #endif break; - case Xilinx_Spartan3: + case xilinx_spartan3: #if defined(CONFIG_FPGA_SPARTAN3) PRINTF ("%s: Launching the Spartan-III Reader...\n", __FUNCTION__); - ret_val = Spartan3_dump (desc, buf, bsize); + ret_val = spartan3_dump(desc, buf, bsize); #else printf ("%s: No support for Spartan-III devices.\n", __FUNCTION__); @@ -265,7 +265,7 @@ int xilinx_info (Xilinx_desc * desc) case xilinx_spartan2: printf ("Spartan-II\n"); break; - case Xilinx_Spartan3: + case xilinx_spartan3: printf ("Spartan-III\n"); break; case Xilinx_Virtex2: @@ -325,9 +325,9 @@ int xilinx_info (Xilinx_desc * desc) __FUNCTION__); #endif break; - case Xilinx_Spartan3: + case xilinx_spartan3: #if defined(CONFIG_FPGA_SPARTAN3) - Spartan3_info (desc); + spartan3_info(desc); #else /* just in case */ printf ("%s: No support for Spartan-III devices.\n", diff --git a/include/spartan3.h b/include/spartan3.h index 72e7c0ddd00..93ca8a40bc3 100644 --- a/include/spartan3.h +++ b/include/spartan3.h @@ -10,9 +10,9 @@ #include -extern int Spartan3_load(Xilinx_desc *desc, const void *image, size_t size); -extern int Spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -extern int Spartan3_info(Xilinx_desc *desc); +int spartan3_load(Xilinx_desc *desc, const void *image, size_t size); +int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +int spartan3_info(Xilinx_desc *desc); /* Slave Parallel Implementation function table */ typedef struct { @@ -29,7 +29,7 @@ typedef struct { Xilinx_busy_fn busy; Xilinx_abort_fn abort; Xilinx_post_fn post; -} Xilinx_Spartan3_Slave_Parallel_fns; +} xilinx_spartan3_slave_parallel_fns; /* Slave Serial Implementation function table */ typedef struct { @@ -42,7 +42,7 @@ typedef struct { Xilinx_post_fn post; Xilinx_bwr_fn bwr; /* block write function */ Xilinx_abort_fn abort; -} Xilinx_Spartan3_Slave_Serial_fns; +} xilinx_spartan3_slave_serial_fns; /* Device Image Sizes *********************************************************************/ @@ -73,46 +73,46 @@ typedef struct { *********************************************************************/ /* Spartan-III devices */ #define XILINX_XC3S50_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie } #define XILINX_XC3S200_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie } #define XILINX_XC3S400_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie } #define XILINX_XC3S1000_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie } #define XILINX_XC3S1500_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie } #define XILINX_XC3S2000_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie } #define XILINX_XC3S4000_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie } #define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie } /* Spartan-3E devices */ #define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie } #define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie } #define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie } #define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie } #define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie } #define XILINX_XC6SLX4_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie } #endif /* _SPARTAN3_H_ */ diff --git a/include/xilinx.h b/include/xilinx.h index 9d870b2d848..365c0c358eb 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -29,7 +29,7 @@ typedef enum { /* typedef Xilinx_Family */ xilinx_spartan2, /* Spartan-II Family */ Xilinx_VirtexE, /* Virtex-E Family */ Xilinx_Virtex2, /* Virtex2 Family */ - Xilinx_Spartan3, /* Spartan-III Family */ + xilinx_spartan3, /* Spartan-III Family */ xilinx_zynq, /* Zynq Family */ max_xilinx_type /* insert all new types before this */ } Xilinx_Family; /* end, typedef Xilinx_Family */ From d9071ce0a8cd684589c9c35e4d7c604a9cbd7d62 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 13 Mar 2014 11:33:36 +0100 Subject: [PATCH 054/105] fpga: virtex2: Avoid CamelCase No functional changes. Signed-off-by: Michal Simek --- board/gen860t/fpga.c | 4 ++-- drivers/fpga/virtex2.c | 34 +++++++++++++++++----------------- drivers/fpga/xilinx.c | 14 +++++++------- include/virtex2.h | 34 +++++++++++++++++----------------- include/xilinx.h | 2 +- 5 files changed, 44 insertions(+), 44 deletions(-) diff --git a/board/gen860t/fpga.c b/board/gen860t/fpga.c index b7984dd0fec..48a4222ac41 100644 --- a/board/gen860t/fpga.c +++ b/board/gen860t/fpga.c @@ -40,7 +40,7 @@ DECLARE_GLOBAL_DATA_PTR; /* Note that these are pointers to code that is in Flash. They will be * relocated at runtime. */ -Xilinx_Virtex2_Slave_SelectMap_fns fpga_fns = { +xilinx_virtex2_slave_selectmap_fns fpga_fns = { fpga_pre_config_fn, fpga_pgm_fn, fpga_init_fn, @@ -57,7 +57,7 @@ Xilinx_Virtex2_Slave_SelectMap_fns fpga_fns = { }; Xilinx_desc fpga[CONFIG_FPGA_COUNT] = { - {Xilinx_Virtex2, + {xilinx_virtex2, slave_selectmap, XILINX_XC2V3000_SIZE, (void *) &fpga_fns, diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c index b5a895d41a7..1cd9046a248 100644 --- a/drivers/fpga/virtex2.c +++ b/drivers/fpga/virtex2.c @@ -84,25 +84,25 @@ #define CONFIG_SYS_FPGA_WAIT_CONFIG CONFIG_SYS_HZ/5 /* 200 ms */ #endif -static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize); +static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -static int Virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int Virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); +static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -int Virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; switch (desc->iface) { case slave_serial: PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__); - ret_val = Virtex2_ss_load (desc, buf, bsize); + ret_val = virtex2_ss_load(desc, buf, bsize); break; case slave_selectmap: PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__); - ret_val = Virtex2_ssm_load (desc, buf, bsize); + ret_val = virtex2_ssm_load(desc, buf, bsize); break; default: @@ -112,19 +112,19 @@ int Virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int Virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; switch (desc->iface) { case slave_serial: PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__); - ret_val = Virtex2_ss_dump (desc, buf, bsize); + ret_val = virtex2_ss_dump(desc, buf, bsize); break; case slave_parallel: PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__); - ret_val = Virtex2_ssm_dump (desc, buf, bsize); + ret_val = virtex2_ssm_dump(desc, buf, bsize); break; default: @@ -134,7 +134,7 @@ int Virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int Virtex2_info (Xilinx_desc * desc) +int virtex2_info(Xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -153,10 +153,10 @@ int Virtex2_info (Xilinx_desc * desc) * INIT_B and DONE lines. If both are high, configuration has * succeeded. Congratulations! */ -static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; - Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns; + xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns; PRINTF ("%s:%d: Start with interface functions @ 0x%p\n", __FUNCTION__, __LINE__, fn); @@ -352,10 +352,10 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize) /* * Read the FPGA configuration data */ -static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; - Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns; + xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns; if (fn) { unsigned char *data = (unsigned char *) buf; @@ -404,13 +404,13 @@ static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int Virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) { printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__); return FPGA_FAIL; } -static int Virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) { printf ("%s: Slave Serial Dumping is unsupported\n", __FUNCTION__); return FPGA_FAIL; diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index 7d93d641f6a..6953535f082 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -169,11 +169,11 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize) __FUNCTION__); #endif break; - case Xilinx_Virtex2: + case xilinx_virtex2: #if defined(CONFIG_FPGA_VIRTEX2) PRINTF ("%s: Launching the Virtex-II Loader...\n", __FUNCTION__); - ret_val = Virtex2_load (desc, buf, bsize); + ret_val = virtex2_load(desc, buf, bsize); #else printf ("%s: No support for Virtex-II devices.\n", __FUNCTION__); @@ -226,11 +226,11 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize) __FUNCTION__); #endif break; - case Xilinx_Virtex2: + case xilinx_virtex2: #if defined( CONFIG_FPGA_VIRTEX2) PRINTF ("%s: Launching the Virtex-II Reader...\n", __FUNCTION__); - ret_val = Virtex2_dump (desc, buf, bsize); + ret_val = virtex2_dump(desc, buf, bsize); #else printf ("%s: No support for Virtex-II devices.\n", __FUNCTION__); @@ -268,7 +268,7 @@ int xilinx_info (Xilinx_desc * desc) case xilinx_spartan3: printf ("Spartan-III\n"); break; - case Xilinx_Virtex2: + case xilinx_virtex2: printf ("Virtex-II\n"); break; case xilinx_zynq: @@ -334,9 +334,9 @@ int xilinx_info (Xilinx_desc * desc) __FUNCTION__); #endif break; - case Xilinx_Virtex2: + case xilinx_virtex2: #if defined(CONFIG_FPGA_VIRTEX2) - Virtex2_info (desc); + virtex2_info(desc); #else /* just in case */ printf ("%s: No support for Virtex-II devices.\n", diff --git a/include/virtex2.h b/include/virtex2.h index 2e9a4f52da3..1e6624ca962 100644 --- a/include/virtex2.h +++ b/include/virtex2.h @@ -11,9 +11,9 @@ #include -extern int Virtex2_load(Xilinx_desc *desc, const void *image, size_t size); -extern int Virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -extern int Virtex2_info(Xilinx_desc *desc); +int virtex2_load(Xilinx_desc *desc, const void *image, size_t size); +int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +int virtex2_info(Xilinx_desc *desc); /* * Slave SelectMap Implementation function table. @@ -32,7 +32,7 @@ typedef struct { Xilinx_busy_fn busy; Xilinx_abort_fn abort; Xilinx_post_fn post; -} Xilinx_Virtex2_Slave_SelectMap_fns; +} xilinx_virtex2_slave_selectmap_fns; /* Slave Serial Implementation function table */ typedef struct { @@ -40,7 +40,7 @@ typedef struct { Xilinx_clk_fn clk; Xilinx_rdata_fn rdata; Xilinx_wdata_fn wdata; -} Xilinx_Virtex2_Slave_Serial_fns; +} xilinx_virtex2_slave_serial_fns; /* Device Image Sizes (in bytes) *********************************************************************/ @@ -60,39 +60,39 @@ typedef struct { /* Descriptor Macros *********************************************************************/ #define XILINX_XC2V40_DESC(iface, fn_table, cookie) \ -{ Xilinx_Virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie } #define XILINX_XC2V80_DESC(iface, fn_table, cookie) \ -{ Xilinx_Virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie } #define XILINX_XC2V250_DESC(iface, fn_table, cookie) \ -{ Xilinx_Virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie } #define XILINX_XC2V500_DESC(iface, fn_table, cookie) \ -{ Xilinx_Virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie } #define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \ -{ Xilinx_Virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie } #define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \ -{ Xilinx_Virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie } #define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \ -{ Xilinx_Virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie } #define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \ -{ Xilinx_Virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie } #define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \ -{ Xilinx_Virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie } #define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \ -{ Xilinx_Virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie } #define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \ -{ Xilinx_Virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie } #define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \ -{ Xilinx_Virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie } #endif /* _VIRTEX2_H_ */ diff --git a/include/xilinx.h b/include/xilinx.h index 365c0c358eb..fa89fb68351 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -28,7 +28,7 @@ typedef enum { /* typedef Xilinx_Family */ min_xilinx_type, /* low range check value */ xilinx_spartan2, /* Spartan-II Family */ Xilinx_VirtexE, /* Virtex-E Family */ - Xilinx_Virtex2, /* Virtex2 Family */ + xilinx_virtex2, /* Virtex2 Family */ xilinx_spartan3, /* Spartan-III Family */ xilinx_zynq, /* Zynq Family */ max_xilinx_type /* insert all new types before this */ From f8c1be9816a60d1f627954fe202b502917c69863 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 13 Mar 2014 12:49:21 +0100 Subject: [PATCH 055/105] fpga: xilinx: Avoid CamelCase for in Xilinx_desc No functional changes. Signed-off-by: Michal Simek --- board/armadeus/apf27/fpga.c | 2 +- board/astro/mcf5373l/fpga.c | 2 +- board/balloon3/balloon3.c | 2 +- board/esd/pmc440/fpga.c | 2 +- board/gen860t/fpga.c | 2 +- board/matrix_vision/mvsmr/fpga.c | 2 +- board/spear/x600/fpga.c | 2 +- board/teejet/mt_ventoux/mt_ventoux.c | 2 +- board/xilinx/zynq/board.c | 14 +++++++------- drivers/fpga/spartan2.c | 26 +++++++++++++------------- drivers/fpga/spartan3.c | 26 +++++++++++++------------- drivers/fpga/virtex2.c | 22 +++++++++++----------- drivers/fpga/xilinx.c | 14 +++++++------- drivers/fpga/zynqpl.c | 6 +++--- include/spartan2.h | 6 +++--- include/spartan3.h | 6 +++--- include/virtex2.h | 6 +++--- include/xilinx.h | 10 +++++----- include/zynqpl.h | 6 +++--- 19 files changed, 79 insertions(+), 79 deletions(-) diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c index 56fde200e79..7d6e1e462c9 100644 --- a/board/armadeus/apf27/fpga.c +++ b/board/armadeus/apf27/fpga.c @@ -42,7 +42,7 @@ xilinx_spartan3_slave_parallel_fns fpga_fns = { fpga_post_fn, }; -Xilinx_desc fpga[CONFIG_FPGA_COUNT] = { +xilinx_desc fpga[CONFIG_FPGA_COUNT] = { {xilinx_spartan3, slave_parallel, 1196128l/8, diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c index 152ff1f58c9..9dc82c5737c 100644 --- a/board/astro/mcf5373l/fpga.c +++ b/board/astro/mcf5373l/fpga.c @@ -374,7 +374,7 @@ xilinx_spartan3_slave_serial_fns xilinx_fns = { xilinx_fastwr_fn }; -Xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = { +xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = { {xilinx_spartan3, slave_serial, XILINX_XC3S4000_SIZE, diff --git a/board/balloon3/balloon3.c b/board/balloon3/balloon3.c index 4aa66052da9..aa108ca1539 100644 --- a/board/balloon3/balloon3.c +++ b/board/balloon3/balloon3.c @@ -207,7 +207,7 @@ xilinx_spartan3_slave_parallel_fns balloon3_fpga_fns = { fpga_post_config_fn, }; -Xilinx_desc fpga = XILINX_XC3S1000_DESC(slave_parallel, +xilinx_desc fpga = XILINX_XC3S1000_DESC(slave_parallel, (void *)&balloon3_fpga_fns, 0); /* Initialize the FPGA */ diff --git a/board/esd/pmc440/fpga.c b/board/esd/pmc440/fpga.c index 18a1b63088d..f876da855b1 100644 --- a/board/esd/pmc440/fpga.c +++ b/board/esd/pmc440/fpga.c @@ -57,7 +57,7 @@ xilinx_spartan2_slave_serial_fns ngcc_fpga_fns = { ngcc_fpga_post_config_fn }; -Xilinx_desc fpga[CONFIG_FPGA_COUNT] = { +xilinx_desc fpga[CONFIG_FPGA_COUNT] = { XILINX_XC3S1200E_DESC( #ifdef USE_SP_CODE slave_parallel, diff --git a/board/gen860t/fpga.c b/board/gen860t/fpga.c index 48a4222ac41..dd0ef707d6d 100644 --- a/board/gen860t/fpga.c +++ b/board/gen860t/fpga.c @@ -56,7 +56,7 @@ xilinx_virtex2_slave_selectmap_fns fpga_fns = { fpga_post_config_fn }; -Xilinx_desc fpga[CONFIG_FPGA_COUNT] = { +xilinx_desc fpga[CONFIG_FPGA_COUNT] = { {xilinx_virtex2, slave_selectmap, XILINX_XC2V3000_SIZE, diff --git a/board/matrix_vision/mvsmr/fpga.c b/board/matrix_vision/mvsmr/fpga.c index b2074552439..518992578c1 100644 --- a/board/matrix_vision/mvsmr/fpga.c +++ b/board/matrix_vision/mvsmr/fpga.c @@ -26,7 +26,7 @@ xilinx_spartan3_slave_serial_fns fpga_fns = { 0 }; -Xilinx_desc spartan3 = { +xilinx_desc spartan3 = { xilinx_spartan2, slave_serial, XILINX_XC3S200_SIZE, diff --git a/board/spear/x600/fpga.c b/board/spear/x600/fpga.c index c26eba42845..b256222e186 100644 --- a/board/spear/x600/fpga.c +++ b/board/spear/x600/fpga.c @@ -173,7 +173,7 @@ static xilinx_spartan3_slave_serial_fns x600_fpga_fns = { fpga_post_config_fn, }; -static Xilinx_desc fpga[CONFIG_FPGA_COUNT] = { +static xilinx_desc fpga[CONFIG_FPGA_COUNT] = { XILINX_XC3S1200E_DESC(slave_serial, &x600_fpga_fns, 0) }; diff --git a/board/teejet/mt_ventoux/mt_ventoux.c b/board/teejet/mt_ventoux/mt_ventoux.c index a36176494e4..b4a0a72bd0f 100644 --- a/board/teejet/mt_ventoux/mt_ventoux.c +++ b/board/teejet/mt_ventoux/mt_ventoux.c @@ -200,7 +200,7 @@ xilinx_spartan3_slave_serial_fns mt_ventoux_fpga_fns = { fpga_post_config_fn, }; -Xilinx_desc fpga = XILINX_XC6SLX4_DESC(slave_serial, +xilinx_desc fpga = XILINX_XC6SLX4_DESC(slave_serial, (void *)&mt_ventoux_fpga_fns, 0); /* Initialize the FPGA */ diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 485a5e4a249..c8cc2bc9344 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -14,15 +14,15 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_FPGA -Xilinx_desc fpga; +xilinx_desc fpga; /* It can be done differently */ -Xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10); -Xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15); -Xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20); -Xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30); -Xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45); -Xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100); +xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10); +xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15); +xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20); +xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30); +xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45); +xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100); #endif int board_init(void) diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c index bd317095c65..0796729436c 100644 --- a/drivers/fpga/spartan2.c +++ b/drivers/fpga/spartan2.c @@ -31,17 +31,17 @@ #define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */ #endif -static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int spartan2_sp_info(Xilinx_desc *desc ); */ +static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan2_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan2_sp_info(xilinx_desc *desc ); */ -static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int spartan2_ss_info(Xilinx_desc *desc ); */ +static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan2_ss_info(xilinx_desc *desc ); */ /* ------------------------------------------------------------------------- */ /* Spartan-II Generic Implementation */ -int spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -64,7 +64,7 @@ int spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -87,7 +87,7 @@ int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int spartan2_info(Xilinx_desc *desc) +int spartan2_info(xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -96,7 +96,7 @@ int spartan2_info(Xilinx_desc *desc) /* ------------------------------------------------------------------------- */ /* Spartan-II Slave Parallel Generic Implementation */ -static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns; @@ -248,7 +248,7 @@ static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns; @@ -296,7 +296,7 @@ static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) /* ------------------------------------------------------------------------- */ -static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan2_slave_serial_fns *fn = desc->iface_fns; @@ -439,7 +439,7 @@ static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize) { /* Readback is only available through the Slave Parallel and */ /* boundary-scan interfaces. */ diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c index e40abbfb946..1304b4c646e 100644 --- a/drivers/fpga/spartan3.c +++ b/drivers/fpga/spartan3.c @@ -35,17 +35,17 @@ #define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */ #endif -static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int spartan3_sp_info(Xilinx_desc *desc ); */ +static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan3_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan3_sp_info(xilinx_desc *desc ); */ -static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int spartan3_ss_info(Xilinx_desc *desc); */ +static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan3_ss_info(xilinx_desc *desc); */ /* ------------------------------------------------------------------------- */ /* Spartan-II Generic Implementation */ -int spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -68,7 +68,7 @@ int spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -91,7 +91,7 @@ int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int spartan3_info(Xilinx_desc *desc) +int spartan3_info(xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -100,7 +100,7 @@ int spartan3_info(Xilinx_desc *desc) /* ------------------------------------------------------------------------- */ /* Spartan-II Slave Parallel Generic Implementation */ -static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns; @@ -254,7 +254,7 @@ static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns; @@ -302,7 +302,7 @@ static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) /* ------------------------------------------------------------------------- */ -static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ xilinx_spartan3_slave_serial_fns *fn = desc->iface_fns; @@ -457,7 +457,7 @@ static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize) { /* Readback is only available through the Slave Parallel and */ /* boundary-scan interfaces. */ diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c index 1cd9046a248..a582bf2d798 100644 --- a/drivers/fpga/virtex2.c +++ b/drivers/fpga/virtex2.c @@ -84,13 +84,13 @@ #define CONFIG_SYS_FPGA_WAIT_CONFIG CONFIG_SYS_HZ/5 /* 200 ms */ #endif -static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +static int virtex2_ssm_load(xilinx_desc *desc, const void *buf, size_t bsize); +static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize); -static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize); +static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize); -int virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -112,7 +112,7 @@ int virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -134,7 +134,7 @@ int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int virtex2_info(Xilinx_desc *desc) +int virtex2_info(xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -153,7 +153,7 @@ int virtex2_info(Xilinx_desc *desc) * INIT_B and DONE lines. If both are high, configuration has * succeeded. Congratulations! */ -static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_ssm_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns; @@ -352,7 +352,7 @@ static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize) /* * Read the FPGA configuration data */ -static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns; @@ -404,13 +404,13 @@ static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) { printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__); return FPGA_FAIL; } -static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize) { printf ("%s: Slave Serial Dumping is unsupported\n", __FUNCTION__); return FPGA_FAIL; diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index 6953535f082..b0e9cb35a31 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -31,7 +31,7 @@ #endif /* Local Static Functions */ -static int xilinx_validate (Xilinx_desc * desc, char *fn); +static int xilinx_validate(xilinx_desc *desc, char *fn); /* ------------------------------------------------------------------------- */ @@ -43,7 +43,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size) unsigned char *dataptr; unsigned int i; const fpga_desc *desc; - Xilinx_desc *xdesc; + xilinx_desc *xdesc; dataptr = (unsigned char *)fpgadata; /* Find out fpga_description */ @@ -94,7 +94,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size) return FPGA_FAIL; } } else { - printf("%s: Please fill correct device ID to Xilinx_desc\n", + printf("%s: Please fill correct device ID to xilinx_desc\n", __func__); } printf(" part number = \"%s\"\n", buffer); @@ -141,7 +141,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size) return fpga_load(devnum, dataptr, swapsize); } -int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume a failure */ @@ -198,7 +198,7 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume a failure */ @@ -255,7 +255,7 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int xilinx_info (Xilinx_desc * desc) +int xilinx_info(xilinx_desc *desc) { int ret_val = FPGA_FAIL; @@ -369,7 +369,7 @@ int xilinx_info (Xilinx_desc * desc) /* ------------------------------------------------------------------------- */ -static int xilinx_validate (Xilinx_desc * desc, char *fn) +static int xilinx_validate(xilinx_desc *desc, char *fn) { int ret_val = false; diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index 923a1586d8b..b4d0e2278c9 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -36,7 +36,7 @@ #define CONFIG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */ #endif -int zynq_info(Xilinx_desc *desc) +int zynq_info(xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -153,7 +153,7 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap) } -int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) { unsigned long ts; /* Timestamp */ u32 partialbit = 0; @@ -358,7 +358,7 @@ int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize) return FPGA_SUCCESS; } -int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize) { return FPGA_FAIL; } diff --git a/include/spartan2.h b/include/spartan2.h index a9fc68acc89..33b25e6b8b9 100644 --- a/include/spartan2.h +++ b/include/spartan2.h @@ -10,9 +10,9 @@ #include -int spartan2_load(Xilinx_desc *desc, const void *image, size_t size); -int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -int spartan2_info(Xilinx_desc *desc); +int spartan2_load(xilinx_desc *desc, const void *image, size_t size); +int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize); +int spartan2_info(xilinx_desc *desc); /* Slave Parallel Implementation function table */ typedef struct { diff --git a/include/spartan3.h b/include/spartan3.h index 93ca8a40bc3..e06b99bff55 100644 --- a/include/spartan3.h +++ b/include/spartan3.h @@ -10,9 +10,9 @@ #include -int spartan3_load(Xilinx_desc *desc, const void *image, size_t size); -int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -int spartan3_info(Xilinx_desc *desc); +int spartan3_load(xilinx_desc *desc, const void *image, size_t size); +int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize); +int spartan3_info(xilinx_desc *desc); /* Slave Parallel Implementation function table */ typedef struct { diff --git a/include/virtex2.h b/include/virtex2.h index 1e6624ca962..dd47965aad3 100644 --- a/include/virtex2.h +++ b/include/virtex2.h @@ -11,9 +11,9 @@ #include -int virtex2_load(Xilinx_desc *desc, const void *image, size_t size); -int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -int virtex2_info(Xilinx_desc *desc); +int virtex2_load(xilinx_desc *desc, const void *image, size_t size); +int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize); +int virtex2_info(xilinx_desc *desc); /* * Slave SelectMap Implementation function table. diff --git a/include/xilinx.h b/include/xilinx.h index fa89fb68351..5900c837440 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -34,20 +34,20 @@ typedef enum { /* typedef Xilinx_Family */ max_xilinx_type /* insert all new types before this */ } Xilinx_Family; /* end, typedef Xilinx_Family */ -typedef struct { /* typedef Xilinx_desc */ +typedef struct { /* typedef xilinx_desc */ Xilinx_Family family; /* part type */ Xilinx_iface iface; /* interface type */ size_t size; /* bytes of data part can accept */ void *iface_fns; /* interface function table */ int cookie; /* implementation specific cookie */ char *name; /* device name in bitstream */ -} Xilinx_desc; /* end, typedef Xilinx_desc */ +} xilinx_desc; /* end, typedef xilinx_desc */ /* Generic Xilinx Functions *********************************************************************/ -extern int xilinx_load(Xilinx_desc *desc, const void *image, size_t size); -extern int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -extern int xilinx_info(Xilinx_desc *desc); +int xilinx_load(xilinx_desc *desc, const void *image, size_t size); +int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize); +int xilinx_info(xilinx_desc *desc); /* Board specific implementation specific function types *********************************************************************/ diff --git a/include/zynqpl.h b/include/zynqpl.h index c81446e9860..fdee69110ce 100644 --- a/include/zynqpl.h +++ b/include/zynqpl.h @@ -12,9 +12,9 @@ #include -extern int zynq_load(Xilinx_desc *desc, const void *image, size_t size); -extern int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -extern int zynq_info(Xilinx_desc *desc); +int zynq_load(xilinx_desc *desc, const void *image, size_t size); +int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize); +int zynq_info(xilinx_desc *desc); #define XILINX_ZYNQ_7010 0x2 #define XILINX_ZYNQ_7015 0x1b From 2df9d5c431fca07c9868a36b48ee771bde6b19e8 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 13 Mar 2014 12:58:20 +0100 Subject: [PATCH 056/105] fpga: xilinx: Fix the rest of CamelCases No functional changes. Signed-off-by: Michal Simek --- board/astro/mcf5373l/fpga.c | 38 ++++++++++++++++---------------- include/spartan2.h | 40 ++++++++++++++++----------------- include/spartan3.h | 44 ++++++++++++++++++------------------- include/virtex2.h | 34 ++++++++++++++-------------- include/xilinx.h | 42 +++++++++++++++++------------------ 5 files changed, 99 insertions(+), 99 deletions(-) diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c index 9dc82c5737c..81ec1920657 100644 --- a/board/astro/mcf5373l/fpga.c +++ b/board/astro/mcf5373l/fpga.c @@ -203,7 +203,7 @@ int astro5373l_altera_load(void) } /* Set the FPGA's PROG_B line to the specified level */ -int xilinx_pgm_fn(int assert, int flush, int cookie) +int xilinx_pgm_config_fn(int assert, int flush, int cookie) { gpio_t *gpiop = (gpio_t *)MMAP_GPIO; @@ -218,7 +218,7 @@ int xilinx_pgm_fn(int assert, int flush, int cookie) * Test the state of the active-low FPGA INIT line. Return 1 on INIT * asserted (low). */ -int xilinx_init_fn(int cookie) +int xilinx_init_config_fn(int cookie) { gpio_t *gpiop = (gpio_t *)MMAP_GPIO; @@ -226,7 +226,7 @@ int xilinx_init_fn(int cookie) } /* Test the state of the active-high FPGA DONE pin */ -int xilinx_done_fn(int cookie) +int xilinx_done_config_fn(int cookie) { gpio_t *gpiop = (gpio_t *)MMAP_GPIO; @@ -234,7 +234,7 @@ int xilinx_done_fn(int cookie) } /* Abort an FPGA operation */ -int xilinx_abort_fn(int cookie) +int xilinx_abort_config_fn(int cookie) { gpio_t *gpiop = (gpio_t *)MMAP_GPIO; /* ensure all SPI peripherals and FPGAs are deselected */ @@ -300,7 +300,7 @@ int xilinx_post_config_fn(int cookie) return rc; } -int xilinx_clk_fn(int assert_clk, int flush, int cookie) +int xilinx_clk_config_fn(int assert_clk, int flush, int cookie) { gpio_t *gpiop = (gpio_t *)MMAP_GPIO; @@ -311,7 +311,7 @@ int xilinx_clk_fn(int assert_clk, int flush, int cookie) return assert_clk; } -int xilinx_wr_fn(int assert_write, int flush, int cookie) +int xilinx_wr_config_fn(int assert_write, int flush, int cookie) { gpio_t *gpiop = (gpio_t *)MMAP_GPIO; @@ -322,7 +322,7 @@ int xilinx_wr_fn(int assert_write, int flush, int cookie) return assert_write; } -int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie) +int xilinx_fastwr_config_fn(void *buf, size_t len, int flush, int cookie) { size_t bytecount = 0; gpio_t *gpiop = (gpio_t *)MMAP_GPIO; @@ -365,13 +365,13 @@ int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie) */ xilinx_spartan3_slave_serial_fns xilinx_fns = { xilinx_pre_config_fn, - xilinx_pgm_fn, - xilinx_clk_fn, - xilinx_init_fn, - xilinx_done_fn, - xilinx_wr_fn, + xilinx_pgm_config_fn, + xilinx_clk_config_fn, + xilinx_init_config_fn, + xilinx_done_config_fn, + xilinx_wr_config_fn, 0, - xilinx_fastwr_fn + xilinx_fastwr_config_fn }; xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = { @@ -395,12 +395,12 @@ int astro5373l_xilinx_load(void) * so set stuff here instead of static initialisation: */ xilinx_fns.pre = xilinx_pre_config_fn; - xilinx_fns.pgm = xilinx_pgm_fn; - xilinx_fns.clk = xilinx_clk_fn; - xilinx_fns.init = xilinx_init_fn; - xilinx_fns.done = xilinx_done_fn; - xilinx_fns.wr = xilinx_wr_fn; - xilinx_fns.bwr = xilinx_fastwr_fn; + xilinx_fns.pgm = xilinx_pgm_config_fn; + xilinx_fns.clk = xilinx_clk_config_fn; + xilinx_fns.init = xilinx_init_config_fn; + xilinx_fns.done = xilinx_done_config_fn; + xilinx_fns.wr = xilinx_wr_config_fn; + xilinx_fns.bwr = xilinx_fastwr_config_fn; xilinx_fpga[i].iface_fns = (void *)&xilinx_fns; fpga_add(fpga_xilinx, &xilinx_fpga[i]); } diff --git a/include/spartan2.h b/include/spartan2.h index 33b25e6b8b9..25db6e7a60d 100644 --- a/include/spartan2.h +++ b/include/spartan2.h @@ -16,30 +16,30 @@ int spartan2_info(xilinx_desc *desc); /* Slave Parallel Implementation function table */ typedef struct { - Xilinx_pre_fn pre; - Xilinx_pgm_fn pgm; - Xilinx_init_fn init; - Xilinx_err_fn err; - Xilinx_done_fn done; - Xilinx_clk_fn clk; - Xilinx_cs_fn cs; - Xilinx_wr_fn wr; - Xilinx_rdata_fn rdata; - Xilinx_wdata_fn wdata; - Xilinx_busy_fn busy; - Xilinx_abort_fn abort; - Xilinx_post_fn post; + xilinx_pre_fn pre; + xilinx_pgm_fn pgm; + xilinx_init_fn init; + xilinx_err_fn err; + xilinx_done_fn done; + xilinx_clk_fn clk; + xilinx_cs_fn cs; + xilinx_wr_fn wr; + xilinx_rdata_fn rdata; + xilinx_wdata_fn wdata; + xilinx_busy_fn busy; + xilinx_abort_fn abort; + xilinx_post_fn post; } xilinx_spartan2_slave_parallel_fns; /* Slave Serial Implementation function table */ typedef struct { - Xilinx_pre_fn pre; - Xilinx_pgm_fn pgm; - Xilinx_clk_fn clk; - Xilinx_init_fn init; - Xilinx_done_fn done; - Xilinx_wr_fn wr; - Xilinx_post_fn post; + xilinx_pre_fn pre; + xilinx_pgm_fn pgm; + xilinx_clk_fn clk; + xilinx_init_fn init; + xilinx_done_fn done; + xilinx_wr_fn wr; + xilinx_post_fn post; } xilinx_spartan2_slave_serial_fns; /* Device Image Sizes diff --git a/include/spartan3.h b/include/spartan3.h index e06b99bff55..56698ac9c72 100644 --- a/include/spartan3.h +++ b/include/spartan3.h @@ -16,32 +16,32 @@ int spartan3_info(xilinx_desc *desc); /* Slave Parallel Implementation function table */ typedef struct { - Xilinx_pre_fn pre; - Xilinx_pgm_fn pgm; - Xilinx_init_fn init; - Xilinx_err_fn err; - Xilinx_done_fn done; - Xilinx_clk_fn clk; - Xilinx_cs_fn cs; - Xilinx_wr_fn wr; - Xilinx_rdata_fn rdata; - Xilinx_wdata_fn wdata; - Xilinx_busy_fn busy; - Xilinx_abort_fn abort; - Xilinx_post_fn post; + xilinx_pre_fn pre; + xilinx_pgm_fn pgm; + xilinx_init_fn init; + xilinx_err_fn err; + xilinx_done_fn done; + xilinx_clk_fn clk; + xilinx_cs_fn cs; + xilinx_wr_fn wr; + xilinx_rdata_fn rdata; + xilinx_wdata_fn wdata; + xilinx_busy_fn busy; + xilinx_abort_fn abort; + xilinx_post_fn post; } xilinx_spartan3_slave_parallel_fns; /* Slave Serial Implementation function table */ typedef struct { - Xilinx_pre_fn pre; - Xilinx_pgm_fn pgm; - Xilinx_clk_fn clk; - Xilinx_init_fn init; - Xilinx_done_fn done; - Xilinx_wr_fn wr; - Xilinx_post_fn post; - Xilinx_bwr_fn bwr; /* block write function */ - Xilinx_abort_fn abort; + xilinx_pre_fn pre; + xilinx_pgm_fn pgm; + xilinx_clk_fn clk; + xilinx_init_fn init; + xilinx_done_fn done; + xilinx_wr_fn wr; + xilinx_post_fn post; + xilinx_bwr_fn bwr; /* block write function */ + xilinx_abort_fn abort; } xilinx_spartan3_slave_serial_fns; /* Device Image Sizes diff --git a/include/virtex2.h b/include/virtex2.h index dd47965aad3..d39286c7ab9 100644 --- a/include/virtex2.h +++ b/include/virtex2.h @@ -19,27 +19,27 @@ int virtex2_info(xilinx_desc *desc); * Slave SelectMap Implementation function table. */ typedef struct { - Xilinx_pre_fn pre; - Xilinx_pgm_fn pgm; - Xilinx_init_fn init; - Xilinx_err_fn err; - Xilinx_done_fn done; - Xilinx_clk_fn clk; - Xilinx_cs_fn cs; - Xilinx_wr_fn wr; - Xilinx_rdata_fn rdata; - Xilinx_wdata_fn wdata; - Xilinx_busy_fn busy; - Xilinx_abort_fn abort; - Xilinx_post_fn post; + xilinx_pre_fn pre; + xilinx_pgm_fn pgm; + xilinx_init_fn init; + xilinx_err_fn err; + xilinx_done_fn done; + xilinx_clk_fn clk; + xilinx_cs_fn cs; + xilinx_wr_fn wr; + xilinx_rdata_fn rdata; + xilinx_wdata_fn wdata; + xilinx_busy_fn busy; + xilinx_abort_fn abort; + xilinx_post_fn post; } xilinx_virtex2_slave_selectmap_fns; /* Slave Serial Implementation function table */ typedef struct { - Xilinx_pgm_fn pgm; - Xilinx_clk_fn clk; - Xilinx_rdata_fn rdata; - Xilinx_wdata_fn wdata; + xilinx_pgm_fn pgm; + xilinx_clk_fn clk; + xilinx_rdata_fn rdata; + xilinx_wdata_fn wdata; } xilinx_virtex2_slave_serial_fns; /* Device Image Sizes (in bytes) diff --git a/include/xilinx.h b/include/xilinx.h index 5900c837440..b72aece7c90 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -12,7 +12,7 @@ /* Xilinx types *********************************************************************/ -typedef enum { /* typedef Xilinx_iface */ +typedef enum { /* typedef xilinx_iface */ min_xilinx_iface_type, /* low range check value */ slave_serial, /* serial data and external clock */ master_serial, /* serial data w/ internal clock (not used) */ @@ -22,21 +22,21 @@ typedef enum { /* typedef Xilinx_iface */ slave_selectmap, /* slave SelectMap (virtex2) */ devcfg, /* devcfg interface (zynq) */ max_xilinx_iface_type /* insert all new types before this */ -} Xilinx_iface; /* end, typedef Xilinx_iface */ +} xilinx_iface; /* end, typedef xilinx_iface */ -typedef enum { /* typedef Xilinx_Family */ +typedef enum { /* typedef xilinx_family */ min_xilinx_type, /* low range check value */ xilinx_spartan2, /* Spartan-II Family */ - Xilinx_VirtexE, /* Virtex-E Family */ + xilinx_virtexE, /* Virtex-E Family */ xilinx_virtex2, /* Virtex2 Family */ xilinx_spartan3, /* Spartan-III Family */ xilinx_zynq, /* Zynq Family */ max_xilinx_type /* insert all new types before this */ -} Xilinx_Family; /* end, typedef Xilinx_Family */ +} xilinx_family; /* end, typedef xilinx_family */ typedef struct { /* typedef xilinx_desc */ - Xilinx_Family family; /* part type */ - Xilinx_iface iface; /* interface type */ + xilinx_family family; /* part type */ + xilinx_iface iface; /* interface type */ size_t size; /* bytes of data part can accept */ void *iface_fns; /* interface function table */ int cookie; /* implementation specific cookie */ @@ -51,19 +51,19 @@ int xilinx_info(xilinx_desc *desc); /* Board specific implementation specific function types *********************************************************************/ -typedef int (*Xilinx_pgm_fn)( int assert_pgm, int flush, int cookie ); -typedef int (*Xilinx_init_fn)( int cookie ); -typedef int (*Xilinx_err_fn)( int cookie ); -typedef int (*Xilinx_done_fn)( int cookie ); -typedef int (*Xilinx_clk_fn)( int assert_clk, int flush, int cookie ); -typedef int (*Xilinx_cs_fn)( int assert_cs, int flush, int cookie ); -typedef int (*Xilinx_wr_fn)( int assert_write, int flush, int cookie ); -typedef int (*Xilinx_rdata_fn)( unsigned char *data, int cookie ); -typedef int (*Xilinx_wdata_fn)( unsigned char data, int flush, int cookie ); -typedef int (*Xilinx_busy_fn)( int cookie ); -typedef int (*Xilinx_abort_fn)( int cookie ); -typedef int (*Xilinx_pre_fn)( int cookie ); -typedef int (*Xilinx_post_fn)( int cookie ); -typedef int (*Xilinx_bwr_fn)( void *buf, size_t len, int flush, int cookie ); +typedef int (*xilinx_pgm_fn)(int assert_pgm, int flush, int cookie); +typedef int (*xilinx_init_fn)(int cookie); +typedef int (*xilinx_err_fn)(int cookie); +typedef int (*xilinx_done_fn)(int cookie); +typedef int (*xilinx_clk_fn)(int assert_clk, int flush, int cookie); +typedef int (*xilinx_cs_fn)(int assert_cs, int flush, int cookie); +typedef int (*xilinx_wr_fn)(int assert_write, int flush, int cookie); +typedef int (*xilinx_rdata_fn)(unsigned char *data, int cookie); +typedef int (*xilinx_wdata_fn)(unsigned char data, int flush, int cookie); +typedef int (*xilinx_busy_fn)(int cookie); +typedef int (*xilinx_abort_fn)(int cookie); +typedef int (*xilinx_pre_fn)(int cookie); +typedef int (*xilinx_post_fn)(int cookie); +typedef int (*xilinx_bwr_fn)(void *buf, size_t len, int flush, int cookie); #endif /* _XILINX_H_ */ From 14cfc4f3735d9704cb6a630ef302be596d380684 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 13 Mar 2014 13:07:57 +0100 Subject: [PATCH 057/105] fpga: xilinx: Simplify load/dump/info function handling Connect FPGA version with appropriate operations to remove huge switch-cases for every FPGA family. Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test. Signed-off-by: Michal Simek --- board/armadeus/apf27/fpga.c | 1 + board/astro/mcf5373l/fpga.c | 3 +- drivers/fpga/spartan2.c | 12 ++- drivers/fpga/spartan3.c | 12 ++- drivers/fpga/virtex2.c | 12 ++- drivers/fpga/xilinx.c | 159 ++---------------------------------- drivers/fpga/zynqpl.c | 13 ++- include/spartan2.h | 28 +++---- include/spartan3.h | 36 ++++---- include/virtex2.h | 28 +++---- include/xilinx.h | 7 ++ include/zynqpl.h | 16 ++-- 12 files changed, 104 insertions(+), 223 deletions(-) diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c index 7d6e1e462c9..65a4812c35b 100644 --- a/board/armadeus/apf27/fpga.c +++ b/board/armadeus/apf27/fpga.c @@ -48,6 +48,7 @@ xilinx_desc fpga[CONFIG_FPGA_COUNT] = { 1196128l/8, (void *)&fpga_fns, 0, + &spartan3_op, "3s200aft256"} }; diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c index 81ec1920657..1d044d96a56 100644 --- a/board/astro/mcf5373l/fpga.c +++ b/board/astro/mcf5373l/fpga.c @@ -379,7 +379,8 @@ xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = { slave_serial, XILINX_XC3S4000_SIZE, (void *)&xilinx_fns, - 0} + 0, + &spartan3_op} }; /* Initialize the fpga. Return 1 on success, 0 on failure. */ diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c index 0796729436c..70540561403 100644 --- a/drivers/fpga/spartan2.c +++ b/drivers/fpga/spartan2.c @@ -41,7 +41,7 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize); /* ------------------------------------------------------------------------- */ /* Spartan-II Generic Implementation */ -int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -64,7 +64,7 @@ int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -87,7 +87,7 @@ int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int spartan2_info(xilinx_desc *desc) +static int spartan2_info(xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -447,3 +447,9 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize) __FUNCTION__); return FPGA_FAIL; } + +struct xilinx_fpga_op spartan2_op = { + .load = spartan2_load, + .dump = spartan2_dump, + .info = spartan2_info, +}; diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c index 1304b4c646e..5c9412c2f63 100644 --- a/drivers/fpga/spartan3.c +++ b/drivers/fpga/spartan3.c @@ -45,7 +45,7 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize); /* ------------------------------------------------------------------------- */ /* Spartan-II Generic Implementation */ -int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -68,7 +68,7 @@ int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -91,7 +91,7 @@ int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int spartan3_info(xilinx_desc *desc) +static int spartan3_info(xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -465,3 +465,9 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize) __FUNCTION__); return FPGA_FAIL; } + +struct xilinx_fpga_op spartan3_op = { + .load = spartan3_load, + .dump = spartan3_dump, + .info = spartan3_info, +}; diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c index a582bf2d798..e092147edd1 100644 --- a/drivers/fpga/virtex2.c +++ b/drivers/fpga/virtex2.c @@ -90,7 +90,7 @@ static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize); static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize); static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize); -int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -112,7 +112,7 @@ int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize) +static int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -134,7 +134,7 @@ int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int virtex2_info(xilinx_desc *desc) +static int virtex2_info(xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -417,3 +417,9 @@ static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize) } /* vim: set ts=4 tw=78: */ + +struct xilinx_fpga_op virtex2_op = { + .load = virtex2_load, + .dump = virtex2_dump, + .info = virtex2_info, +}; diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index b0e9cb35a31..8837f5c122e 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -19,17 +19,6 @@ #include #include -#if 0 -#define FPGA_DEBUG -#endif - -/* Define FPGA_DEBUG to get debug printf's */ -#ifdef FPGA_DEBUG -#define PRINTF(fmt,args...) printf (fmt ,##args) -#else -#define PRINTF(fmt,args...) -#endif - /* Local Static Functions */ static int xilinx_validate(xilinx_desc *desc, char *fn); @@ -143,116 +132,22 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size) int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize) { - int ret_val = FPGA_FAIL; /* assume a failure */ - if (!xilinx_validate (desc, (char *)__FUNCTION__)) { printf ("%s: Invalid device descriptor\n", __FUNCTION__); - } else - switch (desc->family) { - case xilinx_spartan2: -#if defined(CONFIG_FPGA_SPARTAN2) - PRINTF ("%s: Launching the Spartan-II Loader...\n", - __FUNCTION__); - ret_val = spartan2_load(desc, buf, bsize); -#else - printf ("%s: No support for Spartan-II devices.\n", - __FUNCTION__); -#endif - break; - case xilinx_spartan3: -#if defined(CONFIG_FPGA_SPARTAN3) - PRINTF ("%s: Launching the Spartan-III Loader...\n", - __FUNCTION__); - ret_val = spartan3_load(desc, buf, bsize); -#else - printf ("%s: No support for Spartan-III devices.\n", - __FUNCTION__); -#endif - break; - case xilinx_virtex2: -#if defined(CONFIG_FPGA_VIRTEX2) - PRINTF ("%s: Launching the Virtex-II Loader...\n", - __FUNCTION__); - ret_val = virtex2_load(desc, buf, bsize); -#else - printf ("%s: No support for Virtex-II devices.\n", - __FUNCTION__); -#endif - break; - case xilinx_zynq: -#if defined(CONFIG_FPGA_ZYNQPL) - PRINTF("%s: Launching the Zynq PL Loader...\n", - __func__); - ret_val = zynq_load(desc, buf, bsize); -#else - printf("%s: No support for Zynq devices.\n", - __func__); -#endif - break; + return FPGA_FAIL; + } - default: - printf ("%s: Unsupported family type, %d\n", - __FUNCTION__, desc->family); - } - - return ret_val; + return desc->operations->load(desc, buf, bsize); } int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize) { - int ret_val = FPGA_FAIL; /* assume a failure */ - if (!xilinx_validate (desc, (char *)__FUNCTION__)) { printf ("%s: Invalid device descriptor\n", __FUNCTION__); - } else - switch (desc->family) { - case xilinx_spartan2: -#if defined(CONFIG_FPGA_SPARTAN2) - PRINTF ("%s: Launching the Spartan-II Reader...\n", - __FUNCTION__); - ret_val = spartan2_dump(desc, buf, bsize); -#else - printf ("%s: No support for Spartan-II devices.\n", - __FUNCTION__); -#endif - break; - case xilinx_spartan3: -#if defined(CONFIG_FPGA_SPARTAN3) - PRINTF ("%s: Launching the Spartan-III Reader...\n", - __FUNCTION__); - ret_val = spartan3_dump(desc, buf, bsize); -#else - printf ("%s: No support for Spartan-III devices.\n", - __FUNCTION__); -#endif - break; - case xilinx_virtex2: -#if defined( CONFIG_FPGA_VIRTEX2) - PRINTF ("%s: Launching the Virtex-II Reader...\n", - __FUNCTION__); - ret_val = virtex2_dump(desc, buf, bsize); -#else - printf ("%s: No support for Virtex-II devices.\n", - __FUNCTION__); -#endif - break; - case xilinx_zynq: -#if defined(CONFIG_FPGA_ZYNQPL) - PRINTF("%s: Launching the Zynq PL Reader...\n", - __func__); - ret_val = zynq_dump(desc, buf, bsize); -#else - printf("%s: No support for Zynq devices.\n", - __func__); -#endif - break; + return FPGA_FAIL; + } - default: - printf ("%s: Unsupported family type, %d\n", - __FUNCTION__, desc->family); - } - - return ret_val; + return desc->operations->dump(desc, buf, bsize); } int xilinx_info(xilinx_desc *desc) @@ -315,47 +210,7 @@ int xilinx_info(xilinx_desc *desc) if (desc->iface_fns) { printf ("Device Function Table @ 0x%p\n", desc->iface_fns); - switch (desc->family) { - case xilinx_spartan2: -#if defined(CONFIG_FPGA_SPARTAN2) - spartan2_info(desc); -#else - /* just in case */ - printf ("%s: No support for Spartan-II devices.\n", - __FUNCTION__); -#endif - break; - case xilinx_spartan3: -#if defined(CONFIG_FPGA_SPARTAN3) - spartan3_info(desc); -#else - /* just in case */ - printf ("%s: No support for Spartan-III devices.\n", - __FUNCTION__); -#endif - break; - case xilinx_virtex2: -#if defined(CONFIG_FPGA_VIRTEX2) - virtex2_info(desc); -#else - /* just in case */ - printf ("%s: No support for Virtex-II devices.\n", - __FUNCTION__); -#endif - break; - case xilinx_zynq: -#if defined(CONFIG_FPGA_ZYNQPL) - zynq_info(desc); -#else - /* just in case */ - printf("%s: No support for Zynq devices.\n", - __func__); -#endif - /* Add new family types here */ - default: - /* we don't need a message here - we give one up above */ - ; - } + desc->operations->info(desc); } else printf ("No Device Function Table.\n"); diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index b4d0e2278c9..dcd34951ad6 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -36,7 +36,7 @@ #define CONFIG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */ #endif -int zynq_info(xilinx_desc *desc) +static int zynq_info(xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -152,8 +152,7 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap) return 0; } - -int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) +static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) { unsigned long ts; /* Timestamp */ u32 partialbit = 0; @@ -358,7 +357,13 @@ int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) return FPGA_SUCCESS; } -int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize) +static int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize) { return FPGA_FAIL; } + +struct xilinx_fpga_op zynq_op = { + .load = zynq_load, + .dump = zynq_dump, + .info = zynq_info, +}; diff --git a/include/spartan2.h b/include/spartan2.h index 25db6e7a60d..2aca954e73a 100644 --- a/include/spartan2.h +++ b/include/spartan2.h @@ -10,10 +10,6 @@ #include -int spartan2_load(xilinx_desc *desc, const void *image, size_t size); -int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize); -int spartan2_info(xilinx_desc *desc); - /* Slave Parallel Implementation function table */ typedef struct { xilinx_pre_fn pre; @@ -42,6 +38,8 @@ typedef struct { xilinx_post_fn post; } xilinx_spartan2_slave_serial_fns; +extern struct xilinx_fpga_op spartan2_op; + /* Device Image Sizes *********************************************************************/ /* Spartan-II (2.5V) */ @@ -63,36 +61,36 @@ typedef struct { *********************************************************************/ /* Spartan-II devices */ #define XILINX_XC2S15_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie, &spartan2_op } #define XILINX_XC2S30_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie, &spartan2_op } #define XILINX_XC2S50_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie, &spartan2_op } #define XILINX_XC2S100_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie, &spartan2_op } #define XILINX_XC2S150_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie, &spartan2_op } #define XILINX_XC2S200_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie, &spartan2_op } #define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie, &spartan2_op } #define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie, &spartan2_op } #define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie, &spartan2_op } #define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie, &spartan2_op } #define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie, &spartan2_op } #endif /* _SPARTAN2_H_ */ diff --git a/include/spartan3.h b/include/spartan3.h index 56698ac9c72..d6d67a6e560 100644 --- a/include/spartan3.h +++ b/include/spartan3.h @@ -10,10 +10,6 @@ #include -int spartan3_load(xilinx_desc *desc, const void *image, size_t size); -int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize); -int spartan3_info(xilinx_desc *desc); - /* Slave Parallel Implementation function table */ typedef struct { xilinx_pre_fn pre; @@ -44,6 +40,8 @@ typedef struct { xilinx_abort_fn abort; } xilinx_spartan3_slave_serial_fns; +extern struct xilinx_fpga_op spartan3_op; + /* Device Image Sizes *********************************************************************/ /* Spartan-III (1.2V) */ @@ -73,46 +71,48 @@ typedef struct { *********************************************************************/ /* Spartan-III devices */ #define XILINX_XC3S50_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie, &spartan3_op } #define XILINX_XC3S200_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie, &spartan3_op } #define XILINX_XC3S400_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie, &spartan3_op } #define XILINX_XC3S1000_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie, &spartan3_op } #define XILINX_XC3S1500_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie, &spartan3_op } #define XILINX_XC3S2000_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie, &spartan3_op } #define XILINX_XC3S4000_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie, &spartan3_op } #define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie, &spartan3_op } /* Spartan-3E devices */ #define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie, &spartan3_op } #define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie, &spartan3_op } #define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie, &spartan3_op } #define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie, \ + &spartan3_op } #define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie, \ + &spartan3_op } #define XILINX_XC6SLX4_DESC(iface, fn_table, cookie) \ -{ xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie } +{ xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie, &spartan3_op } #endif /* _SPARTAN3_H_ */ diff --git a/include/virtex2.h b/include/virtex2.h index d39286c7ab9..7b7825f513e 100644 --- a/include/virtex2.h +++ b/include/virtex2.h @@ -11,9 +11,7 @@ #include -int virtex2_load(xilinx_desc *desc, const void *image, size_t size); -int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize); -int virtex2_info(xilinx_desc *desc); +extern struct xilinx_fpga_op virtex2_op; /* * Slave SelectMap Implementation function table. @@ -60,39 +58,39 @@ typedef struct { /* Descriptor Macros *********************************************************************/ #define XILINX_XC2V40_DESC(iface, fn_table, cookie) \ -{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, &virtex2_op } #define XILINX_XC2V80_DESC(iface, fn_table, cookie) \ -{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, &virtex2_op } #define XILINX_XC2V250_DESC(iface, fn_table, cookie) \ -{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, &virtex2_op } #define XILINX_XC2V500_DESC(iface, fn_table, cookie) \ -{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, &virtex2_op } #define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \ -{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, &virtex2_op } #define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \ -{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, &virtex2_op } #define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \ -{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, &virtex2_op } #define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \ -{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, &virtex2_op } #define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \ -{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, &virtex2_op } #define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \ -{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, &virtex2_op } #define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \ -{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, &virtex2_op } #define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \ -{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie } +{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, &virtex2_op } #endif /* _VIRTEX2_H_ */ diff --git a/include/xilinx.h b/include/xilinx.h index b72aece7c90..9801267c593 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -40,9 +40,16 @@ typedef struct { /* typedef xilinx_desc */ size_t size; /* bytes of data part can accept */ void *iface_fns; /* interface function table */ int cookie; /* implementation specific cookie */ + struct xilinx_fpga_op *operations; /* operations */ char *name; /* device name in bitstream */ } xilinx_desc; /* end, typedef xilinx_desc */ +struct xilinx_fpga_op { + int (*load)(xilinx_desc *, const void *, size_t); + int (*dump)(xilinx_desc *, const void *, size_t); + int (*info)(xilinx_desc *); +}; + /* Generic Xilinx Functions *********************************************************************/ int xilinx_load(xilinx_desc *desc, const void *image, size_t size); diff --git a/include/zynqpl.h b/include/zynqpl.h index fdee69110ce..8a9ec3297fb 100644 --- a/include/zynqpl.h +++ b/include/zynqpl.h @@ -12,9 +12,7 @@ #include -int zynq_load(xilinx_desc *desc, const void *image, size_t size); -int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize); -int zynq_info(xilinx_desc *desc); +extern struct xilinx_fpga_op zynq_op; #define XILINX_ZYNQ_7010 0x2 #define XILINX_ZYNQ_7015 0x1b @@ -33,21 +31,21 @@ int zynq_info(xilinx_desc *desc); /* Descriptor Macros */ #define XILINX_XC7Z010_DESC(cookie) \ -{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, "7z010" } +{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, &zynq_op, "7z010" } #define XILINX_XC7Z015_DESC(cookie) \ -{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, "7z015" } +{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, &zynq_op, "7z015" } #define XILINX_XC7Z020_DESC(cookie) \ -{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, "7z020" } +{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, &zynq_op, "7z020" } #define XILINX_XC7Z030_DESC(cookie) \ -{ xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, "7z030" } +{ xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, &zynq_op, "7z030" } #define XILINX_XC7Z045_DESC(cookie) \ -{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, "7z045" } +{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, &zynq_op, "7z045" } #define XILINX_XC7Z100_DESC(cookie) \ -{ xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, "7z100" } +{ xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, &zynq_op, "7z100" } #endif /* _ZYNQPL_H_ */ From 42a74a08eb4ef976f3b29a0b2bdefe0e509af8f5 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 25 Apr 2014 13:51:58 +0200 Subject: [PATCH 058/105] fpga: zynq: Remove sparse warnings Warnings: drivers/fpga/zynqpl.c:150:32: warning: Using plain integer as NULL pointer drivers/fpga/zynqpl.c:152:16: warning: Using plain integer as NULL pointer Signed-off-by: Michal Simek --- drivers/fpga/zynqpl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index dcd34951ad6..0a134e524c4 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -147,9 +147,9 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap) } /* Loop can be huge - support CTRL + C */ if (ctrlc()) - return 0; + return NULL; } - return 0; + return NULL; } static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) From a0735a34f8ab2d7060b6f8c16d3cccf78b137283 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Wed, 12 Mar 2014 17:09:26 +0530 Subject: [PATCH 059/105] fpga: zynq: Use helper functions for zynq dma Use zynq_dma_xfer_init, zynq_align_dma_buffer, zynq_dma_transfer helper function performing dma transfers so that the code can be reused easily for different cases of dma transfer. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- drivers/fpga/zynqpl.c | 207 ++++++++++++++++++++++++------------------ 1 file changed, 118 insertions(+), 89 deletions(-) diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index 0a134e524c4..ef6d1caca41 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -152,71 +152,53 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap) return NULL; } -static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) +static int zynq_dma_transfer(u32 srcbuf, u32 srclen, u32 dstbuf, u32 dstlen) { - unsigned long ts; /* Timestamp */ - u32 partialbit = 0; - u32 i, control, isr_status, status, swap, diff; - u32 *buf_start; + unsigned long ts; + u32 isr_status; - /* Detect if we are going working with partial or full bitstream */ - if (bsize != desc->size) { - printf("%s: Working with partial bitstream\n", __func__); - partialbit = 1; - } + /* Set up the transfer */ + writel((u32)srcbuf, &devcfg_base->dma_src_addr); + writel(dstbuf, &devcfg_base->dma_dst_addr); + writel(srclen, &devcfg_base->dma_src_len); + writel(dstlen, &devcfg_base->dma_dst_len); - buf_start = check_data((u8 *)buf, bsize, &swap); - if (!buf_start) - return FPGA_FAIL; + isr_status = readl(&devcfg_base->int_sts); - /* Check if data is postpone from start */ - diff = (u32)buf_start - (u32)buf; - if (diff) { - printf("%s: Bitstream is not validated yet (diff %x)\n", - __func__, diff); - return FPGA_FAIL; - } + /* Polling the PCAP_INIT status for Set */ + ts = get_timer(0); + while (!(isr_status & DEVCFG_ISR_DMA_DONE)) { + if (isr_status & DEVCFG_ISR_ERROR_FLAGS_MASK) { + debug("%s: Error: isr = 0x%08X\n", __func__, + isr_status); + debug("%s: Write count = 0x%08X\n", __func__, + readl(&devcfg_base->write_count)); + debug("%s: Read count = 0x%08X\n", __func__, + readl(&devcfg_base->read_count)); - if ((u32)buf < SZ_1M) { - printf("%s: Bitstream has to be placed up to 1MB (%x)\n", - __func__, (u32)buf); - return FPGA_FAIL; - } - - if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) { - u32 *new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN); - - /* - * This might be dangerous but permits to flash if - * ARCH_DMA_MINALIGN is greater than header size - */ - if (new_buf > buf_start) { - debug("%s: Aligned buffer is after buffer start\n", - __func__); - new_buf -= ARCH_DMA_MINALIGN; + return FPGA_FAIL; } - - printf("%s: Align buffer at %x to %x(swap %d)\n", __func__, - (u32)buf_start, (u32)new_buf, swap); - - for (i = 0; i < (bsize/4); i++) - new_buf[i] = load_word(&buf_start[i], swap); - - swap = SWAP_DONE; - buf = new_buf; - } else if (swap != SWAP_DONE) { - /* For bitstream which are aligned */ - u32 *new_buf = (u32 *)buf; - - printf("%s: Bitstream is not swapped(%d) - swap it\n", __func__, - swap); - - for (i = 0; i < (bsize/4); i++) - new_buf[i] = load_word(&buf_start[i], swap); - - swap = SWAP_DONE; + if (get_timer(ts) > CONFIG_SYS_FPGA_PROG_TIME) { + printf("%s: Timeout wait for DMA to complete\n", + __func__); + return FPGA_FAIL; + } + isr_status = readl(&devcfg_base->int_sts); } + debug("%s: DMA transfer is done\n", __func__); + + /* Clear out the DMA status */ + writel(DEVCFG_ISR_DMA_DONE, &devcfg_base->int_sts); + + return FPGA_SUCCESS; +} + +static int zynq_dma_xfer_init(u32 partialbit) +{ + u32 status, control, isr_status; + unsigned long ts; + /* Clear loopback bit */ clrbits_le32(&devcfg_base->mctrl, DEVCFG_MCTRL_PCAP_LPBK); @@ -297,6 +279,83 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) writel(DEVCFG_STATUS_DMA_DONE_CNT_MASK, &devcfg_base->status); } + return FPGA_SUCCESS; +} + +static u32 *zynq_align_dma_buffer(u32 *buf, u32 len, u32 swap) +{ + u32 *new_buf; + u32 i; + + if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) { + new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN); + + /* + * This might be dangerous but permits to flash if + * ARCH_DMA_MINALIGN is greater than header size + */ + if (new_buf > buf) { + debug("%s: Aligned buffer is after buffer start\n", + __func__); + new_buf -= ARCH_DMA_MINALIGN; + } + printf("%s: Align buffer at %x to %x(swap %d)\n", __func__, + (u32)buf, (u32)new_buf, swap); + + for (i = 0; i < (len/4); i++) + new_buf[i] = load_word(&buf[i], swap); + + buf = new_buf; + } else if (swap != SWAP_DONE) { + /* For bitstream which are aligned */ + u32 *new_buf = (u32 *)buf; + + printf("%s: Bitstream is not swapped(%d) - swap it\n", __func__, + swap); + + for (i = 0; i < (len/4); i++) + new_buf[i] = load_word(&buf[i], swap); + } + + return buf; +} + +static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) +{ + unsigned long ts; /* Timestamp */ + u32 partialbit = 0; + u32 isr_status, swap, diff; + u32 *buf_start; + + /* Detect if we are going working with partial or full bitstream */ + if (bsize != desc->size) { + printf("%s: Working with partial bitstream\n", __func__); + partialbit = 1; + } + + buf_start = check_data((u8 *)buf, bsize, &swap); + if (!buf_start) + return FPGA_FAIL; + + /* Check if data is postpone from start */ + diff = (u32)buf_start - (u32)buf; + if (diff) { + printf("%s: Bitstream is not validated yet (diff %x)\n", + __func__, diff); + return FPGA_FAIL; + } + + if ((u32)buf < SZ_1M) { + printf("%s: Bitstream has to be placed up to 1MB (%x)\n", + __func__, (u32)buf); + return FPGA_FAIL; + } + + if (zynq_dma_xfer_init(partialbit)) + return FPGA_FAIL; + + buf = zynq_align_dma_buffer((u32 *)buf, bsize, swap); + debug("%s: Source = 0x%08X\n", __func__, (u32)buf); debug("%s: Size = %zu\n", __func__, bsize); @@ -304,37 +363,10 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) flush_dcache_range((u32)buf, (u32)buf + roundup(bsize, ARCH_DMA_MINALIGN)); - /* Set up the transfer */ - writel((u32)buf | 1, &devcfg_base->dma_src_addr); - writel(0xFFFFFFFF, &devcfg_base->dma_dst_addr); - writel(bsize >> 2, &devcfg_base->dma_src_len); - writel(0, &devcfg_base->dma_dst_len); + if (zynq_dma_transfer((u32)buf | 1, bsize >> 2, 0xffffffff, 0)) + return FPGA_FAIL; isr_status = readl(&devcfg_base->int_sts); - - /* Polling the PCAP_INIT status for Set */ - ts = get_timer(0); - while (!(isr_status & DEVCFG_ISR_DMA_DONE)) { - if (isr_status & DEVCFG_ISR_ERROR_FLAGS_MASK) { - debug("%s: Error: isr = 0x%08X\n", __func__, - isr_status); - debug("%s: Write count = 0x%08X\n", __func__, - readl(&devcfg_base->write_count)); - debug("%s: Read count = 0x%08X\n", __func__, - readl(&devcfg_base->read_count)); - - return FPGA_FAIL; - } - if (get_timer(ts) > CONFIG_SYS_FPGA_PROG_TIME) { - printf("%s: Timeout wait for DMA to complete\n", - __func__); - return FPGA_FAIL; - } - isr_status = readl(&devcfg_base->int_sts); - } - - debug("%s: DMA transfer is done\n", __func__); - /* Check FPGA configuration completion */ ts = get_timer(0); while (!(isr_status & DEVCFG_ISR_PCFG_DONE)) { @@ -348,9 +380,6 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) debug("%s: FPGA config done\n", __func__); - /* Clear out the DMA status */ - writel(DEVCFG_ISR_DMA_DONE, &devcfg_base->int_sts); - if (!partialbit) zynq_slcr_devcfg_enable(); From 31081859855e606ca06131c3a14e099e043d39f0 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Thu, 13 Mar 2014 11:57:34 +0530 Subject: [PATCH 060/105] fpga: zynq: Use helper function zynq_validate_bitstream Use helper function zynq_validate_bitstream so that the code can be reused easily for different cases of dma transfer. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- drivers/fpga/zynqpl.c | 32 +++++++++++++++++++++++++------- 1 file changed, 25 insertions(+), 7 deletions(-) diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index ef6d1caca41..c066f21d79f 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -320,20 +320,20 @@ static u32 *zynq_align_dma_buffer(u32 *buf, u32 len, u32 swap) return buf; } -static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) +static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf, + size_t bsize, u32 blocksize, u32 *swap, + u32 *partialbit) { - unsigned long ts; /* Timestamp */ - u32 partialbit = 0; - u32 isr_status, swap, diff; u32 *buf_start; + u32 diff; /* Detect if we are going working with partial or full bitstream */ if (bsize != desc->size) { printf("%s: Working with partial bitstream\n", __func__); - partialbit = 1; + *partialbit = 1; } + buf_start = check_data((u8 *)buf, blocksize, swap); - buf_start = check_data((u8 *)buf, bsize, &swap); if (!buf_start) return FPGA_FAIL; @@ -351,7 +351,25 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) return FPGA_FAIL; } - if (zynq_dma_xfer_init(partialbit)) + if (zynq_dma_xfer_init(*partialbit)) + return FPGA_FAIL; + + return 0; +} + + +static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) +{ + unsigned long ts; /* Timestamp */ + u32 partialbit = 0; + u32 isr_status, swap; + + /* + * send bsize inplace of blocksize as it was not a bitstream + * in chunks + */ + if (zynq_validate_bitstream(desc, buf, bsize, bsize, &swap, + &partialbit)) return FPGA_FAIL; buf = zynq_align_dma_buffer((u32 *)buf, bsize, swap); From 4150f24290a4b6a3afe61487413408e5082f33be Mon Sep 17 00:00:00 2001 From: Shaveta Leekha Date: Fri, 11 Apr 2014 14:12:39 +0530 Subject: [PATCH 061/105] board/freescale/common: ZM7300 driver Adds Support for PowerOne ZM7300 voltage regulator. This device is available on some Freescale Boards like B4860QDS and has to be programmed to adjust the voltage on the board. The device is accessible via I2C interface. Signed-off-by: Shaveta Leekha Signed-off-by: Poonam Aggrwal --- board/freescale/common/Makefile | 1 + board/freescale/common/zm7300.c | 235 ++++++++++++++++++++++++++++++++ board/freescale/common/zm7300.h | 22 +++ 3 files changed, 258 insertions(+) create mode 100644 board/freescale/common/zm7300.c create mode 100644 board/freescale/common/zm7300.h diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index f6a08797531..22b57ccaa8d 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -48,6 +48,7 @@ obj-$(CONFIG_P5020DS) += ics307_clk.o obj-$(CONFIG_P5040DS) += ics307_clk.o obj-$(CONFIG_VSC_CROSSBAR) += vsc3316_3308.o obj-$(CONFIG_IDT8T49N222A) += idt8t49n222a_serdes_clk.o +obj-$(CONFIG_ZM7300) += zm7300.o # deal with common files for P-series corenet based devices obj-$(CONFIG_P2041RDB) += p_corenet/ diff --git a/board/freescale/common/zm7300.c b/board/freescale/common/zm7300.c new file mode 100644 index 00000000000..be5953ad2d8 --- /dev/null +++ b/board/freescale/common/zm7300.c @@ -0,0 +1,235 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* Power-One ZM7300 DPM */ +#include "zm7300.h" + +#define DPM_WP 0x96 +#define WRP_OPCODE 0x01 +#define WRM_OPCODE 0x02 +#define RRP_OPCODE 0x11 + +#define DPM_SUCCESS 0x01 +#define DPM_EXEC_FAIL 0x00 + +static const uint16_t hex_to_1_10mv[] = { + 5000, + 5125, + 5250, + 5375, + 5500, + 5625, + 5750, + 5875, + 6000, + 6125, + 6250, + 6375, + 6500, + 6625, + 6750, + 6875, + 7000, + 7125, + 7250, + 7375, + 7500, + 7625, + 7750, + 7875, + 8000, + 8125, + 8250, + 8375, + 8500, + 8625, + 8750, + 8875, + 9000, + 9125, + 9250, + 9375, + 9500, /* 0.95mV */ + 9625, + 9750, + 9875, + 10000, /* 1.0V */ + 10125, + 10250, + 10375, + 10500, + 10625, + 10750, + 10875, + 11000, + 11125, + 11250, + 11375, + 11500, + 11625, + 11750, + 11875, + 12000, + 12125, + 12250, + 12375, + 0, /* reserved */ +}; + + +/* Read Data d from Register r of POL p */ +u8 dpm_rrp(uchar r) +{ + u8 ret[5]; + + ret[0] = RRP_OPCODE; + /* POL is 0 */ + ret[1] = 0; + ret[2] = r; + i2c_read(I2C_DPM_ADDR, 0, -3, ret, 2); + if (ret[1] == DPM_SUCCESS) { /* the DPM returned success as status */ + debug("RRP_OPCODE returned success data is %x\n", ret[0]); + return ret[0]; + } else { + return -1; + } +} + +/* Write Data d into DPM register r (RAM) */ +int dpm_wrm(u8 r, u8 d) +{ + u8 ret[5]; + + ret[0] = WRM_OPCODE; + ret[1] = r; + ret[2] = d; + i2c_read(I2C_DPM_ADDR, 0, -3, ret, 1); + if (ret[0] == DPM_SUCCESS) { /* the DPM returned success as status */ + debug("WRM_OPCODE returned success data is %x\n", ret[0]); + return ret[0]; + } else { + return -1; + } +} + +/* Write Data d into Register r of POL(s) a */ +int dpm_wrp(u8 r, u8 d) +{ + u8 ret[7]; + + ret[0] = WRP_OPCODE; + /* only POL0 is present */ + ret[1] = 0x01; + ret[2] = 0x00; + ret[3] = 0x00; + ret[4] = 0x00; + ret[5] = r; + ret[6] = d; + i2c_read(I2C_DPM_ADDR, 0, -7, ret, 1); + if (ret[0] == DPM_SUCCESS) { /* the DPM returned success as status */ + debug("WRP_OPCODE returned success data is %x\n", ret[0]); + return 0; + } else { + return -1; + } +} + +/* Uses the DPM command RRP */ +u8 zm_read(uchar reg) +{ + u8 d; + d = dpm_rrp(reg); + return d; +} + +/* ZM_write -- + Steps: + a. Write data to the register + b. Read data from register and compare to written value + c. Return return_code & voltage_read +*/ +u8 zm_write(u8 reg, u8 data) +{ + u8 d; + + /* write data to register */ + dpm_wrp(reg, data); + + /* read register and compare to written value */ + d = dpm_rrp(reg); + if (d != data) { + printf("zm_write : Comparison register data failed\n"); + return -1; + } + + return d; +} + +/* zm_write_out_voltage + * voltage in 1/10 mV + */ +int zm_write_voltage(int voltage) +{ + u8 reg = 0x7, vid; + uint16_t voltage_read; + u8 ret; + + vid = (voltage - 5000) / ZM_STEP; + + ret = zm_write(reg, vid); + if (ret != -1) { + voltage_read = hex_to_1_10mv[ret]; + debug("voltage set to %dmV\n", voltage_read/10); + return voltage_read; + } + return -1; +} + +/* zm_read_out_voltage + * voltage in 1/10 mV + */ +int zm_read_voltage(void) +{ + u8 reg = 0x7; + u8 ret; + int voltage; + + ret = zm_read(reg); + if (ret != -1) { + voltage = hex_to_1_10mv[ret]; + debug("Voltage read is %dmV\n", voltage/10); + return voltage; + } else { + return -1; + } +} + +int zm_disable_wp() +{ + u8 new_wp_value; + + /* Disable using Write-Protect register 0x96 */ + new_wp_value = 0x8; + if ((dpm_wrm(DPM_WP, new_wp_value)) < 0) { + printf("Disable Write-Protect register failed\n"); + return -1; + } + return 0; +} + +int zm_enable_wp() +{ + u8 orig_wp_value; + orig_wp_value = 0x0; + + /* Enable using Write-Protect register 0x96 */ + if ((dpm_wrm(DPM_WP, orig_wp_value)) < 0) { + printf("Enable Write-Protect register failed\n"); + return -1; + } + return 0; +} + diff --git a/board/freescale/common/zm7300.h b/board/freescale/common/zm7300.h new file mode 100644 index 00000000000..6b4d035970c --- /dev/null +++ b/board/freescale/common/zm7300.h @@ -0,0 +1,22 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ZM7300_H_ +#define __ZM7300_H 1_ + +#include +#include +#include +#include + +#define ZM_STEP 125 +int zm7300_set_voltage(int voltage_1_10mv); +int zm_write_voltage(int voltage); +int zm_read_voltage(void); +int zm_disable_wp(void); +int zm_enable_wp(void); + +#endif /* __ZM7300_H_ */ From 652e29b4a0d5ff418a4f1a633912976cd7331758 Mon Sep 17 00:00:00 2001 From: Shaveta Leekha Date: Fri, 11 Apr 2014 14:12:40 +0530 Subject: [PATCH 062/105] board/b4qds: VID support The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. B4860QDS has a PowerOne ZM7300 programmable digital Power Manager which is programmed as per the value read from the fuses. Reference for this code is taken from t4qds VID implementation. Signed-off-by: Shaveta Leekha Signed-off-by: Poonam Aggrwal --- board/freescale/b4860qds/b4860qds.c | 240 ++++++++++++++++++++++++++++ include/configs/B4860QDS.h | 11 ++ 2 files changed, 251 insertions(+) diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c index d9c88a074f8..b2d53781438 100644 --- a/board/freescale/b4860qds/b4860qds.c +++ b/board/freescale/b4860qds/b4860qds.c @@ -23,6 +23,7 @@ #include "../common/qixis.h" #include "../common/vsc3316_3308.h" #include "../common/idt8t49n222a_serdes_clk.h" +#include "../common/zm7300.h" #include "b4860qds.h" #include "b4860qds_qixis.h" #include "b4860qds_crossbar_con.h" @@ -94,6 +95,238 @@ int select_i2c_ch_pca(u8 ch) return 0; } +/* + * read_voltage from sensor on I2C bus + * We use average of 4 readings, waiting for 532us befor another reading + */ +#define WAIT_FOR_ADC 532 /* wait for 532 microseconds for ADC */ +#define NUM_READINGS 4 /* prefer to be power of 2 for efficiency */ + +static inline int read_voltage(void) +{ + int i, ret, voltage_read = 0; + u16 vol_mon; + + for (i = 0; i < NUM_READINGS; i++) { + ret = i2c_read(I2C_VOL_MONITOR_ADDR, + I2C_VOL_MONITOR_BUS_V_OFFSET, 1, (void *)&vol_mon, 2); + if (ret) { + printf("VID: failed to read core voltage\n"); + return ret; + } + if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) { + printf("VID: Core voltage sensor error\n"); + return -1; + } + debug("VID: bus voltage reads 0x%04x\n", vol_mon); + /* LSB = 4mv */ + voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4; + udelay(WAIT_FOR_ADC); + } + /* calculate the average */ + voltage_read /= NUM_READINGS; + + return voltage_read; +} + +static int adjust_vdd(ulong vdd_override) +{ + int re_enable = disable_interrupts(); + ccsr_gur_t __iomem *gur = + (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + u32 fusesr; + u8 vid; + int vdd_target, vdd_last; + int existing_voltage, temp_voltage, voltage; /* all in 1/10 mV */ + int ret; + unsigned int orig_i2c_speed; + unsigned long vdd_string_override; + char *vdd_string; + static const uint16_t vdd[32] = { + 0, /* unused */ + 9875, /* 0.9875V */ + 9750, + 9625, + 9500, + 9375, + 9250, + 9125, + 9000, + 8875, + 8750, + 8625, + 8500, + 8375, + 8250, + 8125, + 10000, /* 1.0000V */ + 10125, + 10250, + 10375, + 10500, + 10625, + 10750, + 10875, + 11000, + 0, /* reserved */ + }; + struct vdd_drive { + u8 vid; + unsigned voltage; + }; + + ret = select_i2c_ch_pca(I2C_MUX_CH_VOL_MONITOR); + if (ret) { + printf("VID: I2c failed to switch channel\n"); + ret = -1; + goto exit; + } + + /* get the voltage ID from fuse status register */ + fusesr = in_be32(&gur->dcfg_fusesr); + vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) & + FSL_CORENET_DCFG_FUSESR_VID_MASK; + if (vid == FSL_CORENET_DCFG_FUSESR_VID_MASK) { + vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) & + FSL_CORENET_DCFG_FUSESR_ALTVID_MASK; + } + vdd_target = vdd[vid]; + debug("VID:Reading from from fuse,vid=%x vdd is %dmV\n", + vid, vdd_target/10); + + /* check override variable for overriding VDD */ + vdd_string = getenv("b4qds_vdd_mv"); + if (vdd_override == 0 && vdd_string && + !strict_strtoul(vdd_string, 10, &vdd_string_override)) + vdd_override = vdd_string_override; + if (vdd_override >= 819 && vdd_override <= 1212) { + vdd_target = vdd_override * 10; /* convert to 1/10 mV */ + debug("VDD override is %lu\n", vdd_override); + } else if (vdd_override != 0) { + printf("Invalid value.\n"); + } + + if (vdd_target == 0) { + printf("VID: VID not used\n"); + ret = 0; + goto exit; + } + + /* + * Read voltage monitor to check real voltage. + * Voltage monitor LSB is 4mv. + */ + vdd_last = read_voltage(); + if (vdd_last < 0) { + printf("VID: abort VID adjustment\n"); + ret = -1; + goto exit; + } + + debug("VID: Core voltage is at %d mV\n", vdd_last); + ret = select_i2c_ch_pca(I2C_MUX_CH_DPM); + if (ret) { + printf("VID: I2c failed to switch channel to DPM\n"); + ret = -1; + goto exit; + } + + /* Round up to the value of step of Voltage regulator */ + voltage = roundup(vdd_target, ZM_STEP); + debug("VID: rounded up voltage = %d\n", voltage); + + /* lower the speed to 100kHz to access ZM7300 device */ + debug("VID: Setting bus speed to 100KHz if not already set\n"); + orig_i2c_speed = i2c_get_bus_speed(); + if (orig_i2c_speed != 100000) + i2c_set_bus_speed(100000); + + /* Read the existing level on board, if equal to requsted one, + no need to re-set */ + existing_voltage = zm_read_voltage(); + + /* allowing the voltage difference of one step 0.0125V acceptable */ + if ((existing_voltage >= voltage) && + (existing_voltage < (voltage + ZM_STEP))) { + debug("VID: voltage already set as requested,returning\n"); + ret = existing_voltage; + goto out; + } + debug("VID: Changing voltage for board from %dmV to %dmV\n", + existing_voltage/10, voltage/10); + + if (zm_disable_wp() < 0) { + ret = -1; + goto out; + } + /* Change Voltage: the change is done through all the steps in the + way, to avoid reset to the board due to power good signal fail + in big voltage change gap jump. + */ + if (existing_voltage > voltage) { + temp_voltage = existing_voltage - ZM_STEP; + while (temp_voltage >= voltage) { + ret = zm_write_voltage(temp_voltage); + if (ret == temp_voltage) { + temp_voltage -= ZM_STEP; + } else { + /* ZM7300 device failed to set + * the voltage */ + printf + ("VID:Stepping down vol failed:%dmV\n", + temp_voltage/10); + ret = -1; + goto out; + } + } + } else { + temp_voltage = existing_voltage + ZM_STEP; + while (temp_voltage < (voltage + ZM_STEP)) { + ret = zm_write_voltage(temp_voltage); + if (ret == temp_voltage) { + temp_voltage += ZM_STEP; + } else { + /* ZM7300 device failed to set + * the voltage */ + printf + ("VID:Stepping up vol failed:%dmV\n", + temp_voltage/10); + ret = -1; + goto out; + } + } + } + + if (zm_enable_wp() < 0) + ret = -1; + + /* restore the speed to 400kHz */ +out: debug("VID: Restore the I2C bus speed to %dKHz\n", + orig_i2c_speed/1000); + i2c_set_bus_speed(orig_i2c_speed); + if (ret < 0) + goto exit; + + ret = select_i2c_ch_pca(I2C_MUX_CH_VOL_MONITOR); + if (ret) { + printf("VID: I2c failed to switch channel\n"); + ret = -1; + goto exit; + } + vdd_last = read_voltage(); + select_i2c_ch_pca(I2C_CH_DEFAULT); + + if (vdd_last > 0) + printf("VID: Core voltage %d mV\n", vdd_last); + else + ret = -1; + +exit: + if (re_enable) + enable_interrupts(); + return ret; +} + int configure_vsc3316_3308(void) { ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -697,6 +930,13 @@ int board_early_init_r(void) #ifdef CONFIG_SYS_DPAA_QBMAN setup_portals(); #endif + /* + * Adjust core voltage according to voltage ID + * This function changes I2C mux to channel 2. + */ + if (adjust_vdd(0) < 0) + printf("Warning: Adjusting core voltage failed\n"); + /* SerDes1 refclks need to be set again, as default clks * are not suitable for CPRI and onboard SGMIIs to work * simultaneously. diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index df371b771d5..a6125568a2c 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -115,6 +115,17 @@ #define IDT_SERDES1_ADDRESS 0x6E #define IDT_SERDES2_ADDRESS 0x6C +/* Voltage monitor on channel 2*/ +#define I2C_MUX_CH_VOL_MONITOR 0xa +#define I2C_VOL_MONITOR_ADDR 0x40 +#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 +#define I2C_VOL_MONITOR_BUS_V_OVF 0x1 +#define I2C_VOL_MONITOR_BUS_V_SHIFT 3 + +#define CONFIG_ZM7300 +#define I2C_MUX_CH_DPM 0xa +#define I2C_DPM_ADDR 0x28 + #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_SYS_NO_FLASH From 0b2e13d9ccbe56e32dc674cf896b2fb55684368c Mon Sep 17 00:00:00 2001 From: Chunhe Lan Date: Mon, 14 Apr 2014 18:42:06 +0800 Subject: [PATCH 063/105] powerpc/85xx: Add T4240RDB board support T4240RDB board Specification ---------------------------- Memory subsystem: 6GB DDR3 128MB NOR flash 2GB NAND flash Ethernet: Eight 1G SGMII ports Four 10Gbps SFP+ ports PCIe: Two PCIe slots USB: Two USB2.0 Type A ports SDHC: One SD-card port SATA: One SATA port UART: Dual RJ45 ports Signed-off-by: Chunhe Lan [York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h] --- arch/powerpc/cpu/mpc85xx/t4240_ids.c | 2 + board/freescale/t4rdb/Makefile | 12 + board/freescale/t4rdb/ddr.c | 118 +++++ board/freescale/t4rdb/ddr.h | 78 +++ board/freescale/t4rdb/eth.c | 146 ++++++ board/freescale/t4rdb/law.c | 28 + board/freescale/t4rdb/pci.c | 23 + board/freescale/t4rdb/t4240rdb.c | 125 +++++ board/freescale/t4rdb/t4_pbi.cfg | 31 ++ board/freescale/t4rdb/t4_rcw.cfg | 7 + board/freescale/t4rdb/t4rdb.h | 18 + board/freescale/t4rdb/tlb.c | 111 ++++ boards.cfg | 1 + drivers/mmc/fsl_esdhc.c | 2 +- include/configs/T4240RDB.h | 752 +++++++++++++++++++++++++++ 15 files changed, 1453 insertions(+), 1 deletion(-) create mode 100644 board/freescale/t4rdb/Makefile create mode 100644 board/freescale/t4rdb/ddr.c create mode 100644 board/freescale/t4rdb/ddr.h create mode 100644 board/freescale/t4rdb/eth.c create mode 100644 board/freescale/t4rdb/law.c create mode 100644 board/freescale/t4rdb/pci.c create mode 100644 board/freescale/t4rdb/t4240rdb.c create mode 100644 board/freescale/t4rdb/t4_pbi.cfg create mode 100644 board/freescale/t4rdb/t4_rcw.cfg create mode 100644 board/freescale/t4rdb/t4rdb.h create mode 100644 board/freescale/t4rdb/tlb.c create mode 100644 include/configs/T4240RDB.h diff --git a/arch/powerpc/cpu/mpc85xx/t4240_ids.c b/arch/powerpc/cpu/mpc85xx/t4240_ids.c index f1813151346..1a3cb339874 100644 --- a/arch/powerpc/cpu/mpc85xx/t4240_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t4240_ids.c @@ -64,11 +64,13 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { }; #endif +#ifdef CONFIG_SYS_SRIO struct srio_liodn_id_table srio_liodn_tbl[] = { SET_SRIO_LIODN_BASE(1, 307), SET_SRIO_LIODN_BASE(2, 387), }; int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); +#endif struct liodn_id_table liodn_tbl[] = { #ifdef CONFIG_SYS_DPAA_QBMAN diff --git a/board/freescale/t4rdb/Makefile b/board/freescale/t4rdb/Makefile new file mode 100644 index 00000000000..f7f7fc01774 --- /dev/null +++ b/board/freescale/t4rdb/Makefile @@ -0,0 +1,12 @@ +# +# Copyright 2014 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_T4240RDB) += t4240rdb.o +obj-y += ddr.o +obj-y += eth.o +obj-$(CONFIG_PCI) += pci.o +obj-y += law.o +obj-y += tlb.o diff --git a/board/freescale/t4rdb/ddr.c b/board/freescale/t4rdb/ddr.c new file mode 100644 index 00000000000..5a43c1bc78f --- /dev/null +++ b/board/freescale/t4rdb/ddr.c @@ -0,0 +1,118 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include "ddr.h" + +DECLARE_GLOBAL_DATA_PTR; + +void fsl_ddr_board_options(memctl_options_t *popts, + dimm_params_t *pdimm, + unsigned int ctrl_num) +{ + const struct board_specific_parameters *pbsp, *pbsp_highest = NULL; + ulong ddr_freq; + + if (ctrl_num > 2) { + printf("Not supported controller number %d\n", ctrl_num); + return; + } + if (!pdimm->n_ranks) + return; + + /* + * we use identical timing for all slots. If needed, change the code + * to pbsp = rdimms[ctrl_num] or pbsp = udimms[ctrl_num]; + */ + if (popts->registered_dimm_en) + pbsp = rdimms[0]; + else + pbsp = udimms[0]; + + + /* Get clk_adjust, cpo, write_data_delay,2T, according to the board ddr + * freqency and n_banks specified in board_specific_parameters table. + */ + ddr_freq = get_ddr_freq(0) / 1000000; + while (pbsp->datarate_mhz_high) { + if (pbsp->n_ranks == pdimm->n_ranks && + (pdimm->rank_density >> 30) >= pbsp->rank_gb) { + if (ddr_freq <= pbsp->datarate_mhz_high) { + popts->clk_adjust = pbsp->clk_adjust; + popts->wrlvl_start = pbsp->wrlvl_start; + popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; + popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; + goto found; + } + pbsp_highest = pbsp; + } + pbsp++; + } + + if (pbsp_highest) { + printf("Error: board specific timing not found for data\n" + "rate %lu MT/s\n" + "Trying to use the highest speed (%u) parameters\n", + ddr_freq, pbsp_highest->datarate_mhz_high); + popts->clk_adjust = pbsp_highest->clk_adjust; + popts->wrlvl_start = pbsp_highest->wrlvl_start; + popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; + popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; + } else { + panic("DIMM is not supported by this board"); + } +found: + debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n" + "\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x,\n" + "wrlvl_ctrl_3 0x%x\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb, + pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2, + pbsp->wrlvl_ctl_3); + + /* + * Factors to consider for half-strength driver enable: + * - number of DIMMs installed + */ + popts->half_strength_driver_enable = 0; + /* + * Write leveling override + */ + popts->wrlvl_override = 1; + popts->wrlvl_sample = 0xf; + + /* + * Rtt and Rtt_WR override + */ + popts->rtt_override = 0; + + /* Enable ZQ calibration */ + popts->zq_en = 1; + + /* DHC_EN =1, ODT = 75 Ohm */ + popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm); + popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm); +} + +phys_size_t initdram(int board_type) +{ + phys_size_t dram_size; + + puts("Initializing....using SPD\n"); + + dram_size = fsl_ddr_sdram(); + + dram_size = setup_ddr_tlbs(dram_size / 0x100000); + dram_size *= 0x100000; + + puts(" DDR: "); + return dram_size; +} diff --git a/board/freescale/t4rdb/ddr.h b/board/freescale/t4rdb/ddr.h new file mode 100644 index 00000000000..7b854767e7a --- /dev/null +++ b/board/freescale/t4rdb/ddr.h @@ -0,0 +1,78 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DDR_H__ +#define __DDR_H__ +struct board_specific_parameters { + u32 n_ranks; + u32 datarate_mhz_high; + u32 rank_gb; + u32 clk_adjust; + u32 wrlvl_start; + u32 wrlvl_ctl_2; + u32 wrlvl_ctl_3; +}; + +/* + * These tables contain all valid speeds we want to override with board + * specific parameters. datarate_mhz_high values need to be in ascending order + * for each n_ranks group. + */ +static const struct board_specific_parameters udimm0[] = { + /* + * memory controller 0 + * num| hi| rank| clk| wrlvl | wrlvl | wrlvl + * ranks| mhz| GB |adjst| start | ctl2 | ctl3 + */ + {2, 1350, 4, 4, 8, 0x0809090b, 0x0c0c0d0a}, + {2, 1350, 0, 5, 7, 0x0709090b, 0x0c0c0d09}, + {2, 1666, 4, 4, 8, 0x080a0a0d, 0x0d10100b}, + {2, 1666, 0, 5, 7, 0x080a0a0c, 0x0d0d0e0a}, + {2, 1900, 0, 4, 8, 0x090a0b0e, 0x0f11120c}, + {2, 2140, 0, 4, 8, 0x090a0b0e, 0x0f11120c}, + {1, 1350, 0, 5, 8, 0x0809090b, 0x0c0c0d0a}, + {1, 1700, 0, 5, 8, 0x080a0a0c, 0x0c0d0e0a}, + {1, 1900, 0, 4, 8, 0x080a0a0c, 0x0e0e0f0a}, + {1, 2140, 0, 4, 8, 0x090a0b0c, 0x0e0f100b}, + {} +}; + +static const struct board_specific_parameters rdimm0[] = { + /* + * memory controller 0 + * num| hi| rank| clk| wrlvl | wrlvl | wrlvl + * ranks| mhz| GB |adjst| start | ctl2 | ctl3 + */ + {4, 1350, 0, 5, 9, 0x08070605, 0x06070806}, + {4, 1666, 0, 5, 11, 0x0a080706, 0x07090906}, + {4, 2140, 0, 5, 12, 0x0b090807, 0x080a0b07}, + {2, 1350, 0, 5, 9, 0x08070605, 0x06070806}, + {2, 1666, 0, 5, 11, 0x0a090806, 0x08090a06}, + {2, 2140, 0, 5, 12, 0x0b090807, 0x080a0b07}, + {1, 1350, 0, 5, 9, 0x08070605, 0x06070806}, + {1, 1666, 0, 5, 11, 0x0a090806, 0x08090a06}, + {1, 2140, 0, 4, 12, 0x0b090807, 0x080a0b07}, + {} +}; + +/* + * The three slots have slightly different timing. The center values are good + * for all slots. We use identical speed tables for them. In future use, if + * DIMMs require separated tables, make more entries as needed. + */ +static const struct board_specific_parameters *udimms[] = { + udimm0, +}; + +/* + * The three slots have slightly different timing. See comments above. + */ +static const struct board_specific_parameters *rdimms[] = { + rdimm0, +}; + + +#endif diff --git a/board/freescale/t4rdb/eth.c b/board/freescale/t4rdb/eth.c new file mode 100644 index 00000000000..d220475b5a8 --- /dev/null +++ b/board/freescale/t4rdb/eth.c @@ -0,0 +1,146 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * Chunhe Lan + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../common/fman.h" +#include "t4rdb.h" + +void fdt_fixup_board_enet(void *fdt) +{ + return; +} + +int board_eth_init(bd_t *bis) +{ +#if defined(CONFIG_FMAN_ENET) + int i, interface; + struct memac_mdio_info dtsec_mdio_info; + struct memac_mdio_info tgec_mdio_info; + struct mii_dev *dev; + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + u32 srds_prtcl_s1, srds_prtcl_s2; + + srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) & + FSL_CORENET2_RCWSR4_SRDS1_PRTCL; + srds_prtcl_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; + srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) & + FSL_CORENET2_RCWSR4_SRDS2_PRTCL; + srds_prtcl_s2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT; + + dtsec_mdio_info.regs = + (struct memac_mdio_controller *)CONFIG_SYS_FM2_DTSEC_MDIO_ADDR; + + dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME; + + /* Register the 1G MDIO bus */ + fm_memac_mdio_init(bis, &dtsec_mdio_info); + + tgec_mdio_info.regs = + (struct memac_mdio_controller *)CONFIG_SYS_FM2_TGEC_MDIO_ADDR; + tgec_mdio_info.name = DEFAULT_FM_TGEC_MDIO_NAME; + + /* Register the 10G MDIO bus */ + fm_memac_mdio_init(bis, &tgec_mdio_info); + + if (srds_prtcl_s1 == 28) { + /* SGMII */ + fm_info_set_phy_address(FM1_DTSEC1, SGMII_PHY_ADDR1); + fm_info_set_phy_address(FM1_DTSEC2, SGMII_PHY_ADDR2); + fm_info_set_phy_address(FM1_DTSEC3, SGMII_PHY_ADDR3); + fm_info_set_phy_address(FM1_DTSEC4, SGMII_PHY_ADDR4); + } else { + puts("Invalid SerDes1 protocol for T4240RDB\n"); + } + + for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) { + interface = fm_info_get_enet_if(i); + switch (interface) { + case PHY_INTERFACE_MODE_SGMII: + dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); + fm_info_set_mdio(i, dev); + break; + default: + break; + } + } + + for (i = FM1_10GEC1; i < FM1_10GEC1 + CONFIG_SYS_NUM_FM1_10GEC; i++) { + switch (fm_info_get_enet_if(i)) { + case PHY_INTERFACE_MODE_XGMII: + dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME); + fm_info_set_mdio(i, dev); + break; + default: + break; + } + } + +#if (CONFIG_SYS_NUM_FMAN == 2) + if (srds_prtcl_s2 == 56) { + /* SGMII && XFI */ + fm_info_set_phy_address(FM2_DTSEC1, SGMII_PHY_ADDR5); + fm_info_set_phy_address(FM2_DTSEC2, SGMII_PHY_ADDR6); + fm_info_set_phy_address(FM2_DTSEC3, SGMII_PHY_ADDR7); + fm_info_set_phy_address(FM2_DTSEC4, SGMII_PHY_ADDR8); + fm_info_set_phy_address(FM1_10GEC1, FM1_10GEC1_PHY_ADDR); + fm_info_set_phy_address(FM1_10GEC2, FM1_10GEC2_PHY_ADDR); + fm_info_set_phy_address(FM2_10GEC1, FM2_10GEC2_PHY_ADDR); + fm_info_set_phy_address(FM2_10GEC2, FM2_10GEC1_PHY_ADDR); + } else { + puts("Invalid SerDes2 protocol for T4240RDB\n"); + } + + for (i = FM2_DTSEC1; i < FM2_DTSEC1 + CONFIG_SYS_NUM_FM2_DTSEC; i++) { + interface = fm_info_get_enet_if(i); + switch (interface) { + case PHY_INTERFACE_MODE_SGMII: + dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); + fm_info_set_mdio(i, dev); + break; + default: + break; + } + } + + for (i = FM2_10GEC1; i < FM2_10GEC1 + CONFIG_SYS_NUM_FM2_10GEC; i++) { + switch (fm_info_get_enet_if(i)) { + case PHY_INTERFACE_MODE_XGMII: + dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME); + fm_info_set_mdio(i, dev); + break; + default: + break; + } + } +#endif /* CONFIG_SYS_NUM_FMAN */ + + cpu_eth_init(bis); +#endif /* CONFIG_FMAN_ENET */ + + return pci_eth_init(bis); +} diff --git a/board/freescale/t4rdb/law.c b/board/freescale/t4rdb/law.c new file mode 100644 index 00000000000..1f5876885c0 --- /dev/null +++ b/board/freescale/t4rdb/law.c @@ -0,0 +1,28 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +struct law_entry law_table[] = { + SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC), +#ifdef CONFIG_SYS_BMAN_MEM_PHYS + SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN), +#endif +#ifdef CONFIG_SYS_QMAN_MEM_PHYS + SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN), +#endif +#ifdef CONFIG_SYS_DCSRBAR_PHYS + /* Limit DCSR to 32M to access NPC Trace Buffer */ + SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR), +#endif +#ifdef CONFIG_SYS_NAND_BASE_PHYS + SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC), +#endif +}; + +int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/freescale/t4rdb/pci.c b/board/freescale/t4rdb/pci.c new file mode 100644 index 00000000000..6387a20caec --- /dev/null +++ b/board/freescale/t4rdb/pci.c @@ -0,0 +1,23 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include + +void pci_init_board(void) +{ + fsl_pcie_init_board(0); +} + +void pci_of_setup(void *blob, bd_t *bd) +{ + FT_FSL_PCI_SETUP; +} diff --git a/board/freescale/t4rdb/t4240rdb.c b/board/freescale/t4rdb/t4240rdb.c new file mode 100644 index 00000000000..5448c86c482 --- /dev/null +++ b/board/freescale/t4rdb/t4240rdb.c @@ -0,0 +1,125 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "t4rdb.h" + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + struct cpu_type *cpu = gd->arch.cpu; + + printf("Board: %sRDB, ", cpu->name); + + puts("SERDES Reference Clocks:\n"); + printf(" SERDES1=100MHz SERDES2=156.25MHz\n" + " SERDES3=100MHz SERDES4=100MHz\n"); + + return 0; +} + +int board_early_init_r(void) +{ + const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; + const u8 flash_esel = find_tlb_idx((void *)flashbase, 1); + + /* + * Remap Boot flash + PROMJET region to caching-inhibited + * so that flash can be erased properly. + */ + + /* Flush d-cache and invalidate i-cache of any FLASH data */ + flush_dcache(); + invalidate_icache(); + + /* invalidate existing TLB entry for flash + promjet */ + disable_tlb(flash_esel); + + set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, flash_esel, BOOKE_PAGESZ_256M, 1); + + set_liodns(); +#ifdef CONFIG_SYS_DPAA_QBMAN + setup_portals(); +#endif + + return 0; +} + +int misc_init_r(void) +{ + return 0; +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + phys_addr_t base; + phys_size_t size; + + ft_cpu_setup(blob, bd); + + base = getenv_bootm_low(); + size = getenv_bootm_size(); + + fdt_fixup_memory(blob, (u64)base, (u64)size); + +#ifdef CONFIG_PCI + pci_of_setup(blob, bd); +#endif + + fdt_fixup_liodn(blob); + fdt_fixup_dr_usb(blob, bd); + +#ifdef CONFIG_SYS_DPAA_FMAN + fdt_fixup_fman_ethernet(blob); + fdt_fixup_board_enet(blob); +#endif +} + +/* + * This function is called by bdinfo to print detail board information. + * As an exmaple for future board, we organize the messages into + * several sections. If applicable, the message is in the format of + * = + * It should aligned with normal output of bdinfo command. + * + * Voltage: Core, DDR and another configurable voltages + * Clock : Critical clocks which are not printed already + * RCW : RCW source if not printed already + * Misc : Other important information not in above catagories + */ +void board_detail(void) +{ + int rcwsrc; + + /* RCW section SW3[4] */ + rcwsrc = 0x0; + puts("RCW source = "); + switch (rcwsrc & 0x1) { + case 0x1: + puts("SDHC/eMMC\n"); + break; + default: + puts("I2C normal addressing\n"); + break; + } +} diff --git a/board/freescale/t4rdb/t4_pbi.cfg b/board/freescale/t4rdb/t4_pbi.cfg new file mode 100644 index 00000000000..c9f8ced2a3b --- /dev/null +++ b/board/freescale/t4rdb/t4_pbi.cfg @@ -0,0 +1,31 @@ +# +# Copyright 2014 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +#PBI commands +#Initialize CPC1 +09010000 00200400 +09138000 00000000 +091380c0 00000100 +#512KB SRAM +09010100 00000000 +09010104 fff80009 +09010f00 08000000 +#enable CPC1 +09010000 80000000 +#Configure LAW for CPC1 +09000d00 00000000 +09000d04 fff80000 +09000d08 81000012 +#slow mdio clock +095fc030 00008148 +095fd030 00808148 +#Configure alternate space +09000010 00000000 +09000014 ff000000 +09000018 81000000 +#Flush PBL data +09138000 00000000 +091380c0 00000000 diff --git a/board/freescale/t4rdb/t4_rcw.cfg b/board/freescale/t4rdb/t4_rcw.cfg new file mode 100644 index 00000000000..13408bd01fb --- /dev/null +++ b/board/freescale/t4rdb/t4_rcw.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 010e0100 +#serdes protocol 28_56_2_10 +16070019 18101916 00000000 00000000 +70701050 00448c00 6c020000 f5000000 +00000000 ee0000ee 00000000 000287fc +00000000 50000000 00000000 00000028 diff --git a/board/freescale/t4rdb/t4rdb.h b/board/freescale/t4rdb/t4rdb.h new file mode 100644 index 00000000000..fb25d43291e --- /dev/null +++ b/board/freescale/t4rdb/t4rdb.h @@ -0,0 +1,18 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __T4RDB_H__ +#define __T4RDB_H__ + +#undef CONFIG_SYS_NUM_FM1_DTSEC +#undef CONFIG_SYS_NUM_FM2_DTSEC +#define CONFIG_SYS_NUM_FM1_DTSEC 4 +#define CONFIG_SYS_NUM_FM2_DTSEC 4 + +void fdt_fixup_board_enet(void *blob); +void pci_of_setup(void *blob, bd_t *bd); + +#endif diff --git a/board/freescale/t4rdb/tlb.c b/board/freescale/t4rdb/tlb.c new file mode 100644 index 00000000000..4b50bcd09b0 --- /dev/null +++ b/board/freescale/t4rdb/tlb.c @@ -0,0 +1,111 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +struct fsl_e_tlb_entry tlb_table[] = { + /* TLB 0 - for temp stack in cache */ + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, + CONFIG_SYS_INIT_RAM_ADDR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, + CONFIG_SYS_INIT_RAM_ADDR_PHYS + 4 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, + CONFIG_SYS_INIT_RAM_ADDR_PHYS + 8 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, + CONFIG_SYS_INIT_RAM_ADDR_PHYS + 12 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + + /* TLB 1 */ + /* *I*** - Covers boot page */ +#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR) + /* + * *I*G - L3SRAM. When L3 is used as 512K SRAM */ + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L3_ADDR, CONFIG_SYS_INIT_L3_ADDR, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 0, BOOKE_PAGESZ_512K, 1), +#else + SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 0, BOOKE_PAGESZ_4K, 1), +#endif + + /* *I*G* - CCSRBAR */ + SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 1, BOOKE_PAGESZ_16M, 1), + + /* *I*G* - Flash, localbus */ + /* This will be changed to *I*G* after relocation to RAM. */ + SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS, + MAS3_SX|MAS3_SR, MAS2_W|MAS2_G, + 0, 2, BOOKE_PAGESZ_256M, 1), + + /* *I*G* - PCI */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 3, BOOKE_PAGESZ_1G, 1), + + /* *I*G* - PCI */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x40000000, + CONFIG_SYS_PCIE1_MEM_PHYS + 0x40000000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 4, BOOKE_PAGESZ_256M, 1), + + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x50000000, + CONFIG_SYS_PCIE1_MEM_PHYS + 0x50000000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 5, BOOKE_PAGESZ_256M, 1), + + /* *I*G* - PCI I/O */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 6, BOOKE_PAGESZ_256K, 1), + + /* Bman/Qman */ +#ifdef CONFIG_SYS_BMAN_MEM_PHYS + SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE, CONFIG_SYS_BMAN_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 9, BOOKE_PAGESZ_16M, 1), + SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE + 0x01000000, + CONFIG_SYS_BMAN_MEM_PHYS + 0x01000000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 10, BOOKE_PAGESZ_16M, 1), +#endif +#ifdef CONFIG_SYS_QMAN_MEM_PHYS + SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE, CONFIG_SYS_QMAN_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 11, BOOKE_PAGESZ_16M, 1), + SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE + 0x01000000, + CONFIG_SYS_QMAN_MEM_PHYS + 0x01000000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 12, BOOKE_PAGESZ_16M, 1), +#endif +#ifdef CONFIG_SYS_DCSRBAR_PHYS + SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 13, BOOKE_PAGESZ_32M, 1), +#endif +#ifdef CONFIG_SYS_NAND_BASE + /* + * *I*G - NAND + * entry 14 and 15 has been used hard coded, they will be disabled + * in cpu_init_f, so we use entry 16 for nand. + */ + SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 16, BOOKE_PAGESZ_64K, 1), +#endif +}; + +int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/boards.cfg b/boards.cfg index 9d90550794c..b7c6da95a29 100644 --- a/boards.cfg +++ b/boards.cfg @@ -983,6 +983,7 @@ Active powerpc mpc85xx - freescale t4qds Active powerpc mpc85xx - freescale t4qds T4240QDS_SECURE_BOOT T4240QDS:PPC_T4240,SECURE_BOOT Aneesh Bansal Active powerpc mpc85xx - freescale t4qds T4240QDS_SPIFLASH T4240QDS:PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - Active powerpc mpc85xx - freescale t4qds T4240QDS_SRIO_PCIE_BOOT T4240QDS:PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale t4rdb T4240RDB T4240RDB:PPC_T4240 Chunhe Lan Active powerpc mpc85xx - gdsys p1022 controlcenterd_36BIT_SDCARD controlcenterd:36BIT,SDCARD Dirk Eibach Active powerpc mpc85xx - gdsys p1022 controlcenterd_36BIT_SDCARD_DEVELOP controlcenterd:36BIT,SDCARD,DEVELOP Dirk Eibach Active powerpc mpc85xx - gdsys p1022 controlcenterd_TRAILBLAZER controlcenterd:TRAILBLAZER,SPIFLASH Dirk Eibach diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 4c3b93d413d..50cba64d99a 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -96,7 +96,7 @@ static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data) else if (cmd->resp_type & MMC_RSP_PRESENT) xfertyp |= XFERTYP_RSPTYP_48; -#if defined(CONFIG_MX53) || defined(CONFIG_T4240QDS) +#if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) xfertyp |= XFERTYP_CMDTYP_ABORT; #endif diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h new file mode 100644 index 00000000000..b1a8053a539 --- /dev/null +++ b/include/configs/T4240RDB.h @@ -0,0 +1,752 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * T4240 RDB board configuration file + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_T4240RDB +#define CONFIG_PHYS_64BIT + +#define CONFIG_FSL_SATA_V2 +#define CONFIG_PCIE4 + +#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ + +#ifdef CONFIG_RAMBOOT_PBL +#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t4rdb/t4_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t4rdb/t4_rcw.cfg +#endif + +#define CONFIG_DDR_ECC + +#define CONFIG_CMD_REGINFO + +/* High Level Configuration Options */ +#define CONFIG_BOOKE +#define CONFIG_E500 /* BOOKE e500 family */ +#define CONFIG_E500MC /* BOOKE e500mc family */ +#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ +#define CONFIG_MP /* support multiple processors */ + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff40000 +#endif + +#ifndef CONFIG_RESET_VECTOR_ADDRESS +#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#endif + +#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ +#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_FSL_IFC /* Enable IFC Support */ +#define CONFIG_PCI /* Enable PCI/PCIE */ +#define CONFIG_PCIE1 /* PCIE controler 1 */ +#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ +#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ + +#define CONFIG_FSL_LAW /* Use common FSL init code */ + +#define CONFIG_ENV_OVERWRITE + +/* + * These can be toggled for performance analysis, otherwise use default. + */ +#define CONFIG_SYS_CACHE_STASHING +#define CONFIG_BTB /* toggle branch predition */ +#ifdef CONFIG_DDR_ECC +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER +#define CONFIG_MEM_INIT_VALUE 0xdeadbeef +#endif + +#define CONFIG_ENABLE_36BIT_PHYS + +#define CONFIG_ADDR_MAP +#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ + +#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00400000 +#define CONFIG_SYS_ALT_MEMTEST +#define CONFIG_PANIC_HANG /* do not reset board on panic */ + +/* + * Config the L3 Cache as L3 SRAM + */ +#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE + +#define CONFIG_SYS_DCSRBAR 0xf0000000 +#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull + +/* + * DDR Setup + */ +#define CONFIG_VERY_BIG_RAM +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE + +/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */ +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL 4 +#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE + +#define CONFIG_DDR_SPD +#define CONFIG_SYS_FSL_DDR3 + + +/* + * IFC Definitions + */ +#define CONFIG_SYS_FLASH_BASE 0xe0000000 +#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) + + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_HWCONFIG + +/* define to use L1 as initial stack */ +#define CONFIG_L1_INIT_RAM +#define CONFIG_SYS_INIT_RAM_LOCK +#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000 +/* The assembler doesn't like typecast */ +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ + ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 + +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) + +/* Serial Port - controlled on board with jumper J8 + * open - index 2 + * shorted - index 1 + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) + +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} + +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) +#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) +#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) +#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) + +/* Use the HUSH parser */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP +#define CONFIG_OF_STDOUT_VIA_ALIAS + +/* new uImage format support */ +#define CONFIG_FIT +#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ + +/* I2C */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 + +/* + * General PCI + * Memory space is mapped 1-1, but I/O space must start from 0. + */ + +/* controller 1, direct to uli, tgtid 3, Base address 20000 */ +#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ + +/* controller 2, Slot 2, tgtid 2, Base address 201000 */ +#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ + +/* controller 3, Slot 1, tgtid 1, Base address 202000 */ +#define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 +#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull +#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 +#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull +#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ + +/* controller 4, Base address 203000 */ +#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull +#define CONFIG_SYS_PCIE4_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull +#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ + +#ifdef CONFIG_PCI +#define CONFIG_PCI_INDIRECT_BRIDGE +#define CONFIG_NET_MULTI +#define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_E1000 + +#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ +#define CONFIG_DOS_PARTITION +#endif /* CONFIG_PCI */ + +/* SATA */ +#ifdef CONFIG_FSL_SATA_V2 +#define CONFIG_LIBATA +#define CONFIG_FSL_SATA + +#define CONFIG_SYS_SATA_MAX_DEVICE 2 +#define CONFIG_SATA1 +#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR +#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA +#define CONFIG_SATA2 +#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR +#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA + +#define CONFIG_LBA48 +#define CONFIG_CMD_SATA +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2 +#endif + +#ifdef CONFIG_FMAN_ENET +#define CONFIG_MII /* MII PHY management */ +#define CONFIG_ETHPRIME "FM1@DTSEC1" +#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ +#endif + +/* + * Environment + */ +#define CONFIG_LOADS_ECHO /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ELF +#define CONFIG_CMD_ERRATA +#define CONFIG_CMD_GREPENV +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SETEXPR + +#ifdef CONFIG_PCI +#define CONFIG_CMD_PCI +#define CONFIG_CMD_NET +#endif + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_CMDLINE_EDITING /* Command-line editing */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ +#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ +#ifdef CONFIG_CMD_KGDB +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 64 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ + +#ifdef CONFIG_CMD_KGDB +#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ +#endif + +/* + * Environment Configuration + */ +#define CONFIG_ROOTPATH "/opt/nfsroot" +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ + +/* default location for tftp and bootm */ +#define CONFIG_LOADADDR 1000000 + + +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_HVBOOT \ + "setenv bootargs config-addr=0x60000000; " \ + "bootm 0x01000000 - 0x00f00000" + +#ifdef CONFIG_SYS_NO_FLASH +#ifndef CONFIG_RAMBOOT_PBL +#define CONFIG_ENV_IS_NOWHERE +#endif +#else +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#endif + +#if defined(CONFIG_SPIFLASH) +#define CONFIG_SYS_EXTRA_ENV_RELOC +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 10000000 +#define CONFIG_ENV_SPI_MODE 0 +#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ +#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ +#define CONFIG_ENV_SECT_SIZE 0x10000 +#elif defined(CONFIG_SDCARD) +#define CONFIG_SYS_EXTRA_ENV_RELOC +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_OFFSET (512 * 1658) +#elif defined(CONFIG_NAND) +#define CONFIG_SYS_EXTRA_ENV_RELOC +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE +#define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_ENV_IS_NOWHERE) +#define CONFIG_ENV_SIZE 0x2000 +#else +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ +#endif + +#define CONFIG_SYS_CLK_FREQ 66666666 +#define CONFIG_DDR_CLK_FREQ 133333333 + +#ifndef __ASSEMBLY__ +unsigned long get_board_sys_clk(void); +unsigned long get_board_ddr_clk(void); +#endif + +/* + * DDR Setup + */ +#define CONFIG_SYS_SPD_BUS_NUM 0 +#define SPD_EEPROM_ADDRESS1 0x52 +#define SPD_EEPROM_ADDRESS2 0x54 +#define SPD_EEPROM_ADDRESS3 0x56 +#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 /* for p3041/p5010 */ +#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ + +/* + * IFC Definitions + */ +#define CONFIG_SYS_NOR0_CSPR_EXT (0xf) +#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS \ + + 0x8000000) | \ + CSPR_PORT_SIZE_16 | \ + CSPR_MSEL_NOR | \ + CSPR_V) +#define CONFIG_SYS_NOR1_CSPR_EXT (0xf) +#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ + CSPR_PORT_SIZE_16 | \ + CSPR_MSEL_NOR | \ + CSPR_V) +#define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) +/* NOR Flash Timing Params */ +#define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80 + +#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ + FTIM0_NOR_TEADC(0x5) | \ + FTIM0_NOR_TEAHC(0x5)) +#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \ + FTIM1_NOR_TRAD_NOR(0x1A) |\ + FTIM1_NOR_TSEQRAD_NOR(0x13)) +#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \ + FTIM2_NOR_TCH(0x4) | \ + FTIM2_NOR_TWPH(0x0E) | \ + FTIM2_NOR_TWP(0x1c)) +#define CONFIG_SYS_NOR_FTIM3 0x0 + +#define CONFIG_SYS_FLASH_QUIET_TEST +#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ + +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ + +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS \ + + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} + +/* NAND Flash on IFC */ +#define CONFIG_NAND_FSL_IFC +#define CONFIG_SYS_NAND_MAX_ECCPOS 256 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 +#define CONFIG_SYS_NAND_BASE 0xff800000 +#define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) + +#define CONFIG_SYS_NAND_CSPR_EXT (0xf) +#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ + | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ + | CSPR_MSEL_NAND /* MSEL = NAND */ \ + | CSPR_V) +#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) + +#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ + | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ + | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ + | CSOR_NAND_RAL_3 /* RAL = 2Byes */ \ + | CSOR_NAND_PGS_4K /* Page Size = 4K */ \ + | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ + | CSOR_NAND_PB(128)) /*Page Per Block = 128*/ + +#define CONFIG_SYS_NAND_ONFI_DETECTION + +/* ONFI NAND Flash mode0 Timing Params */ +#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ + FTIM0_NAND_TWP(0x18) | \ + FTIM0_NAND_TWCHT(0x07) | \ + FTIM0_NAND_TWH(0x0a)) +#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ + FTIM1_NAND_TWBE(0x39) | \ + FTIM1_NAND_TRR(0x0e) | \ + FTIM1_NAND_TRP(0x18)) +#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ + FTIM2_NAND_TREH(0x0a) | \ + FTIM2_NAND_TWHRE(0x1e)) +#define CONFIG_SYS_NAND_FTIM3 0x0 + +#define CONFIG_SYS_NAND_DDR_LAW 11 +#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_MTD_NAND_VERIFY_WRITE +#define CONFIG_CMD_NAND + +#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) + +#if defined(CONFIG_NAND) +#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR0_CSPR_EXT +#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR0_CSPR +#define CONFIG_SYS_AMASK2 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR2 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NOR_FTIM3 +#else +#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT +#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR +#define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 +#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR1 CONFIG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK1 CONFIG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR1 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 +#endif +#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR1_CSPR_EXT +#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR1_CSPR +#define CONFIG_SYS_AMASK2 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR2 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NOR_FTIM3 + +#if defined(CONFIG_RAMBOOT_PBL) +#define CONFIG_SYS_RAMBOOT +#endif + + +/* I2C */ +#define CONFIG_SYS_FSL_I2C_SPEED 100000 /* I2C speed */ +#define CONFIG_SYS_FSL_I2C2_SPEED 100000 /* I2C2 speed */ +#define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */ +#define I2C_MUX_PCA_ADDR_SEC 0x76 /* I2C bus multiplexer,secondary */ + +#define I2C_MUX_CH_DEFAULT 0x8 +#define I2C_MUX_CH_VOL_MONITOR 0xa +#define I2C_MUX_CH_VSC3316_FS 0xc +#define I2C_MUX_CH_VSC3316_BS 0xd + +/* Voltage monitor on channel 2*/ +#define I2C_VOL_MONITOR_ADDR 0x40 +#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 +#define I2C_VOL_MONITOR_BUS_V_OVF 0x1 +#define I2C_VOL_MONITOR_BUS_V_SHIFT 3 + +/* + * eSPI - Enhanced SPI + */ +#define CONFIG_FSL_ESPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED 10000000 +#define CONFIG_SF_DEFAULT_MODE 0 + + +/* Qman/Bman */ +#ifndef CONFIG_NOBQFMAN +#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ +#define CONFIG_SYS_BMAN_NUM_PORTALS 50 +#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 +#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull +#define CONFIG_SYS_BMAN_MEM_SIZE 0x02000000 +#define CONFIG_SYS_QMAN_NUM_PORTALS 50 +#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 +#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull +#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 + +#define CONFIG_SYS_DPAA_FMAN +#define CONFIG_SYS_DPAA_PME +#define CONFIG_SYS_PMAN +#define CONFIG_SYS_DPAA_DCE +#define CONFIG_SYS_DPAA_RMAN +#define CONFIG_SYS_INTERLAKEN + +/* Default address of microcode for the Linux Fman driver */ +#if defined(CONFIG_SPIFLASH) +/* + * env is stored at 0x100000, sector size is 0x10000, ucode is stored after + * env, so we got 0x110000. + */ +#define CONFIG_SYS_QE_FW_IN_SPIFLASH +#define CONFIG_SYS_FMAN_FW_ADDR 0x110000 +#elif defined(CONFIG_SDCARD) +/* + * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is + * about 825KB (1650 blocks), Env is stored after the image, and the env size is + * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. + */ +#define CONFIG_SYS_QE_FMAN_FW_IN_MMC +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) +#elif defined(CONFIG_NAND) +#define CONFIG_SYS_QE_FMAN_FW_IN_NAND +#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) +#else +#define CONFIG_SYS_QE_FMAN_FW_IN_NOR +#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 +#endif +#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 +#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) +#endif /* CONFIG_NOBQFMAN */ + +#ifdef CONFIG_SYS_DPAA_FMAN +#define CONFIG_FMAN_ENET +#define CONFIG_PHYLIB_10G +#define CONFIG_PHY_VITESSE +#define CONFIG_PHY_CORTINA +#define CONFIG_CORTINA_FW_ADDR 0xefe00000 +#define CONFIG_CORTINA_FW_LENGTH 0x40000 +#define CONFIG_PHY_TERANETICS +#define SGMII_PHY_ADDR1 0x0 +#define SGMII_PHY_ADDR2 0x1 +#define SGMII_PHY_ADDR3 0x2 +#define SGMII_PHY_ADDR4 0x3 +#define SGMII_PHY_ADDR5 0x4 +#define SGMII_PHY_ADDR6 0x5 +#define SGMII_PHY_ADDR7 0x6 +#define SGMII_PHY_ADDR8 0x7 +#define FM1_10GEC1_PHY_ADDR 0x10 +#define FM1_10GEC2_PHY_ADDR 0x11 +#define FM2_10GEC1_PHY_ADDR 0x12 +#define FM2_10GEC2_PHY_ADDR 0x13 +#define CORTINA_PHY_ADDR1 FM1_10GEC1_PHY_ADDR +#define CORTINA_PHY_ADDR2 FM1_10GEC2_PHY_ADDR +#define CORTINA_PHY_ADDR3 FM2_10GEC1_PHY_ADDR +#define CORTINA_PHY_ADDR4 FM2_10GEC2_PHY_ADDR +#endif + + +/* SATA */ +#ifdef CONFIG_FSL_SATA_V2 +#define CONFIG_LIBATA +#define CONFIG_FSL_SATA + +#define CONFIG_SYS_SATA_MAX_DEVICE 2 +#define CONFIG_SATA1 +#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR +#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA +#define CONFIG_SATA2 +#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR +#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA + +#define CONFIG_LBA48 +#define CONFIG_CMD_SATA +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2 +#endif + +#ifdef CONFIG_FMAN_ENET +#define CONFIG_MII /* MII PHY management */ +#define CONFIG_ETHPRIME "FM1@DTSEC1" +#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ +#endif + +/* +* USB +*/ +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_CMD_EXT2 +#define CONFIG_HAS_FSL_DR_USB + +#define CONFIG_MMC + +#ifdef CONFIG_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#endif + +#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ + +#define __USB_PHY_TYPE utmi + +/* + * T4240 has 3 DDR controllers. Default to 3-way interleaving. It can be + * 3way_1KB, 3way_4KB, 3way_8KB. T4160 has 2 DDR controllers. Default to 2-way + * interleaving. It can be cacheline, page, bank, superbank. + * See doc/README.fsl-ddr for details. + */ +#define CTRL_INTLV_PREFERED 3way_4KB + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hwconfig=fsl_ddr:" \ + "ctlr_intlv=" __stringify(CTRL_INTLV_PREFERED) "," \ + "bank_intlv=auto;" \ + "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ + "netdev=eth0\0" \ + "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ + "tftpflash=tftpboot $loadaddr $uboot && " \ + "protect off $ubootaddr +$filesize && " \ + "erase $ubootaddr +$filesize && " \ + "cp.b $loadaddr $ubootaddr $filesize && " \ + "protect on $ubootaddr +$filesize && " \ + "cmp.b $loadaddr $ubootaddr $filesize\0" \ + "consoledev=ttyS0\0" \ + "ramdiskaddr=2000000\0" \ + "ramdiskfile=t4240rdb/ramdisk.uboot\0" \ + "fdtaddr=c00000\0" \ + "fdtfile=t4240rdb/t4240rdb.dtb\0" \ + "bdev=sda3\0" + +#define CONFIG_HVBOOT \ + "setenv bootargs config-addr=0x60000000; " \ + "bootm 0x01000000 - 0x00f00000" + +#define CONFIG_LINUX \ + "setenv bootargs root=/dev/ram rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "setenv ramdiskaddr 0x02000000;" \ + "setenv fdtaddr 0x00c00000;" \ + "setenv loadaddr 0x1000000;" \ + "bootm $loadaddr $ramdiskaddr $fdtaddr" + +#define CONFIG_HDBOOT \ + "setenv bootargs root=/dev/$bdev rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" + +#define CONFIG_NFSBOOTCOMMAND \ + "setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$serverip:$rootpath " \ + "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" + +#define CONFIG_RAMBOOTCOMMAND \ + "setenv bootargs root=/dev/ram rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $ramdiskaddr $ramdiskfile;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr $ramdiskaddr $fdtaddr" + +#define CONFIG_BOOTCOMMAND CONFIG_LINUX + +#include + +#ifdef CONFIG_SECURE_BOOT +/* Secure Boot target was not getting build for T4240 because of + * increased binary size. So the size is being reduced by removing USB + * which is anyways not used in Secure Environment. + */ +#undef CONFIG_CMD_USB +#endif + +#endif /* __CONFIG_H */ From 4067815998a45ed18e4e42ac9cf655ad07d1d4df Mon Sep 17 00:00:00 2001 From: Aneesh Bansal Date: Tue, 22 Apr 2014 15:16:48 +0530 Subject: [PATCH 064/105] powerpc/mpc85xx: SECURE BOOT- secure boot target for t1040rdb T1040RDB.h file is removed and a unified file T104xRDB.h is created. Hence macro CONFIG_T1040 is renamed to CONFIG_T104x. Signed-off-by: Gaurav Kumar Rana Signed-off-by: Aneesh Bansal --- arch/powerpc/include/asm/fsl_secure_boot.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 29bef910ed6..9a0cb20eb36 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -21,7 +21,7 @@ defined(CONFIG_T4240QDS) || \ defined(CONFIG_T2080QDS) || \ defined(CONFIG_T1040QDS) || \ - defined(CONFIG_T1040RDB) + defined(CONFIG_T104xRDB) #define CONFIG_SYS_CPC_REINIT_F #undef CONFIG_SYS_INIT_L3_ADDR #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 From e47c2a68517a3acd8e7668e0fc16a2c168ac30b4 Mon Sep 17 00:00:00 2001 From: Aneesh Bansal Date: Tue, 22 Apr 2014 15:17:06 +0530 Subject: [PATCH 065/105] powerpc/mpc85xx: SECURE BOOT- Add secure boot target for T2080RDB Secure Boot Target is added for T2080RDB Changes: For Secure boot, CPC is configured as SRAM and used as house keeping area which needs to be disabled. So CONFIG_SYS_CPC_REINIT_F is defined for CONFIG_T2080RDB. Signed-off-by: Aneesh Bansal --- arch/powerpc/include/asm/fsl_secure_boot.h | 1 + boards.cfg | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 9a0cb20eb36..74c5d8f2d92 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -20,6 +20,7 @@ #if defined(CONFIG_B4860QDS) || \ defined(CONFIG_T4240QDS) || \ defined(CONFIG_T2080QDS) || \ + defined(CONFIG_T2080RDB) || \ defined(CONFIG_T1040QDS) || \ defined(CONFIG_T104xRDB) #define CONFIG_SYS_CPC_REINIT_F diff --git a/boards.cfg b/boards.cfg index b7c6da95a29..ba54e2fd362 100644 --- a/boards.cfg +++ b/boards.cfg @@ -969,6 +969,7 @@ Active powerpc mpc85xx - freescale t208xqds Active powerpc mpc85xx - freescale t208xrdb T2080RDB T208xRDB:PPC_T2080 - Active powerpc mpc85xx - freescale t208xrdb T2080RDB_NAND T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND - Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SDCARD T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - +Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SECURE_BOOT T208xRDB:PPC_T2080,SECURE_BOOT Aneesh Bansal Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SPIFLASH T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH - Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SRIO_PCIE_BOOT T208xRDB:PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - Active powerpc mpc85xx - freescale t4qds T4160QDS T4240QDS:PPC_T4160 - From 3a7ed5aa232da1d2836b5d3962e59e685307122e Mon Sep 17 00:00:00 2001 From: Shaohui Xie Date: Tue, 22 Apr 2014 18:21:37 +0800 Subject: [PATCH 066/105] powerpc/fman/memac: use default MDIO_HOLD value Current driver uses a Maximum value for MDIO_HOLD when doing 10G MDIO access, this is due to an errata A-006260 on T4 rev1.0 which is fixed on rev2.0, so remove the maximum value to use the default value for rev2.0. Signed-off-by: Shaohui Xie --- drivers/net/fm/memac_phy.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c index 2f4bc11a6c2..de9c0e9cd28 100644 --- a/drivers/net/fm/memac_phy.c +++ b/drivers/net/fm/memac_phy.c @@ -29,10 +29,8 @@ int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr, c45 = 0; /* clause 22 */ dev_addr = regnum & 0x1f; clrbits_be32(®s->mdio_stat, MDIO_STAT_ENC); - } else { + } else setbits_be32(®s->mdio_stat, MDIO_STAT_ENC); - setbits_be32(®s->mdio_stat, MDIO_STAT_HOLD_15_CLK); - } /* Wait till the bus is free */ while ((in_be32(®s->mdio_stat)) & MDIO_STAT_BSY) @@ -76,10 +74,8 @@ int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr, c45 = 0; /* clause 22 */ dev_addr = regnum & 0x1f; clrbits_be32(®s->mdio_stat, MDIO_STAT_ENC); - } else { + } else setbits_be32(®s->mdio_stat, MDIO_STAT_ENC); - setbits_be32(®s->mdio_stat, MDIO_STAT_HOLD_15_CLK); - } /* Wait till the bus is free */ while ((in_be32(®s->mdio_stat)) & MDIO_STAT_BSY) From c665c473b605349b1c58890493255dd70e0b60fe Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Thu, 24 Apr 2014 11:10:09 +0800 Subject: [PATCH 067/105] powerpc/t208x: enable errata A006261, A006593, A006379 Enable errata A006261, A006593, A006379 for T208x. Additionally enable CONFIG_CMD_ERRATA for T2080RDB. Signed-off-by: Shengzhou Liu --- arch/powerpc/include/asm/config_mpc85xx.h | 3 +++ arch/powerpc/include/asm/fsl_errata.h | 3 +++ include/configs/T208xRDB.h | 1 + 3 files changed, 7 insertions(+) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 864e74c0c76..0d6eb491f1a 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -798,6 +798,9 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define CONFIG_SYS_FSL_SFP_VER_3_0 #define CONFIG_SYS_FSL_ISBC_VER 2 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define CONFIG_SYS_FSL_ERRATUM_A006261 +#define CONFIG_SYS_FSL_ERRATUM_A006593 +#define CONFIG_SYS_FSL_ERRATUM_A006379 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE diff --git a/arch/powerpc/include/asm/fsl_errata.h b/arch/powerpc/include/asm/fsl_errata.h index 4eba85cc347..d820121ee3a 100644 --- a/arch/powerpc/include/asm/fsl_errata.h +++ b/arch/powerpc/include/asm/fsl_errata.h @@ -52,6 +52,9 @@ static inline bool has_erratum_a006261(void) return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); case SVR_T1040: return IS_SVR_REV(svr, 1, 0); + case SVR_T2080: + case SVR_T2081: + return IS_SVR_REV(svr, 1, 0); case SVR_P5040: return IS_SVR_REV(svr, 1, 0); } diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 0be0a0feb0b..5b261788c9a 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -721,6 +721,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF +#define CONFIG_CMD_ERRATA #define CONFIG_CMD_MII #define CONFIG_CMD_I2C #define CONFIG_CMD_PING From 5122dfae5d3cd68e0b6e5e08597df91ba79770aa Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Fri, 25 Apr 2014 16:31:22 +0800 Subject: [PATCH 068/105] powerpc/85xx: add T4080 SoC support The T4080 SoC is a low-power version of the T4160. T4080 combines 4 dual-threaded Power Architecture e6500 cores with single cluster and two memory complexes. Signed-off-by: Shengzhou Liu --- arch/powerpc/cpu/mpc85xx/Makefile | 2 ++ arch/powerpc/cpu/mpc85xx/cpu.c | 24 +++++++++++++++++++++++ arch/powerpc/cpu/mpc85xx/cpu_init.c | 9 ++++++++- arch/powerpc/cpu/mpc85xx/speed.c | 3 ++- arch/powerpc/cpu/mpc85xx/t4240_serdes.c | 2 +- arch/powerpc/cpu/mpc8xxx/cpu.c | 1 + arch/powerpc/include/asm/config_mpc85xx.h | 16 ++++++++++----- arch/powerpc/include/asm/fsl_errata.h | 2 ++ arch/powerpc/include/asm/immap_85xx.h | 6 ++++-- arch/powerpc/include/asm/processor.h | 1 + drivers/net/fm/Makefile | 1 + 11 files changed, 57 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile index 409478539ec..ad26b432f18 100644 --- a/arch/powerpc/cpu/mpc85xx/Makefile +++ b/arch/powerpc/cpu/mpc85xx/Makefile @@ -44,6 +44,7 @@ obj-$(CONFIG_PPC_P5020) += p5020_ids.o obj-$(CONFIG_PPC_P5040) += p5040_ids.o obj-$(CONFIG_PPC_T4240) += t4240_ids.o obj-$(CONFIG_PPC_T4160) += t4240_ids.o +obj-$(CONFIG_PPC_T4080) += t4240_ids.o obj-$(CONFIG_PPC_B4420) += b4860_ids.o obj-$(CONFIG_PPC_B4860) += b4860_ids.o obj-$(CONFIG_PPC_T1040) += t1040_ids.o @@ -88,6 +89,7 @@ obj-$(CONFIG_PPC_P5020) += p5020_serdes.o obj-$(CONFIG_PPC_P5040) += p5040_serdes.o obj-$(CONFIG_PPC_T4240) += t4240_serdes.o obj-$(CONFIG_PPC_T4160) += t4240_serdes.o +obj-$(CONFIG_PPC_T4080) += t4240_serdes.o obj-$(CONFIG_PPC_B4420) += b4860_serdes.o obj-$(CONFIG_PPC_B4860) += b4860_serdes.o obj-$(CONFIG_BSC9132) += bsc9132_serdes.o diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 12e8e10d483..684d4007e48 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -77,6 +77,30 @@ int checkcpu (void) major = SVR_MAJ(svr); minor = SVR_MIN(svr); +#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500) + if (SVR_SOC_VER(svr) == SVR_T4080) { + ccsr_rcpm_t *rcpm = + (void __iomem *)(CONFIG_SYS_FSL_CORENET_RCPM_ADDR); + + setbits_be32(&gur->devdisr2, FSL_CORENET_DEVDISR2_DTSEC1_6 || + FSL_CORENET_DEVDISR2_DTSEC1_9); + setbits_be32(&gur->devdisr3, FSL_CORENET_DEVDISR3_PCIE3); + setbits_be32(&gur->devdisr5, FSL_CORENET_DEVDISR5_DDR3); + + /* It needs SW to disable core4~7 as HW design sake on T4080 */ + for (i = 4; i < 8; i++) + cpu_disable(i); + + /* request core4~7 into PH20 state, prior to entering PCL10 + * state, all cores in cluster should be placed in PH20 state. + */ + setbits_be32(&rcpm->pcph20setr, 0xf0); + + /* put the 2nd cluster into PCL10 state */ + setbits_be32(&rcpm->clpcl10setr, 1 << 1); + } +#endif + if (cpu_numcores() > 1) { #ifndef CONFIG_MP puts("Unicore software on multiprocessor system!!\n" diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 36ef23232ed..7e2746412bd 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -462,10 +462,17 @@ __attribute__((weak, alias("__fsl_serdes__init"))) void fsl_serdes_init(void); int enable_cluster_l2(void) { int i = 0; - u32 cluster; + u32 cluster, svr = get_svr(); ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); struct ccsr_cluster_l2 __iomem *l2cache; + /* only the L2 of first cluster should be enabled as expected on T4080, + * but there is no EOC in the first cluster as HW sake, so return here + * to skip enabling L2 cache of the 2nd cluster. + */ + if (SVR_SOC_VER(svr) == SVR_T4080) + return 0; + cluster = in_be32(&gur->tp_cluster[i].lower); if (cluster & TP_CLUSTER_EOC) return 0; diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index d516d4e4a62..3236f6a5da6 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -123,7 +123,8 @@ void get_sys_info(sys_info_t *sys_info) * T4240/T4160 Rev1.0. eg. It's 12 in Rev1.0, however, for Rev2.0 * it uses 6. */ -#if defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) +#if defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \ + defined(CONFIG_PPC_T4080) if (SVR_MAJ(get_svr()) >= 2) mem_pll_rat *= 2; #endif diff --git a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c index ff55e3c357c..1f99a0a8978 100644 --- a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c @@ -172,7 +172,7 @@ static const struct serdes_config serdes4_cfg_tbl[] = { {18, {PCIE3, PCIE3, PCIE3, PCIE3, AURORA, AURORA, AURORA, AURORA}}, {} }; -#elif defined(CONFIG_PPC_T4160) +#elif defined(CONFIG_PPC_T4160) || defined(CONFIG_PPC_T4080) static const struct serdes_config serdes1_cfg_tbl[] = { /* SerDes 1 */ {1, {XAUI_FM1_MAC9, XAUI_FM1_MAC9, diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index 35795c4fbe7..dfedc536ffb 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -62,6 +62,7 @@ static struct cpu_type cpu_type_list[] = { CPU_TYPE_ENTRY(T4240, T4240, 0), CPU_TYPE_ENTRY(T4120, T4120, 0), CPU_TYPE_ENTRY(T4160, T4160, 0), + CPU_TYPE_ENTRY(T4080, T4080, 4), CPU_TYPE_ENTRY(B4860, B4860, 0), CPU_TYPE_ENTRY(G4860, G4860, 0), CPU_TYPE_ENTRY(G4060, G4060, 0), diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 0d6eb491f1a..8a7d4d8a1dc 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -595,7 +595,8 @@ #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 #define CONFIG_ESDHC_HC_BLK_ADDR -#elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) +#elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \ + defined(CONFIG_PPC_T4080) #define CONFIG_E6500 #define CONFIG_SYS_PPC64 /* 64-bit core */ #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ @@ -611,13 +612,18 @@ #define CONFIG_SYS_NUM_FM2_10GEC 2 #define CONFIG_NUM_DDR_CONTROLLERS 3 #else -#define CONFIG_MAX_CPUS 8 -#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 } -#define CONFIG_SYS_NUM_FM1_DTSEC 7 +#define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 1 -#define CONFIG_SYS_NUM_FM2_DTSEC 7 +#define CONFIG_SYS_NUM_FM2_DTSEC 8 #define CONFIG_SYS_NUM_FM2_10GEC 1 #define CONFIG_NUM_DDR_CONTROLLERS 2 +#if defined(CONFIG_PPC_T4160) +#define CONFIG_MAX_CPUS 8 +#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 } +#elif defined(CONFIG_PPC_T4080) +#define CONFIG_MAX_CPUS 4 +#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1 } +#endif #endif #define CONFIG_SYS_FSL_NUM_CC_PLLS 5 #define CONFIG_SYS_FSL_NUM_LAWS 32 diff --git a/arch/powerpc/include/asm/fsl_errata.h b/arch/powerpc/include/asm/fsl_errata.h index d820121ee3a..64da4bb3bae 100644 --- a/arch/powerpc/include/asm/fsl_errata.h +++ b/arch/powerpc/include/asm/fsl_errata.h @@ -16,6 +16,7 @@ static inline bool has_erratum_a006379(void) u32 svr = get_svr(); if (((SVR_SOC_VER(svr) == SVR_T4240) && SVR_MAJ(svr) <= 1) || ((SVR_SOC_VER(svr) == SVR_T4160) && SVR_MAJ(svr) <= 1) || + ((SVR_SOC_VER(svr) == SVR_T4080) && SVR_MAJ(svr) <= 1) || ((SVR_SOC_VER(svr) == SVR_B4860) && SVR_MAJ(svr) <= 2) || ((SVR_SOC_VER(svr) == SVR_B4420) && SVR_MAJ(svr) <= 2) || ((SVR_SOC_VER(svr) == SVR_T2080) && SVR_MAJ(svr) <= 1) || @@ -49,6 +50,7 @@ static inline bool has_erratum_a006261(void) return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); case SVR_T4240: case SVR_T4160: + case SVR_T4080: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); case SVR_T1040: return IS_SVR_REV(svr, 1, 0); diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 741b8618d11..eff573b5ade 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1748,7 +1748,8 @@ typedef struct ccsr_gur { /* use reserved bits 18~23 as scratch space to host DDR PLL ratio */ #define FSL_CORENET_RCWSR0_MEM_PLL_RAT_RESV_SHIFT 8 #define FSL_CORENET_RCWSR0_MEM_PLL_RAT_MASK 0x3f -#if defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) +#if defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \ + defined(CONFIG_PPC_T4080) #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xfc000000 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT 26 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL 0x00fe0000 @@ -1848,7 +1849,8 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_MII 0x00100000 #define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC5_NONE 0x00180000 #endif -#if defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) +#if defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \ + defined(CONFIG_PPC_T4080) #define FSL_CORENET_RCWSR13_EC1 0x60000000 /* bits 417..418 */ #define FSL_CORENET_RCWSR13_EC1_FM2_DTSEC5_RGMII 0x00000000 #define FSL_CORENET_RCWSR13_EC1_FM2_GPIO 0x40000000 diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 72f30feee62..a6f121e113a 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -1111,6 +1111,7 @@ #define SVR_T4240 0x824000 #define SVR_T4120 0x824001 #define SVR_T4160 0x824100 +#define SVR_T4080 0x824102 #define SVR_C291 0x850000 #define SVR_C292 0x850020 #define SVR_C293 0x850030 diff --git a/drivers/net/fm/Makefile b/drivers/net/fm/Makefile index ee5d7689377..5ae3b167a93 100644 --- a/drivers/net/fm/Makefile +++ b/drivers/net/fm/Makefile @@ -32,5 +32,6 @@ obj-$(CONFIG_PPC_T2080) += t2080.o obj-$(CONFIG_PPC_T2081) += t2080.o obj-$(CONFIG_PPC_T4240) += t4240.o obj-$(CONFIG_PPC_T4160) += t4240.o +obj-$(CONFIG_PPC_T4080) += t4240.o obj-$(CONFIG_PPC_B4420) += b4860.o obj-$(CONFIG_PPC_B4860) += b4860.o From a53e65d053401fff12740a8bbed8cb41670c268f Mon Sep 17 00:00:00 2001 From: Stefan Bigler Date: Fri, 2 May 2014 10:48:41 +0200 Subject: [PATCH 069/105] kmp204x: Add support for the unit LEDs The unit LEDs are managed by the QRIO CPLD. This patch adds support for accessing these LEDs in the QRIO. The LEDs then are set to a correct boot state: - UNIT-LED is red - BOOT-LED is on. Signed-off-by: Stefan Bigler Signed-off-by: Valentin Longchamp --- board/keymile/kmp204x/kmp204x.c | 3 +++ board/keymile/kmp204x/kmp204x.h | 1 + board/keymile/kmp204x/qrio.c | 15 +++++++++++++++ 3 files changed, 19 insertions(+) diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index 95a19cdb2c1..5fceedd7c35 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -113,6 +113,9 @@ int board_early_init_r(void) if (ret) printf("error triggering PCIe FPGA config\n"); + /* enable the Unit LED (red) & Boot LED (on) */ + qrio_set_leds(); + return ret; } diff --git a/board/keymile/kmp204x/kmp204x.h b/board/keymile/kmp204x/kmp204x.h index 0267596e4e5..34de27eafe4 100644 --- a/board/keymile/kmp204x/kmp204x.h +++ b/board/keymile/kmp204x/kmp204x.h @@ -21,5 +21,6 @@ void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr); void qrio_prst(u8 bit, bool en, bool wden); void qrio_prstcfg(u8 bit, u8 mode); +void qrio_set_leds(void); void pci_of_setup(void *blob, bd_t *bd); diff --git a/board/keymile/kmp204x/qrio.c b/board/keymile/kmp204x/qrio.c index 49f9aa25462..86df2c7ca98 100644 --- a/board/keymile/kmp204x/qrio.c +++ b/board/keymile/kmp204x/qrio.c @@ -144,3 +144,18 @@ void qrio_prstcfg(u8 bit, u8 mode) out_be32(qrio_base + PRSTCFG_OFF, prstcfg); } + +#define CTRLH_OFF 0x02 +#define CTRLH_WRL_BOOT 0x01 +#define CTRLH_WRL_UNITRUN 0x02 + +void qrio_set_leds(void) +{ + u8 ctrlh; + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + /* set UNIT LED to RED and BOOT LED to ON */ + ctrlh = in_8(qrio_base + CTRLH_OFF); + ctrlh |= (CTRLH_WRL_BOOT | CTRLH_WRL_UNITRUN); + out_8(qrio_base + CTRLH_OFF, ctrlh); +} From 4921a149e1470d92e2982e13c709357d90ef5e6c Mon Sep 17 00:00:00 2001 From: Stefan Bigler Date: Fri, 2 May 2014 10:49:27 +0200 Subject: [PATCH 070/105] kmp204x: handle dip-switch for factory settings Add readout of dip-switch to revert to factory settings. If one or more dip-switch are set, launch bank 0 that contains the bootloader to do the required action. Signed-off-by: Stefan Bigler Signed-off-by: Valentin Longchamp --- board/keymile/kmp204x/kmp204x.c | 15 +++++++++++++++ board/keymile/kmp204x/kmp204x.h | 1 + board/keymile/kmp204x/qrio.c | 14 ++++++++++++++ 3 files changed, 30 insertions(+) diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index 5fceedd7c35..fba1bdd4381 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -116,6 +116,9 @@ int board_early_init_r(void) /* enable the Unit LED (red) & Boot LED (on) */ qrio_set_leds(); + /* enable Application Buffer */ + qrio_enable_app_buffer(); + return ret; } @@ -171,6 +174,18 @@ int hush_init_var(void) #if defined(CONFIG_LAST_STAGE_INIT) int last_stage_init(void) { +#if defined(CONFIG_KMCOGE4) + /* on KMCOGE4, the BFTIC4 is on the LBAPP2 */ + struct bfticu_iomap *bftic4 = + (struct bfticu_iomap *)CONFIG_SYS_LBAPP2_BASE; + u8 dip_switch = in_8((u8 *)&(bftic4->mswitch)) & BFTICU_DIPSWITCH_MASK; + + if (dip_switch != 0) { + /* start bootloader */ + puts("DIP: Enabled\n"); + setenv("actual_bank", "0"); + } +#endif set_km_env(); return 0; } diff --git a/board/keymile/kmp204x/kmp204x.h b/board/keymile/kmp204x/kmp204x.h index 34de27eafe4..720e2256131 100644 --- a/board/keymile/kmp204x/kmp204x.h +++ b/board/keymile/kmp204x/kmp204x.h @@ -22,5 +22,6 @@ void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr); void qrio_prst(u8 bit, bool en, bool wden); void qrio_prstcfg(u8 bit, u8 mode); void qrio_set_leds(void); +void qrio_enable_app_buffer(void); void pci_of_setup(void *blob, bd_t *bd); diff --git a/board/keymile/kmp204x/qrio.c b/board/keymile/kmp204x/qrio.c index 86df2c7ca98..08d5ca43dfd 100644 --- a/board/keymile/kmp204x/qrio.c +++ b/board/keymile/kmp204x/qrio.c @@ -159,3 +159,17 @@ void qrio_set_leds(void) ctrlh |= (CTRLH_WRL_BOOT | CTRLH_WRL_UNITRUN); out_8(qrio_base + CTRLH_OFF, ctrlh); } + +#define CTRLL_OFF 0x03 +#define CTRLL_WRB_BUFENA 0x20 + +void qrio_enable_app_buffer(void) +{ + u8 ctrll; + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + /* enable application buffer */ + ctrll = in_8(qrio_base + CTRLL_OFF); + ctrll |= (CTRLL_WRB_BUFENA); + out_8(qrio_base + CTRLL_OFF, ctrll); +} From 18794944c6f60b912db8509012d10793f35586ae Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Wed, 30 Apr 2014 15:01:44 +0200 Subject: [PATCH 071/105] kmp204x: selftest/factory test pin support This patch defines the post_hotkeys_pressed() function that is used for: - triggering POST memory regions test - starting the test application through the checktestboot command in a script by setting the active bank to testbank The post_hotkeys_pressed return the state of the SELFTEST pin. The patch moves from the complete POST-memory test that is too long in its SLOW version for our production HW test procedure to the much shorter POST-memory-regions test. Finally, the unused #defines for the not so relevant mtest command are removed. Signed-off-by: Stefan Bigler Signed-off-by: Valentin Longchamp --- board/keymile/kmp204x/kmp204x.c | 13 +++++++++++++ include/configs/km/kmp204x-common.h | 6 +----- 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index fba1bdd4381..1ce8429075f 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -250,3 +250,16 @@ void ft_board_setup(void *blob, bd_t *bd) fdt_fixup_fman_mac_addresses(blob); #endif } + +#if defined(CONFIG_POST) + +/* DIC26_SELFTEST GPIO used to start factory test sw */ +#define SELFTEST_PORT GPIO_A +#define SELFTEST_PIN 31 + +int post_hotkeys_pressed(void) +{ + qrio_gpio_direction_input(SELFTEST_PORT, SELFTEST_PIN); + return qrio_get_gpio(SELFTEST_PORT, SELFTEST_PIN); +} +#endif diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 418e3d12981..f9bcef3ff1d 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -85,11 +85,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_ADDR_MAP #define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ -#define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ -#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00800000 -#define CONFIG_SYS_ALT_MEMTEST -#define CONFIG_PANIC_HANG /* do not reset board on panic */ +#define CONFIG_POST CONFIG_SYS_POST_MEM_REGIONS /* POST memory regions test */ /* * Config the L3 Cache as L3 SRAM From 848b31ab0f56d828b1d986c48b495d15abb73a65 Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Wed, 30 Apr 2014 15:01:45 +0200 Subject: [PATCH 072/105] kmp204x: update the CONFIG_PRAM and CONFIG_KM_RESERVED_PRAM defines This prevents u-boot from accessing into the reserved memory areas that we have for /var and the logbooks. Signed-off-by: Valentin Longchamp --- include/configs/km/kmp204x-common.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index f9bcef3ff1d..e4c5e7bd99d 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -139,10 +139,12 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_KM_PNVRAM 0x80000 /* physical RAM MTD size [hex] */ #define CONFIG_KM_PHRAM 0x100000 -/* resereved pram area at the end of memroy [hex] */ -#define CONFIG_KM_RESERVED_PRAM 0x0 -/* enable protected RAM */ -#define CONFIG_PRAM 0 +/* reserved pram area at the end of memory [hex] + * u-boot reserves some memory for the MP boot page */ +#define CONFIG_KM_RESERVED_PRAM 0x1000 +/* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable + * is not valid yet, which is the case for when u-boot copies itself to RAM */ +#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM)>>10) #define CONFIG_KM_CRAMFS_ADDR 0x2000000 #define CONFIG_KM_KERNEL_ADDR 0x1000000 /* max kernel size 15.5Mbytes */ From af47faf650b1329e2ea4f85d00adf813ca2a3da4 Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Wed, 30 Apr 2014 15:01:46 +0200 Subject: [PATCH 073/105] kmp204x: complete the reset sequence and PRST configuration This adds the reset support for the following devices that was until then not implemented: - BFTIC4 - QSFPs This also fixes the configuration of the prst behaviour for the other resets: Only the u-boot and kernel relevant subsystems are taken out of reset (pcie, ZL30158, and front eth phy). Most of the prst config move to misc_init_f(), except for the PCIe related ones that are in pci_init_board and the bftic and ZL30158 ones that should be done as soon as possible. Only the behavior of the Hooper reset is changed according to the documentation as the application is not able to not configure the switch when it is not reset. Signed-off-by: Valentin Longchamp --- board/keymile/kmp204x/kmp204x.c | 44 ++++++++++++++++++++++++--------- board/keymile/kmp204x/kmp204x.h | 1 + board/keymile/kmp204x/pci.c | 17 +++++++------ board/keymile/kmp204x/qrio.c | 2 +- 4 files changed, 45 insertions(+), 19 deletions(-) diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index 1ce8429075f..6bc8eb85eaa 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -79,7 +79,7 @@ int get_scl(void) #define ZL30158_RST 8 -#define ZL30343_RST 9 +#define BFTIC4_RST 0 int board_early_init_f(void) { @@ -88,13 +88,15 @@ int board_early_init_f(void) /* board only uses the DDR_MCK0, so disable the DDR_MCK1/2/3 */ setbits_be32(&gur->ddrclkdr, 0x001f000f); - /* take the Zarlinks out of reset as soon as possible */ - qrio_prst(ZL30158_RST, false, false); - qrio_prst(ZL30343_RST, false, false); + /* set the BFTIC's prstcfg to reset at power-up and unit reset only */ + qrio_prstcfg(BFTIC4_RST, PRSTCFG_POWUP_UNIT_RST); + /* and enable WD on it */ + qrio_wdmask(BFTIC4_RST, true); - /* and set their reset to power-up only */ - qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_RST); - qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_RST); + /* set the ZL30138's prstcfg to reset at power-up and unit reset only */ + qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_UNIT_RST); + /* and take it out of reset as soon as possible (needed for Hooper) */ + qrio_prst(ZL30158_RST, false, false); return 0; } @@ -127,16 +129,37 @@ unsigned long get_board_sys_clk(unsigned long dummy) return 66666666; } +#define ETH_FRONT_PHY_RST 15 +#define QSFP2_RST 11 +#define QSFP1_RST 10 +#define ZL30343_RST 9 + int misc_init_f(void) { /* configure QRIO pis for i2c deblocking */ i2c_deblock_gpio_cfg(); + /* configure the front phy's prstcfg and take it out of reset */ + qrio_prstcfg(ETH_FRONT_PHY_RST, PRSTCFG_POWUP_UNIT_CORE_RST); + qrio_prst(ETH_FRONT_PHY_RST, false, false); + + /* set the ZL30343 prstcfg to reset at power-up and unit reset only */ + qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_UNIT_RST); + /* and enable the WD on it */ + qrio_wdmask(ZL30343_RST, true); + + /* set the QSFPs' prstcfg to reset at power-up and unit rst only */ + qrio_prstcfg(QSFP1_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_prstcfg(QSFP2_RST, PRSTCFG_POWUP_UNIT_RST); + + /* and enable the WD on them */ + qrio_wdmask(QSFP1_RST, true); + qrio_wdmask(QSFP2_RST, true); + return 0; } #define NUM_SRDS_BANKS 2 -#define PHY_RST 15 int misc_init_r(void) { @@ -157,9 +180,6 @@ int misc_init_r(void) } } - /* take the mgmt eth phy out of reset */ - qrio_prst(PHY_RST, false, false); - return 0; } @@ -172,6 +192,7 @@ int hush_init_var(void) #endif #if defined(CONFIG_LAST_STAGE_INIT) + int last_stage_init(void) { #if defined(CONFIG_KMCOGE4) @@ -187,6 +208,7 @@ int last_stage_init(void) } #endif set_km_env(); + return 0; } #endif diff --git a/board/keymile/kmp204x/kmp204x.h b/board/keymile/kmp204x/kmp204x.h index 720e2256131..afede994f17 100644 --- a/board/keymile/kmp204x/kmp204x.h +++ b/board/keymile/kmp204x/kmp204x.h @@ -20,6 +20,7 @@ void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr); #define PRSTCFG_POWUP_RST 0x3 void qrio_prst(u8 bit, bool en, bool wden); +void qrio_wdmask(u8 bit, bool wden); void qrio_prstcfg(u8 bit, u8 mode); void qrio_set_leds(void); void qrio_enable_app_buffer(void); diff --git a/board/keymile/kmp204x/pci.c b/board/keymile/kmp204x/pci.c index a484eb57495..2b0b054a11c 100644 --- a/board/keymile/kmp204x/pci.c +++ b/board/keymile/kmp204x/pci.c @@ -94,20 +94,23 @@ err_out: } #define PCIE_SW_RST 14 -#define PEXHC_SW_RST 13 -#define HOOPER_SW_RST 12 +#define PEXHC_RST 13 +#define HOOPER_RST 12 void pci_init_board(void) { - /* first wait for the PCIe FPGA to be configured + qrio_prstcfg(PCIE_SW_RST, PRSTCFG_POWUP_UNIT_CORE_RST); + qrio_prstcfg(PEXHC_RST, PRSTCFG_POWUP_UNIT_CORE_RST); + qrio_prstcfg(HOOPER_RST, PRSTCFG_POWUP_UNIT_CORE_RST); + + /* wait for the PCIe FPGA to be configured * it has been triggered earlier in board_early_init_r */ - int ret = wait_for_fpga_config(); - if (ret) + if (wait_for_fpga_config()) printf("error finishing PCIe FPGA config\n"); qrio_prst(PCIE_SW_RST, false, false); - qrio_prst(PEXHC_SW_RST, false, false); - qrio_prst(HOOPER_SW_RST, false, false); + qrio_prst(PEXHC_RST, false, false); + qrio_prst(HOOPER_RST, false, false); /* Hooper is not direcly PCIe capable */ mdelay(50); diff --git a/board/keymile/kmp204x/qrio.c b/board/keymile/kmp204x/qrio.c index 08d5ca43dfd..b6ba93ada8f 100644 --- a/board/keymile/kmp204x/qrio.c +++ b/board/keymile/kmp204x/qrio.c @@ -91,7 +91,7 @@ void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val) #define WDMASK_OFF 0x16 -static void qrio_wdmask(u8 bit, bool wden) +void qrio_wdmask(u8 bit, bool wden) { u16 wdmask; void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; From e20c822d0e56c3d6721baae4a721299818884f2b Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Wed, 30 Apr 2014 15:01:47 +0200 Subject: [PATCH 074/105] kmp204x: update the RCW Fix the IRQ/GPIO settings: all the muxed GPIO/external IRQs that are used as internal interrupts are defined as GPIOs to avoid confusion between the internal/external interrupts. Signed-off-by: Valentin Longchamp --- board/keymile/kmp204x/rcw_kmp204x.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/keymile/kmp204x/rcw_kmp204x.cfg b/board/keymile/kmp204x/rcw_kmp204x.cfg index 2d4c48cb9cd..236d5138bc7 100644 --- a/board/keymile/kmp204x/rcw_kmp204x.cfg +++ b/board/keymile/kmp204x/rcw_kmp204x.cfg @@ -7,5 +7,5 @@ aa55aa55 010e0100 #64 bytes RCW data 14600000 00000000 28200000 00000000 148E70CF CFC02000 58000000 41000000 -00000000 00000000 00000000 F0428002 +00000000 00000000 00000000 F0428816 00000000 00000000 00000000 00000000 From 2846c43e2dc2b33498cdf78fb2be9ade946e4863 Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Wed, 30 Apr 2014 15:01:48 +0200 Subject: [PATCH 075/105] kmp204x: add workaround for A-004849 This should prevent the problems that the CCF can deadlock with certain traffic patterns. This also fixes the workaround for A-006559 that was not correctly implemented before. Signed-off-by: Valentin Longchamp --- board/keymile/kmp204x/pbi.cfg | 43 ++++++++++++++++++++++++++++++----- 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/board/keymile/kmp204x/pbi.cfg b/board/keymile/kmp204x/pbi.cfg index 9af8bd5b57a..1e0a171d88b 100644 --- a/board/keymile/kmp204x/pbi.cfg +++ b/board/keymile/kmp204x/pbi.cfg @@ -8,16 +8,47 @@ # #PBI commands -#Workaround for A-006559 needed for rev 2.0 of P2041 silicon -#Freescale's errarta sheet suggests it may be done with PBI +#Configure ALTCBAR for DCSR -> DCSR@89000000 +091380c0 000009C4 09000010 00000000 +091380c0 000009C4 09000014 00000000 +091380c0 000009C4 09000018 81d00000 -09021008 0000f000 -09021028 0000f000 -09021048 0000f000 -09021068 0000f000 +#Workaround for A-004849 +091380c0 000009C4 +890B0050 00000002 +091380c0 000009C4 +890B0054 00000002 +091380c0 000009C4 +890B0058 00000002 +091380c0 000009C4 +890B005C 00000002 +091380c0 000009C4 +890B0090 00000002 +091380c0 000009C4 +890B0094 00000002 +091380c0 000009C4 +890B0098 00000002 +091380c0 000009C4 +890B009C 00000002 +091380c0 000009C4 +890B0108 00000012 +091380c0 000009C4 +#Workaround for A-006559 needed for rev 2.0 of P2041 silicon +89021008 0000f000 +091380c0 000009C4 +89021028 0000f000 +091380c0 000009C4 +89021048 0000f000 +091380c0 000009C4 +89021068 0000f000 +091380c0 000009C4 +#Flush PBL data +09138000 00000000 +#Disable ALTCBAR 09000018 00000000 +091380c0 000009C4 #Initialize CPC1 as 1MB SRAM 09010000 00200400 09138000 00000000 From 522641a78862d2ecf9b89cc29dfb4429ee1b4103 Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Wed, 30 Apr 2014 15:01:49 +0200 Subject: [PATCH 076/105] kmp204x: enable the errata command Signed-off-by: Valentin Longchamp --- include/configs/km/kmp204x-common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index e4c5e7bd99d..efd96352eca 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -381,6 +381,7 @@ int get_scl(void); */ #define CONFIG_CMD_PCI #define CONFIG_CMD_NET +#define CONFIG_CMD_ERRATA /* we don't need flash support */ #define CONFIG_SYS_NO_FLASH From b539534d120c3f017965b25aa36fcfb75db8383c Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Wed, 30 Apr 2014 19:21:10 +0200 Subject: [PATCH 077/105] PPC 85xx QEMU: Always assume 1 core We only need u-boot to bother about a single core in the QEMU machine. Everything that would require additional knowledge of more cores gets handled by QEMU and passed straight into the payload we execute. Because of this setup, it would be counterproductive to enable SMP support in u-boot. We would have to rip CPUs out of already existing spin tables and respin them from u-boot. It would be a pretty big mess. So only assume we have a single core. This fixes errors about CONFIG_MP being disabled. Signed-off-by: Alexander Graf --- arch/powerpc/cpu/mpc8xxx/cpu.c | 4 ++-- board/freescale/qemu-ppce500/qemu-ppce500.c | 20 ++++++++++++++++++++ 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index dfedc536ffb..13bd0acdfb6 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -177,7 +177,7 @@ struct cpu_type *identify_cpu(u32 ver) /* * Return a 32-bit mask indicating which cores are present on this SOC. */ -u32 cpu_mask(void) +__weak u32 cpu_mask(void) { ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR; struct cpu_type *cpu = gd->arch.cpu; @@ -196,7 +196,7 @@ u32 cpu_mask(void) /* * Return the number of cores on this SOC. */ -int cpu_numcores(void) +__weak int cpu_numcores(void) { struct cpu_type *cpu = gd->arch.cpu; diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c index 3dbb0cf43b8..230870d90e4 100644 --- a/board/freescale/qemu-ppce500/qemu-ppce500.c +++ b/board/freescale/qemu-ppce500/qemu-ppce500.c @@ -346,3 +346,23 @@ ulong get_bus_freq (ulong dummy) get_sys_info(&sys_info); return sys_info.freq_systembus; } + +/* + * Return the number of cores on this SOC. + */ +int cpu_numcores(void) +{ + /* + * The QEMU u-boot target only needs to drive the first core, + * spinning and device tree nodes get driven by QEMU itself + */ + return 1; +} + +/* + * Return a 32-bit mask indicating which cores are present on this SOC. + */ +u32 cpu_mask(void) +{ + return (1 << cpu_numcores()) - 1; +} From a6c46b994d90f892b608b1b233a04f1fc54f7ab7 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Wed, 30 Apr 2014 19:21:11 +0200 Subject: [PATCH 078/105] PPC 85xx QEMU: Don't use HID1 For the QEMU machine type, we can plug in either e500v2, e500mc, e5500 or e6500 style cores into the system. U-boot has to work with all of them. So avoid using HID1 which is not available on e500mc systems to make sure we don't trap on it. Signed-off-by: Alexander Graf --- arch/powerpc/cpu/mpc85xx/start.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 0e3c86a0f8f..01491464587 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -314,7 +314,7 @@ l2_disabled: #endif mtspr HID0,r0 -#ifndef CONFIG_E500MC +#if !defined(CONFIG_E500MC) && !defined(CONFIG_QEMU_E500) li r0,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */ mfspr r3,PVR andi. r3,r3, 0xff From f13c9156a9b790fa1991ce41a7f9b7261ff85c33 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Wed, 30 Apr 2014 19:21:12 +0200 Subject: [PATCH 079/105] powerpc/mpc85xx: Update TLB CAMs in relocated mode We want to use the TLB mapping helpers in relocated mode as well. These helpers need to have awareness of already occupied TLB entries. We already had them in sync in non-relocated mode, but need to resync them when we move into relocated. Signed-off-by: Alexander Graf --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 7e2746412bd..2656b794be7 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -895,6 +895,7 @@ skip_l2: } #endif + init_used_tlb_cams(); return 0; } From eab3bfbcd18daa8c29c8b6eda00527c01d6f8f27 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Wed, 30 Apr 2014 19:21:14 +0200 Subject: [PATCH 080/105] PPC 85xx QEMU: Make a generic board file This patch enables the E500 QEMU board to use the generic cross-arch board infrastructure. Signed-off-by: Alexander Graf --- include/configs/qemu-ppce500.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 10e014d33c4..763a47ac3dc 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -19,6 +19,7 @@ #undef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xf01000 /* 15 MB */ +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_MPC85XX_NO_RESETVEC From ca721fb292c0d17c586caf1993a22a10f6fffd9c Mon Sep 17 00:00:00 2001 From: Zhao Qiang Date: Wed, 30 Apr 2014 16:45:31 +0800 Subject: [PATCH 081/105] qe: disable qe when qe-ucode fails to be uploaded for "deep sleep" when qe-ucode fails to be uploaded, "deep sleep" will hang. if there is no qe-ucode, disable qe module for platforms which support "deep sleep" Signed-off-by: Zhao Qiang --- drivers/qe/qe.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index b1da75ec4d9..9c5fbd1d694 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -14,6 +14,8 @@ #include "asm/immap_qe.h" #include "qe.h" +#define MPC85xx_DEVDISR_QE_DISABLE 0x1 + qe_map_t *qe_immr = NULL; static qe_snum_t snums[QE_NUM_OF_SNUM]; @@ -317,7 +319,9 @@ int qe_upload_firmware(const struct qe_firmware *firmware) size_t calc_size = sizeof(struct qe_firmware); size_t length; const struct qe_header *hdr; - +#ifdef CONFIG_DEEP_SLEEP + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); +#endif if (!firmware) { printf("Invalid address\n"); return -EINVAL; @@ -330,6 +334,9 @@ int qe_upload_firmware(const struct qe_firmware *firmware) if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') || (hdr->magic[2] != 'F')) { printf("Not a microcode\n"); +#ifdef CONFIG_DEEP_SLEEP + setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_QE_DISABLE); +#endif return -EPERM; } From 18025756b5e79ae96f67e1b5ac87d5ff6467d1cc Mon Sep 17 00:00:00 2001 From: York Sun Date: Fri, 25 Apr 2014 12:06:17 -0700 Subject: [PATCH 082/105] powerpc/mpc8572ds: Increase u-boot size to 768KB U-boot image has grown and exceeded the predefined 512KB. Increasing to 768KB to align with other powerpc boards. Tested on MPC8572DS for 32- and 36-bit targets with NOR flash boot. NAND boot is not covered by this patch. Also update board maintainer for these boards. Signed-off-by: York Sun Acked-by: Heiko Schocher --- boards.cfg | 4 ++-- include/configs/MPC8572DS.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/boards.cfg b/boards.cfg index ba54e2fd362..9fa01a2c35f 100644 --- a/boards.cfg +++ b/boards.cfg @@ -812,8 +812,8 @@ Active powerpc mpc85xx - freescale mpc8568mds Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS - - Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS_ATM MPC8569MDS:ATM - Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS_NAND MPC8569MDS:NAND - -Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS - - -Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_36BIT MPC8572DS:36BIT - +Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS - York Sun +Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_36BIT MPC8572DS:36BIT York Sun Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_NAND MPC8572DS:NAND - Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND P1010RDB:P1010RDB_PA,36BIT,NAND - Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND_SECBOOT P1010RDB:P1010RDB_PA,36BIT,NAND_SECBOOT,SECURE_BOOT - diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 7b63945888b..3a30febcba2 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -30,7 +30,7 @@ #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS From 73a56b6e9f3f1cc2412b5b8a75a3c71f48586c94 Mon Sep 17 00:00:00 2001 From: York Sun Date: Wed, 30 Apr 2014 14:43:45 -0700 Subject: [PATCH 083/105] powerpc/mpc85xx: Ignore FDT pointer for non-QEMU in cpu_init_early_f() The pointer of device tree comes from r3 for QEMU. This is not the case for normal SoCs out of reset. Having gd->fdt_blob as 0 is important for other functions to detect the non-existence of device tree. Signed-off-by: York Sun CC: Alexander Graf --- arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c index 998781b706b..47b712d56b5 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c @@ -102,11 +102,13 @@ void cpu_init_early_f(void *fdt) for (i = 0; i < sizeof(gd_t); i++) ((char *)gd)[i] = 0; +#ifdef CONFIG_QEMU_E500 /* * CONFIG_SYS_CCSRBAR_PHYS below may use gd->fdt_blob on ePAPR systems, * so we need to populate it before it accesses it. */ gd->fdt_blob = fdt; +#endif mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(13); mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_TSIZE(BOOKE_PAGESZ_1M); From bffac7aef54039dbe53dbf8bcbc9f8dbe78b8aa5 Mon Sep 17 00:00:00 2001 From: York Sun Date: Wed, 30 Apr 2014 14:43:46 -0700 Subject: [PATCH 084/105] powerpc/freescale: Change the return value of mac_read_from_eeprom() The return value has not been checked by its caller, until recent change of using generic board architecture. The error of this function is not critical enough to hang the system. Printing the warning message is enough to catch user's attention. U-boot should continue to boot to give user a chance to fix the EEPROM. Chaning the return value to 0 to avoid hanging in the board_init_r(). Signed-off-by: York Sun --- board/freescale/common/sys_eeprom.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 9c18dd82424..33a5a5a8f53 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -425,13 +425,13 @@ int mac_read_from_eeprom(void) if (read_eeprom()) { printf("Read failed.\n"); - return -1; + return 0; } if (!is_valid) { printf("Invalid ID (%02x %02x %02x %02x)\n", e.id[0], e.id[1], e.id[2], e.id[3]); - return -1; + return 0; } #ifdef CONFIG_SYS_I2C_EEPROM_NXID @@ -447,7 +447,7 @@ int mac_read_from_eeprom(void) crcp = (void *)&e + crc_offset; if (crc != be32_to_cpu(*crcp)) { printf("CRC mismatch (%08x != %08x)\n", crc, be32_to_cpu(e.crc)); - return -1; + return 0; } #ifdef CONFIG_SYS_I2C_EEPROM_NXID From 701e640145474131161de53a407d95d0d2f77082 Mon Sep 17 00:00:00 2001 From: York Sun Date: Wed, 30 Apr 2014 14:43:47 -0700 Subject: [PATCH 085/105] powerpc/mpc85xx: Fix boot_flag for calling board_init_f() baord_init_f takes one argument, boot_flag. It has not been used for powerpc, until recently changing to use generic board architecture. The boot flag is added as a return value from cpu_init_f(). Signed-off-by: York Sun CC: Alexander Graf --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 7 ++++--- arch/powerpc/cpu/mpc85xx/spl_minimal.c | 4 +++- arch/powerpc/cpu/mpc85xx/start.S | 2 +- include/common.h | 5 ++++- 4 files changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 2656b794be7..d6cf88555a1 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -368,12 +368,12 @@ void fsl_erratum_a007212_workaround(void) } #endif -void cpu_init_f (void) +ulong cpu_init_f(void) { + ulong flag = 0; extern void m8560_cpm_reset (void); #ifdef CONFIG_SYS_DCSRBAR_PHYS ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - gd = (gd_t *)(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); #endif #if defined(CONFIG_SECURE_BOOT) struct law_entry law; @@ -442,13 +442,14 @@ void cpu_init_f (void) #ifdef CONFIG_DEEP_SLEEP /* disable the console if boot from deep sleep */ if (in_be32(&gur->scrtsr[0]) & (1 << 3)) - gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; + flag = GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; #endif #endif #ifdef CONFIG_SYS_FSL_ERRATUM_A007212 fsl_erratum_a007212_workaround(); #endif + return flag; } /* Implement a dummy function for those platforms w/o SERDES */ diff --git a/arch/powerpc/cpu/mpc85xx/spl_minimal.c b/arch/powerpc/cpu/mpc85xx/spl_minimal.c index 9e4c6c90788..cc45f715e84 100644 --- a/arch/powerpc/cpu/mpc85xx/spl_minimal.c +++ b/arch/powerpc/cpu/mpc85xx/spl_minimal.c @@ -12,7 +12,7 @@ DECLARE_GLOBAL_DATA_PTR; -void cpu_init_f(void) +ulong cpu_init_f(void) { #ifdef CONFIG_SYS_INIT_L2_ADDR ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR; @@ -27,6 +27,8 @@ void cpu_init_f(void) out_be32(&l2cache->l2ctl, (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE)); #endif + + return 0; } #ifndef CONFIG_SYS_FSL_TBCLK_DIV diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 01491464587..d8c9fb6b287 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1158,7 +1158,7 @@ _start_cont: mtmsr r3 isync - bl cpu_init_f + bl cpu_init_f /* return boot_flag for calling board_init_f */ bl board_init_f isync diff --git a/include/common.h b/include/common.h index 2adf5f90b8c..13e5dc74e63 100644 --- a/include/common.h +++ b/include/common.h @@ -729,9 +729,12 @@ void get_sys_info ( sys_info_t * ); #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) void cpu_init_f (volatile immap_t *immr); #endif -#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MCF52x2) ||defined(CONFIG_MPC86xx) +#if defined(CONFIG_4xx) || defined(CONFIG_MCF52x2) || defined(CONFIG_MPC86xx) void cpu_init_f (void); #endif +#ifdef CONFIG_MPC85xx +ulong cpu_init_f(void); +#endif int cpu_init_r (void); #if defined(CONFIG_MPC8260) From 8bae330f5c6542638da7136f39bc9c13214592cc Mon Sep 17 00:00:00 2001 From: York Sun Date: Wed, 30 Apr 2014 14:43:48 -0700 Subject: [PATCH 086/105] powerpc/mpc86xx: Fix boot_flag for calling board_init_f() The argument boot_flag of board_inti_f() hasn't been used for powerpc until recent changing to use generic board. Set it to 0 as a proper value. Signed-off-by: York Sun --- arch/powerpc/cpu/mpc86xx/start.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/cpu/mpc86xx/start.S b/arch/powerpc/cpu/mpc86xx/start.S index e33672a3a01..ec5f4a756af 100644 --- a/arch/powerpc/cpu/mpc86xx/start.S +++ b/arch/powerpc/cpu/mpc86xx/start.S @@ -273,6 +273,7 @@ diag_done: /* bl l2cache_enable */ /* run 1st part of board init code (from Flash) */ + li r3, 0 /* clear boot_flag for calling board_init_f */ bl board_init_f sync From 15672c6dbd7e5a110773480ccfe47b98ba1dc6f8 Mon Sep 17 00:00:00 2001 From: York Sun Date: Wed, 30 Apr 2014 14:43:49 -0700 Subject: [PATCH 087/105] powerpc/freescale: Convert selected boards to generic board architecture This patch converts the following boards to use generic board: MPC8536DS, MPC8572DS, MPC8641HPCN, p1_p2_rdb_pc, corenet_ds, t4qds, B4860QDS. It has been tested on NOR boot on MPC8536DS, MPC8572DS, P1021RDB, P4080DS, P5020DS, P5040DS, P3041DS, T4240QDS, B4860QDS. Signed-off-by: York Sun CC: Ying Zhang CC: Prabhakar Kushwaha CC: Haijun.Zhang CC: Scott Wood CC: Shaohui Xie --- include/configs/B4860QDS.h | 3 +++ include/configs/MPC8536DS.h | 2 ++ include/configs/MPC8572DS.h | 3 +++ include/configs/MPC8641HPCN.h | 3 +++ include/configs/corenet_ds.h | 3 +++ include/configs/p1_p2_rdb_pc.h | 3 +++ include/configs/t4qds.h | 2 ++ 7 files changed, 19 insertions(+) diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index a6125568a2c..47aca9c00f2 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -7,6 +7,9 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO + /* * B4860 QDS board configuration file */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index f15e1626f0b..72f5fde16a7 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -11,6 +11,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #include "../board/freescale/common/ics307_clk.h" #ifdef CONFIG_36BIT diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 3a30febcba2..48ae9d4cae6 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -11,6 +11,9 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO + #include "../board/freescale/common/ics307_clk.h" #ifdef CONFIG_36BIT diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 7443acec80b..a0d7d52627d 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -16,6 +16,9 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO + /* High Level Configuration Options */ #define CONFIG_MPC8641 1 /* MPC8641 specific */ #define CONFIG_MPC8641HPCN 1 /* MPC8641HPCN board specific */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index db6b9be73c6..c8b7c2dff78 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -10,6 +10,9 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO + #include "../board/freescale/common/ics307_clk.h" #ifdef CONFIG_RAMBOOT_PBL diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index e745945ba73..56b638e23b6 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -10,6 +10,9 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO + #ifdef CONFIG_36BIT #define CONFIG_PHYS_64BIT #endif diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index 36bc5294ef4..75609b9f617 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -10,6 +10,8 @@ #ifndef __T4QDS_H #define __T4QDS_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_CMD_REGINFO /* High Level Configuration Options */ From 8ad5d45e0044f5e64dbe7c6bd4e6aa0121a26b23 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 30 Apr 2014 12:55:22 +0900 Subject: [PATCH 088/105] boards.cfg: fix a configuration error of ep8248 board "make ep8248_config" fails with an error like this: $ make ep8248_config make: *** [ep8248_config] Error 1 Its cause is that there are two entries for "ep8248". The first is around line 652 of boards.cfg. (as Active) The second appears around line 1230. (as Orphan) This bug was accidentally introduced by commit e7e90901. But it is not the author's fault. He just intended to change IDS8247 board. The commiter added ep8248 entry by mistake when he resolved a conflict. Signed-off-by: Masahiro Yamada Cc: Heiko Schocher Cc: Kim Phillips Acked-by: Heiko Schocher Acked-by: Kim Phillips --- boards.cfg | 1 - 1 file changed, 1 deletion(-) diff --git a/boards.cfg b/boards.cfg index 9fa01a2c35f..3a59686c29a 100644 --- a/boards.cfg +++ b/boards.cfg @@ -652,7 +652,6 @@ Active powerpc mpc8260 - - cpu86 Active powerpc mpc8260 - - cpu86 CPU86_ROMBOOT CPU86:BOOT_ROM Wolfgang Denk Active powerpc mpc8260 - - cpu87 CPU87 - - Active powerpc mpc8260 - - cpu87 CPU87_ROMBOOT CPU87:BOOT_ROM - -Active powerpc mpc8260 - - ep8248 ep8248 - Yuli Barcohen Active powerpc mpc8260 - - iphase4539 IPHASE4539 - Wolfgang Grandegger Active powerpc mpc8260 - - muas3001 muas3001 - Heiko Schocher Active powerpc mpc8260 - - muas3001 muas3001_dev muas3001:MUAS_DEV_BOARD Heiko Schocher From fab356a0b87d57d474d6e87408f1ede98a503150 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 3 May 2014 17:46:26 +0200 Subject: [PATCH 089/105] mvtwsi: Fix clock programming The TWSI_FREQUENCY macro was wrong in 2 ways: 1) It was casting the result of the calculations to an u8, while i2c clk rates are often >= 100Khz which won't fit in a u8, drop the cast. 2) It had an extra factor of 2 in the divider which neither the datasheet nor the Linux driver have. The comment for the default value was wrongly saying that m lives in bits 4-7, while in reality it is in bits 3-6, as can be seen from the correct shift by 3 used in i2c_init(). While at it remove the unused twsi_actual_speed variable. Signed-off-by: Hans de Goede --- drivers/i2c/mvtwsi.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c index 90c83879182..b44944378a9 100644 --- a/drivers/i2c/mvtwsi.c +++ b/drivers/i2c/mvtwsi.c @@ -216,7 +216,7 @@ static int twsi_stop(int status) */ #define TWSI_FREQUENCY(m, n) \ - ((u8) (CONFIG_SYS_TCLK / (10 * (m + 1) * 2 * (1 << n)))) + (CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n))) /* * These are required to be reprogrammed before enabling the controller @@ -225,10 +225,8 @@ static int twsi_stop(int status) * twsi_slave_address left uninitialized lest checkpatch.pl complains. */ -/* Baudrate generator: m (bits 7..4) =4, n (bits 3..0) =4 */ +/* Baudrate generator: m (bits 6..3) = 8, n (bits 2..0) = 4 */ static u8 twsi_baud_rate = 0x44; /* baudrate at controller reset */ -/* Default frequency corresponding to default m=4, n=4 */ -static u8 twsi_actual_speed = TWSI_FREQUENCY(4, 4); /* Default slave address is 0 (so is an uninitialized static) */ static u8 twsi_slave_address; @@ -279,7 +277,6 @@ void i2c_init(int requested_speed, int slaveadd) } /* save baud rate and slave for later calls to twsi_reset */ twsi_baud_rate = baud; - twsi_actual_speed = highest_speed; twsi_slave_address = slaveadd; /* reset controller */ twsi_reset(); From 2072e7262965bb48d7fffb1e283101e6ed8b21a8 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 3 May 2014 17:46:27 +0200 Subject: [PATCH 090/105] mvtwsi: Remove unnecessary twsi_baud_rate and twsi_slave_address globals These are used only once, so their is no need to have them global. This also stops mvtwsi from using any bss vars making it easier to use before dram init (to talk to the pmic to set the dram voltage). Signed-off-by: Hans de Goede --- drivers/i2c/mvtwsi.c | 23 ++++------------------- 1 file changed, 4 insertions(+), 19 deletions(-) diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c index b44944378a9..5ba0e038624 100644 --- a/drivers/i2c/mvtwsi.c +++ b/drivers/i2c/mvtwsi.c @@ -218,25 +218,13 @@ static int twsi_stop(int status) #define TWSI_FREQUENCY(m, n) \ (CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n))) -/* - * These are required to be reprogrammed before enabling the controller - * because a reset loses them. - * Default values come from the spec, but a twsi_reset will change them. - * twsi_slave_address left uninitialized lest checkpatch.pl complains. - */ - -/* Baudrate generator: m (bits 6..3) = 8, n (bits 2..0) = 4 */ -static u8 twsi_baud_rate = 0x44; /* baudrate at controller reset */ -/* Default slave address is 0 (so is an uninitialized static) */ -static u8 twsi_slave_address; - /* * Reset controller. * Called at end of i2c_init unsuccessful i2c transactions. * Controller reset also resets the baud rate and slave address, so * re-establish them. */ -static void twsi_reset(void) +static void twsi_reset(u8 baud_rate, u8 slave_address) { /* ensure controller will be enabled by any twsi*() function */ twsi_control_flags = MVTWSI_CONTROL_TWSIEN; @@ -245,9 +233,9 @@ static void twsi_reset(void) /* wait 2 ms -- this is what the Marvell LSP does */ udelay(20000); /* set baud rate */ - writel(twsi_baud_rate, &twsi->baudrate); + writel(baud_rate, &twsi->baudrate); /* set slave address even though we don't use it */ - writel(twsi_slave_address, &twsi->slave_address); + writel(slave_address, &twsi->slave_address); writel(0, &twsi->xtnd_slave_addr); /* assert STOP but don't care for the result */ (void) twsi_stop(0); @@ -275,11 +263,8 @@ void i2c_init(int requested_speed, int slaveadd) } } } - /* save baud rate and slave for later calls to twsi_reset */ - twsi_baud_rate = baud; - twsi_slave_address = slaveadd; /* reset controller */ - twsi_reset(); + twsi_reset(baud, slaveadd); } /* From c6eb9458e82cb47afa8f20e21a4cac5211eab557 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 14 May 2014 12:54:37 +0900 Subject: [PATCH 091/105] Revert "sandbox: move source files from board/ to arch/sandbox/" This reverts commit 258060905e04fe2eb509756ef3b37e23e220a2d6. Conflicts: boards.cfg Wrong patch 25806090 was applied by accident. Revert it. Signed-off-by: Masahiro Yamada Cc: Simon Glass Acked-by: Simon Glass --- arch/sandbox/lib/Makefile | 2 +- board/sandbox/sandbox/Makefile | 7 +++++++ {doc => board/sandbox/sandbox}/README.sandbox | 0 {arch/sandbox/lib => board/sandbox/sandbox}/sandbox.c | 0 boards.cfg | 2 +- 5 files changed, 9 insertions(+), 2 deletions(-) create mode 100644 board/sandbox/sandbox/Makefile rename {doc => board/sandbox/sandbox}/README.sandbox (100%) rename {arch/sandbox/lib => board/sandbox/sandbox}/sandbox.c (100%) diff --git a/arch/sandbox/lib/Makefile b/arch/sandbox/lib/Makefile index 6480ebfca67..4c1a38d6bcb 100644 --- a/arch/sandbox/lib/Makefile +++ b/arch/sandbox/lib/Makefile @@ -8,4 +8,4 @@ # -obj-y += interrupts.o sandbox.o +obj-y += interrupts.o diff --git a/board/sandbox/sandbox/Makefile b/board/sandbox/sandbox/Makefile new file mode 100644 index 00000000000..a0b9880d6e3 --- /dev/null +++ b/board/sandbox/sandbox/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (c) 2011 The Chromium OS Authors. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := sandbox.o diff --git a/doc/README.sandbox b/board/sandbox/sandbox/README.sandbox similarity index 100% rename from doc/README.sandbox rename to board/sandbox/sandbox/README.sandbox diff --git a/arch/sandbox/lib/sandbox.c b/board/sandbox/sandbox/sandbox.c similarity index 100% rename from arch/sandbox/lib/sandbox.c rename to board/sandbox/sandbox/sandbox.c diff --git a/boards.cfg b/boards.cfg index 3a59686c29a..b01672d535d 100644 --- a/boards.cfg +++ b/boards.cfg @@ -1183,7 +1183,7 @@ Active powerpc ppc4xx - xilinx ppc405-generic Active powerpc ppc4xx - xilinx ppc405-generic xilinx-ppc405-generic_flash xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1 Ricardo Ribalda Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic_flash xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda -Active sandbox sandbox - - sandbox - Simon Glass +Active sandbox sandbox - sandbox sandbox sandbox - Simon Glass Active sh sh2 - renesas rsk7203 rsk7203 - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu Active sh sh2 - renesas rsk7264 rsk7264 - Phil Edworthy Active sh sh2 - renesas rsk7269 rsk7269 - - From 2dabac1337facbdef20d1a9bf54b68225d2518dc Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 14 May 2014 12:57:28 +0900 Subject: [PATCH 092/105] sandbox: set sandbox's vendor to null Because sandbox is not a real hardware, setting vendor=sandbox is almost meaningless. This commit sets sandbox's vendor field to '-'. It is a good thing that it decreases one level directory hierarchy. The files board/sandbox/sandbox/* have been moved to board/sandbox/*. Signed-off-by: Masahiro Yamada Acked-by: Simon Glass Tested-by: Simon Glass --- board/sandbox/{sandbox => }/Makefile | 0 board/sandbox/{sandbox => }/README.sandbox | 0 board/sandbox/{sandbox => }/sandbox.c | 0 boards.cfg | 2 +- 4 files changed, 1 insertion(+), 1 deletion(-) rename board/sandbox/{sandbox => }/Makefile (100%) rename board/sandbox/{sandbox => }/README.sandbox (100%) rename board/sandbox/{sandbox => }/sandbox.c (100%) diff --git a/board/sandbox/sandbox/Makefile b/board/sandbox/Makefile similarity index 100% rename from board/sandbox/sandbox/Makefile rename to board/sandbox/Makefile diff --git a/board/sandbox/sandbox/README.sandbox b/board/sandbox/README.sandbox similarity index 100% rename from board/sandbox/sandbox/README.sandbox rename to board/sandbox/README.sandbox diff --git a/board/sandbox/sandbox/sandbox.c b/board/sandbox/sandbox.c similarity index 100% rename from board/sandbox/sandbox/sandbox.c rename to board/sandbox/sandbox.c diff --git a/boards.cfg b/boards.cfg index b01672d535d..da7a0db0811 100644 --- a/boards.cfg +++ b/boards.cfg @@ -1183,7 +1183,7 @@ Active powerpc ppc4xx - xilinx ppc405-generic Active powerpc ppc4xx - xilinx ppc405-generic xilinx-ppc405-generic_flash xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1 Ricardo Ribalda Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic_flash xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda -Active sandbox sandbox - sandbox sandbox sandbox - Simon Glass +Active sandbox sandbox - - sandbox sandbox - Simon Glass Active sh sh2 - renesas rsk7203 rsk7203 - Nobuhiro Iwamatsu :Nobuhiro Iwamatsu Active sh sh2 - renesas rsk7264 rsk7264 - Phil Edworthy Active sh sh2 - renesas rsk7269 rsk7269 - - From 6be6b6bcbac62e356d05bdde488fc9f0eef7084a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 13 May 2014 12:14:02 -0600 Subject: [PATCH 093/105] patman: Suppress duplicate signoffs only for real patches MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There is an unfortunate bug in the signoff suppression logic. The first pass is performed with 'git log', and all signoffs are added to the supression set, such that the second time (when processing the real patches) we always suppress the signoffs. Correct this by only suppressing signoffs in the second pass. Signed-off-by: Simon Glass Tested-by: Michal Simek Tested-by: Andreas Bießmann --- tools/patman/patchstream.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py index 9f5682cd0f5..32287192077 100644 --- a/tools/patman/patchstream.py +++ b/tools/patman/patchstream.py @@ -275,7 +275,8 @@ class PatchStream: # Suppress duplicate signoffs elif signoff_match: - if self.commit.CheckDuplicateSignoff(signoff_match.group(1)): + if (self.is_log or + self.commit.CheckDuplicateSignoff(signoff_match.group(1))): out = [line] # Well that means this is an ordinary line From ffc8667acf5c01e2b1ab7b7bb640ddaf2d1f2784 Mon Sep 17 00:00:00 2001 From: Chunhe Lan Date: Wed, 16 Apr 2014 16:40:52 +0800 Subject: [PATCH 094/105] net: phy/vitesse: Add support for VSC8664 phy module This patch adds support for VSC8664 PHY module which can be found on Freescale's T4240RDB boards. Signed-off-by: Chunhe Lan Reviewed-by: York Sun --- drivers/net/phy/vitesse.c | 46 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c index 3a55d271a53..c58fe50b720 100644 --- a/drivers/net/phy/vitesse.c +++ b/drivers/net/phy/vitesse.c @@ -58,6 +58,14 @@ #define MIIM_VSC8514_18G_QSGMII 0x80e0 #define MIIM_VSC8514_18G_CMDSTAT 0x8000 +/* Vitesse VSC8664 Control/Status Register */ +#define MIIM_VSC8664_SERDES_AND_SIGDET 0x13 +#define MIIM_VSC8664_ADDITIONAL_DEV 0x16 +#define MIIM_VSC8664_EPHY_CON 0x17 +#define MIIM_VSC8664_LED_CON 0x1E + +#define PHY_EXT_PAGE_ACCESS_EXTENDED 0x0001 + /* CIS8201 */ static int vitesse_config(struct phy_device *phydev) { @@ -244,6 +252,33 @@ static int vsc8514_config(struct phy_device *phydev) return 0; } +static int vsc8664_config(struct phy_device *phydev) +{ + u32 val; + + /* Enable MAC interface auto-negotiation */ + phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 0); + val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_EPHY_CON); + val |= (1 << 13); + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_EPHY_CON, val); + + phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, + PHY_EXT_PAGE_ACCESS_EXTENDED); + val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_SERDES_AND_SIGDET); + val |= (1 << 11); + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_SERDES_AND_SIGDET, val); + phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 0); + + /* Enable LED blink */ + val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_LED_CON); + val &= ~(1 << 2); + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_LED_CON, val); + + genphy_config_aneg(phydev); + + return 0; +} + static struct phy_driver VSC8211_driver = { .name = "Vitesse VSC8211", .uid = 0xfc4b0, @@ -334,6 +369,16 @@ static struct phy_driver VSC8662_driver = { .shutdown = &genphy_shutdown, }; +static struct phy_driver VSC8664_driver = { + .name = "Vitesse VSC8664", + .uid = 0x70660, + .mask = 0xffff0, + .features = PHY_GBIT_FEATURES, + .config = &vsc8664_config, + .startup = &vitesse_startup, + .shutdown = &genphy_shutdown, +}; + /* Vitesse bought Cicada, so we'll put these here */ static struct phy_driver cis8201_driver = { .name = "CIS8201", @@ -366,6 +411,7 @@ int phy_vitesse_init(void) phy_register(&VSC8574_driver); phy_register(&VSC8514_driver); phy_register(&VSC8662_driver); + phy_register(&VSC8664_driver); phy_register(&cis8201_driver); phy_register(&cis8204_driver); From 477c894ff475be9886bd936fa8eeef7bfe862161 Mon Sep 17 00:00:00 2001 From: Ebony Zhu Date: Fri, 25 Apr 2014 18:38:44 -0500 Subject: [PATCH 095/105] board/freescale: Move CRC32 offset in NXID v1 data format According to AN3638, CRC of NXID v1 is at the end of the 256-byte I2C memory. The wrong CRC32 offset prevents Uboot from reading system information from EEPROM. No NXID v0 is being used on Freescale boards. Signed-off-by: Ebony Zhu Reviewed-by: York Sun --- board/freescale/common/sys_eeprom.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 33a5a5a8f53..6144c533ef2 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -21,7 +21,7 @@ /* some boards with non-256-bytes EEPROM have special define */ /* for MAX_NUM_PORTS in board-specific file */ #ifndef MAX_NUM_PORTS -#define MAX_NUM_PORTS 23 +#define MAX_NUM_PORTS 16 #endif #define NXID_VERSION 1 #endif @@ -58,8 +58,9 @@ static struct __attribute__ ((__packed__)) eeprom { u8 res_1[21]; /* 0x2b - 0x3f Reserved */ u8 mac_count; /* 0x40 Number of MAC addresses */ u8 mac_flag; /* 0x41 MAC table flags */ - u8 mac[MAX_NUM_PORTS][6]; /* 0x42 - x MAC addresses */ - u32 crc; /* x+1 CRC32 checksum */ + u8 mac[MAX_NUM_PORTS][6]; /* 0x42 - 0xa1 MAC addresses */ + u8 res_2[90]; /* 0xa2 - 0xfb Reserved */ + u32 crc; /* 0xfc - 0xff CRC32 checksum */ #endif } e; From 0f1fa36ffffbd34c8512eeacade7139bcffda47c Mon Sep 17 00:00:00 2001 From: Tang Yuantian Date: Wed, 7 May 2014 10:25:06 +0800 Subject: [PATCH 096/105] powerpc/t104xrdb: Toggle deep sleep management signals after resume T104xrdb has several sleep management signals that are used for deep sleep. They are enabled by OS to enter deep sleep and should be disabled by u-boot when cores wake up. Signed-off-by: Tang Yuantian Reviewed-by: York Sun --- board/freescale/t104xrdb/t104xrdb.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c index fb5b84940ea..a5e5fffac4c 100644 --- a/board/freescale/t104xrdb/t104xrdb.c +++ b/board/freescale/t104xrdb/t104xrdb.c @@ -109,6 +109,8 @@ void ft_board_setup(void *blob, bd_t *bd) #ifdef CONFIG_DEEP_SLEEP void board_mem_sleep_setup(void) { + /* does not provide HW signals for power management */ + CPLD_WRITE(misc_ctl_status, (CPLD_READ(misc_ctl_status) & ~0x40)); /* Disable MCKE isolation */ gpio_set_value(2, 0); udelay(1); From f1a96ec1a9920854c3308a062caca0b339bd1e3b Mon Sep 17 00:00:00 2001 From: Chunhe Lan Date: Wed, 7 May 2014 10:50:20 +0800 Subject: [PATCH 097/105] fsl/pci: Add workaround for erratum A-005434 By default, all PEX inbound windows PEX_PEXIWARn[TRGT] are mapped to 0xF, which is local memory. But for BSC9132, 0xF is CCSR, 0x0 is local memory. Signed-off-by: Minghuan Lian Signed-off-by: Chunhe Lan Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 +++ arch/powerpc/include/asm/config_mpc85xx.h | 1 + drivers/pci/fsl_pci_init.c | 9 +++++++-- 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 9d8acd0aa17..3d37a7614f9 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -299,6 +299,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A007212 check_erratum_a007212(); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A005434 + puts("Work-around for Erratum A-005434 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 8a7d4d8a1dc..e124b07b25d 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -591,6 +591,7 @@ #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" #define CONFIG_SYS_FSL_ERRATUM_A005125 +#define CONFIG_SYS_FSL_ERRATUM_A005434 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 #define CONFIG_ESDHC_HC_BLK_ADDR diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 6317fb13241..3a41b0ec173 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -49,8 +49,13 @@ static void set_inbound_window(volatile pit_t *pi, u64 size) { u32 sz = (__ilog2_u64(size) - 1); - u32 flag = PIWAR_EN | PIWAR_LOCAL | - PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP; +#ifdef CONFIG_SYS_FSL_ERRATUM_A005434 + u32 flag = 0; +#else + u32 flag = PIWAR_LOCAL; +#endif + + flag |= PIWAR_EN | PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP; out_be32(&pi->pitar, r->phys_start >> 12); out_be32(&pi->piwbar, r->bus_start >> 12); From 1a344456a95b28f28e47f66aa4ec4ac88f703f35 Mon Sep 17 00:00:00 2001 From: Chunhe Lan Date: Wed, 7 May 2014 10:56:18 +0800 Subject: [PATCH 098/105] powerpc/85xx: Add T4160RDB board support T4160RDB shares the same platform as T4240RDB. T4160 is a low power version of T4240, with the eight e6500 cores, two DDR3 controllers, and same peripheral bus interfaces. Signed-off-by: Chunhe Lan Reviewed-by: York Sun --- boards.cfg | 1 + include/configs/T4240RDB.h | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/boards.cfg b/boards.cfg index 3a59686c29a..8bffe7ad4b4 100644 --- a/boards.cfg +++ b/boards.cfg @@ -983,6 +983,7 @@ Active powerpc mpc85xx - freescale t4qds Active powerpc mpc85xx - freescale t4qds T4240QDS_SECURE_BOOT T4240QDS:PPC_T4240,SECURE_BOOT Aneesh Bansal Active powerpc mpc85xx - freescale t4qds T4240QDS_SPIFLASH T4240QDS:PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 - Active powerpc mpc85xx - freescale t4qds T4240QDS_SRIO_PCIE_BOOT T4240QDS:PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - +Active powerpc mpc85xx - freescale t4rdb T4160RDB T4240RDB:PPC_T4160 Chunhe Lan Active powerpc mpc85xx - freescale t4rdb T4240RDB T4240RDB:PPC_T4240 Chunhe Lan Active powerpc mpc85xx - gdsys p1022 controlcenterd_36BIT_SDCARD controlcenterd:36BIT,SDCARD Dirk Eibach Active powerpc mpc85xx - gdsys p1022 controlcenterd_36BIT_SDCARD_DEVELOP controlcenterd:36BIT,SDCARD,DEVELOP Dirk Eibach diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index b1a8053a539..183255d2831 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -678,7 +678,11 @@ unsigned long get_board_ddr_clk(void); * interleaving. It can be cacheline, page, bank, superbank. * See doc/README.fsl-ddr for details. */ +#ifdef CONFIG_PPC_T4240 #define CTRL_INTLV_PREFERED 3way_4KB +#else +#define CTRL_INTLV_PREFERED cacheline +#endif #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:" \ From 9c3fdd883a8c9aa32b52abf8ccc180bd4929826f Mon Sep 17 00:00:00 2001 From: Shaveta Leekha Date: Wed, 7 May 2014 14:43:23 +0530 Subject: [PATCH 099/105] powerpc/mpc85xx: Added B4460 support B4460 differs from B4860 only in number of CPU cores, hence used existing support for B4860. B4460 has 2 PPC cores whereas B4860 has 4 PPC cores. Signed-off-by: Shaveta Leekha Signed-off-by: Sandeep Singh Signed-off-by: Poonam Aggrwal Reviewed-by: York Sun --- arch/powerpc/cpu/mpc8xxx/cpu.c | 1 + arch/powerpc/include/asm/processor.h | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index 13bd0acdfb6..15561a15331 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -67,6 +67,7 @@ static struct cpu_type cpu_type_list[] = { CPU_TYPE_ENTRY(G4860, G4860, 0), CPU_TYPE_ENTRY(G4060, G4060, 0), CPU_TYPE_ENTRY(B4440, B4440, 0), + CPU_TYPE_ENTRY(B4460, B4460, 0), CPU_TYPE_ENTRY(G4440, G4440, 0), CPU_TYPE_ENTRY(B4420, B4420, 0), CPU_TYPE_ENTRY(B4220, B4220, 0), diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index a6f121e113a..edd7375c18b 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -1117,6 +1117,7 @@ #define SVR_C293 0x850030 #define SVR_B4860 0X868000 #define SVR_G4860 0x868001 +#define SVR_B4460 0x868003 #define SVR_G4060 0x868003 #define SVR_B4440 0x868100 #define SVR_G4440 0x868101 From 15231f6dd14b592e2bdef33f6aea1ca1d88fd1bf Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Thu, 8 May 2014 17:05:26 +0530 Subject: [PATCH 100/105] drivers/usb : Define usb control register mask for w1c bits Define and use CONTROL_REGISTER_W1C_MASK to make sure that w1c bits of usb control register do not get reset while writing any other bit Signed-off-by: Nikhil Badola Signed-off-by: Ramneek Mehresh Reviewed-by: York Sun --- drivers/usb/host/ehci-fsl.c | 15 ++++++++++----- include/usb/ehci-fsl.h | 2 ++ 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index 6cb4d986685..45062e699bd 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -104,15 +104,20 @@ int ehci_hcd_init(int index, enum usb_init_type init, if (!strncmp(phy_type, "utmi", 4)) { #if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY) - setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI); - setbits_be32(&ehci->control, UTMI_PHY_EN); + clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK, + PHY_CLK_SEL_UTMI); + clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK, + UTMI_PHY_EN); udelay(1000); /* delay required for PHY Clk to appear */ #endif out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI); - setbits_be32(&ehci->control, USB_EN); + clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK, + USB_EN); } else { - setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI); - clrsetbits_be32(&ehci->control, UTMI_PHY_EN, USB_EN); + clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK, + PHY_CLK_SEL_ULPI); + clrsetbits_be32(&ehci->control, UTMI_PHY_EN | + CONTROL_REGISTER_W1C_MASK, USB_EN); udelay(1000); /* delay required for PHY Clk to appear */ if (!usb_phy_clk_valid(ehci)) return -EINVAL; diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h index c9ee1d5bf62..dd77ad63254 100644 --- a/include/usb/ehci-fsl.h +++ b/include/usb/ehci-fsl.h @@ -11,6 +11,8 @@ #include +#define CONTROL_REGISTER_W1C_MASK 0x00020000 /* W1C: PHY_CLK_VALID */ + /* Global offsets */ #define FSL_SKIP_PCI 0x100 From 80ba6a6f2ae347b84a607ec085c6f0acd1584aaa Mon Sep 17 00:00:00 2001 From: ramneek mehresh Date: Tue, 13 May 2014 15:36:07 +0530 Subject: [PATCH 101/105] mpc85xx/p1020:Define number of USB controllers used on P1020RDB-PD platform P1020 SoC which has two USB controllers, but only first one is used on this platform. Signed-off-by: Ramneek Mehresh Reviewed-by: York Sun --- arch/powerpc/include/asm/config_mpc85xx.h | 2 ++ include/configs/p1_p2_rdb_pc.h | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index e124b07b25d..34fc8fb5347 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -247,7 +247,9 @@ #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ERRATUM_A005125 +#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#endif #elif defined(CONFIG_P1021) #define CONFIG_MAX_CPUS 2 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 56b638e23b6..185df775aa0 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -886,6 +886,10 @@ #endif #endif +#if defined(CONFIG_P1020RDB_PD) +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#endif + #define CONFIG_MMC #ifdef CONFIG_MMC From 3051f3f999cc1bae465126f5766329058e12acfa Mon Sep 17 00:00:00 2001 From: Aneesh Bansal Date: Wed, 14 May 2014 11:45:15 +0530 Subject: [PATCH 102/105] powerpc/mpc85xx: SECURE BOOT- corrected CSPR settings for BSC9132QDS NAND In case of secure boot from NAND, CSPR and FTIM settings are same as non-secure NAND boot. CSPR0 is configured as NAND and CSPR1 is configured as NOR. Signed-off-by: Aneesh Bansal Reviewed-by: York Sun --- include/configs/BSC9132QDS.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index e76a04b2625..7bb5d33d0cc 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -360,7 +360,7 @@ combinations. this should be removed later #endif /* Set up IFC registers for boot location NOR/NAND */ -#if defined(CONFIG_NAND) +#if defined(CONFIG_NAND) || defined(CONFIG_NAND_SECBOOT) #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK #define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR From bc2d40ca10075c8bf0c8c3cb970b1381caf5c588 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Thu, 15 May 2014 16:43:12 +0530 Subject: [PATCH 103/105] board/p1_p2_rdb:Enable p1_p2_rdb boot from NAND/SD/SPI in SPL In the earlier patches, the SPL/TPL fraamework was introduced. For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The SPL was loaded by the code from the internal on-chip ROM. The SPL initializes the DDR according to the SPD and loads the final uboot image into DDR, then jump to the DDR to begin execution. For NAND booting way, the nand SPL has size limitation on some board(e.g. P1010RDB), it can not be more than 4KB, we can call it "minimal SPL", So the dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD and loads the final uboot image into DDR,then jump to the DDR to begin execution. This patch enabled SPL/TPL for P1_P2_RDB to support starting from NAND/SD/SPI flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL. Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to execute, so the section .resetvec is no longer needed. Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun --- board/freescale/p1_p2_rdb/Makefile | 21 +- board/freescale/p1_p2_rdb/ddr.c | 16 +- board/freescale/p1_p2_rdb/spl.c | 141 +++++++++ board/freescale/p1_p2_rdb/spl_minimal.c | 84 ++++++ board/freescale/p1_p2_rdb/tlb.c | 18 +- include/configs/P1_P2_RDB.h | 267 ++++++++++++------ nand_spl/board/freescale/p1_p2_rdb/Makefile | 91 ------ .../board/freescale/p1_p2_rdb/nand_boot.c | 82 ------ 8 files changed, 451 insertions(+), 269 deletions(-) create mode 100644 board/freescale/p1_p2_rdb/spl.c create mode 100644 board/freescale/p1_p2_rdb/spl_minimal.c delete mode 100644 nand_spl/board/freescale/p1_p2_rdb/Makefile delete mode 100644 nand_spl/board/freescale/p1_p2_rdb/nand_boot.c diff --git a/board/freescale/p1_p2_rdb/Makefile b/board/freescale/p1_p2_rdb/Makefile index f7b568a0216..a97bf45f00f 100644 --- a/board/freescale/p1_p2_rdb/Makefile +++ b/board/freescale/p1_p2_rdb/Makefile @@ -4,8 +4,27 @@ # SPDX-License-Identifier: GPL-2.0+ # +MINIMAL= + +ifdef CONFIG_SPL_BUILD +ifdef CONFIG_SPL_INIT_MINIMAL +MINIMAL=y +endif +endif + +ifdef MINIMAL + +obj-y += spl_minimal.o tlb.o law.o + +else +ifdef CONFIG_SPL_BUILD +obj-y += spl.o +else obj-y += p1_p2_rdb.o +obj-$(CONFIG_PCI) += pci.o +endif obj-y += ddr.o obj-y += law.o -obj-$(CONFIG_PCI) += pci.o obj-y += tlb.o + +endif diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c index 17d3beac390..98ee5f10215 100644 --- a/board/freescale/p1_p2_rdb/ddr.c +++ b/board/freescale/p1_p2_rdb/ddr.c @@ -180,27 +180,22 @@ fsl_ddr_cfg_regs_t ddr_cfg_regs_800 = { phys_size_t fixed_sdram (void) { - char buf[32]; fsl_ddr_cfg_regs_t ddr_cfg_regs; size_t ddr_size; struct cpu_type *cpu; ulong ddr_freq, ddr_freq_mhz; cpu = gd->arch.cpu; - /* P1020 and it's derivatives support max 32bit DDR width */ - if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1011) { - ddr_size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 / 2); - } else { - ddr_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; - } + + ddr_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + #if defined(CONFIG_SYS_RAMBOOT) return ddr_size; #endif ddr_freq = get_ddr_freq(0); ddr_freq_mhz = ddr_freq / 1000000; - printf("Configuring DDR for %s MT/s data rate\n", - strmhz(buf, ddr_freq)); + printf("Configuring DDR for %ld T/s data rate\n", ddr_freq); if(ddr_freq_mhz <= 400) memcpy(&ddr_cfg_regs, &ddr_cfg_regs_400, sizeof(ddr_cfg_regs)); @@ -211,8 +206,7 @@ phys_size_t fixed_sdram (void) else if(ddr_freq_mhz <= 800) memcpy(&ddr_cfg_regs, &ddr_cfg_regs_800, sizeof(ddr_cfg_regs)); else - panic("Unsupported DDR data rate %s MT/s data rate\n", - strmhz(buf, ddr_freq)); + panic("Unsupported DDR data rate %ld T/s\n", ddr_freq); /* P1020 and it's derivatives support max 32bit DDR width */ if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1011) { diff --git a/board/freescale/p1_p2_rdb/spl.c b/board/freescale/p1_p2_rdb/spl.c new file mode 100644 index 00000000000..f30c5fe3e6d --- /dev/null +++ b/board/freescale/p1_p2_rdb/spl.c @@ -0,0 +1,141 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define SYSCLK_MASK 0x00200000 +#define BOARDREV_MASK 0x10100000 + +#define SYSCLK_66 66666666 +#define SYSCLK_100 100000000 + +unsigned long get_board_sys_clk(ulong dummy) +{ + ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); + u32 val_gpdat, sysclk_gpio; + + val_gpdat = in_be32(&pgpio->gpdat); + sysclk_gpio = val_gpdat & SYSCLK_MASK; + + if (sysclk_gpio == 0) + return SYSCLK_66; + else + return SYSCLK_100; + + return 0; +} + +phys_size_t get_effective_memsize(void) +{ + return CONFIG_SYS_L2_SIZE; +} + +void board_init_f(ulong bootflag) +{ + u32 plat_ratio, bus_clk; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + + console_init_f(); + + /* Set pmuxcr to allow both i2c1 and i2c2 */ + setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); + setbits_be32(&gur->pmuxcr, + in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); + + /* Read back the register to synchronize the write. */ + in_be32(&gur->pmuxcr); + +#ifdef CONFIG_SPL_SPI_BOOT + clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); +#endif + + /* initialize selected port with appropriate baud rate */ + plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; + plat_ratio >>= 1; + bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; + gd->bus_clk = bus_clk; + + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + bus_clk / 16 / CONFIG_BAUDRATE); +#ifdef CONFIG_SPL_MMC_BOOT + puts("\nSD boot...\n"); +#elif defined(CONFIG_SPL_SPI_BOOT) + puts("\nSPI Flash boot...\n"); +#endif + + /* copy code to RAM and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + /* Pointer is writable since we allocated a register for it */ + gd = (gd_t *)CONFIG_SPL_GD_ADDR; + bd_t *bd; + + memset(gd, 0, sizeof(gd_t)); + bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); + memset(bd, 0, sizeof(bd_t)); + gd->bd = bd; + bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; + bd->bi_memsize = CONFIG_SYS_L2_SIZE; + + probecpu(); + get_clocks(); + mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, + CONFIG_SPL_RELOC_MALLOC_SIZE); + +#ifdef CONFIG_SPL_MMC_BOOT + mmc_initialize(bd); +#endif + /* relocate environment function pointers etc. */ +#ifdef CONFIG_SPL_NAND_BOOT + nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + (uchar *)CONFIG_ENV_ADDR); +#endif +#ifdef CONFIG_SPL_NAND_BOOT + nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + (uchar *)CONFIG_ENV_ADDR); +#endif +#ifdef CONFIG_SPL_MMC_BOOT + mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + (uchar *)CONFIG_ENV_ADDR); +#endif +#ifdef CONFIG_SPL_SPI_BOOT + spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + (uchar *)CONFIG_ENV_ADDR); +#endif + + gd->env_addr = (ulong)(CONFIG_ENV_ADDR); + gd->env_valid = 1; + + gd->ram_size = initdram(0); +#ifdef CONFIG_SPL_NAND_BOOT + puts("Tertiary program loader running in sram..."); +#else + puts("Second program loader running in sram...\n"); +#endif + +#ifdef CONFIG_SPL_MMC_BOOT + mmc_boot(); +#elif defined(CONFIG_SPL_SPI_BOOT) + spi_boot(); +#elif defined(CONFIG_SPL_NAND_BOOT) + nand_boot(); +#endif +} diff --git a/board/freescale/p1_p2_rdb/spl_minimal.c b/board/freescale/p1_p2_rdb/spl_minimal.c new file mode 100644 index 00000000000..96a4d1cb0ae --- /dev/null +++ b/board/freescale/p1_p2_rdb/spl_minimal.c @@ -0,0 +1,84 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; +#define SYSCLK_MASK 0x00200000 +#define BOARDREV_MASK 0x10100000 + +#define SYSCLK_66 66666666 +#define SYSCLK_100 100000000 + +unsigned long get_board_sys_clk(ulong dummy) +{ + ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); + u32 val_gpdat, sysclk_gpio; + + val_gpdat = in_be32(&pgpio->gpdat); + sysclk_gpio = val_gpdat & SYSCLK_MASK; + + if (sysclk_gpio == 0) + return SYSCLK_66; + else + return SYSCLK_100; + + return 0; +} + +void board_init_f(ulong bootflag) +{ + u32 plat_ratio; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + +#if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM) + set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM); + set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM); +#endif + + /* initialize selected port with appropriate baud rate */ + plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; + plat_ratio >>= 1; + gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; + + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + gd->bus_clk / 16 / CONFIG_BAUDRATE); + + puts("\nNAND boot... "); + + /* copy code to RAM and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + puts("\nSecond program loader running in sram..."); + nand_boot(); +} + +void putc(char c) +{ + if (c == '\n') + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); + + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); +} + +void puts(const char *str) +{ + while (*str) + putc(*str++); +} diff --git a/board/freescale/p1_p2_rdb/tlb.c b/board/freescale/p1_p2_rdb/tlb.c index bc98972e332..73f5729ef56 100644 --- a/board/freescale/p1_p2_rdb/tlb.c +++ b/board/freescale/p1_p2_rdb/tlb.c @@ -37,6 +37,7 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 1, BOOKE_PAGESZ_1M, 1), +#ifndef CONFIG_SPL_BUILD /* W**G* - Flash/promjet, localbus */ /* This will be changed to *I*G* after relocation to RAM. */ SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS, @@ -55,6 +56,7 @@ struct fsl_e_tlb_entry tlb_table[] = { 0, 4, BOOKE_PAGESZ_256K, 1), #endif /* #if defined(CONFIG_PCI) */ +#endif /* *I*G - NAND */ SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, @@ -65,7 +67,21 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 6, BOOKE_PAGESZ_1M, 1), -#if defined(CONFIG_SYS_RAMBOOT) +#ifdef CONFIG_SYS_INIT_L2_ADDR + /* *I*G - L2SRAM */ + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G, + 0, 11, BOOKE_PAGESZ_256K, 1), +#if CONFIG_SYS_L2_SIZE >= (256 << 10) + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000, + CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 12, BOOKE_PAGESZ_256K, 1), +#endif +#endif + +#if defined(CONFIG_SYS_RAMBOOT) || \ + (defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR)) SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, MAS3_SX|MAS3_SW|MAS3_SR, 0, 0, 7, BOOKE_PAGESZ_1G, 1) diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 0f040672583..110ba5f325d 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -20,39 +20,119 @@ #ifdef CONFIG_P1011RDB #define CONFIG_P1011 +#define CONFIG_SYS_L2_SIZE (256 << 10) #endif #ifdef CONFIG_P1020RDB #define CONFIG_P1020 +#define CONFIG_SYS_L2_SIZE (256 << 10) #endif #ifdef CONFIG_P2010RDB #define CONFIG_P2010 +#define CONFIG_SYS_L2_SIZE (512 << 10) #endif #ifdef CONFIG_P2020RDB #define CONFIG_P2020 -#endif - -#ifdef CONFIG_NAND -#define CONFIG_NAND_U_BOOT 1 -#define CONFIG_RAMBOOT_NAND 1 -#ifdef CONFIG_NAND_SPL -#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ -#else -#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds -#define CONFIG_SYS_TEXT_BASE 0xf8f82000 -#endif /* CONFIG_NAND_SPL */ +#define CONFIG_SYS_L2_SIZE (512 << 10) #endif #ifdef CONFIG_SDCARD -#define CONFIG_RAMBOOT_SDCARD 1 -#define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc +#define CONFIG_SPL +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_MMC_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SYS_TEXT_BASE 0x11001000 +#define CONFIG_SPL_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_MAX_SIZE (128 * 1024) +#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) +#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) +#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) +#define CONFIG_SYS_MMC_U_BOOT_OFFS (129 << 10) +#define CONFIG_SYS_MPC85XX_NO_RESETVEC +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" +#define CONFIG_SPL_MMC_BOOT +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_COMMON_INIT_DDR +#endif #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_RAMBOOT_SPIFLASH 1 -#define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc +#define CONFIG_SPL +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_FLASH_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SYS_TEXT_BASE 0x11001000 +#define CONFIG_SPL_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_MAX_SIZE (128 * 1024) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10) +#define CONFIG_SYS_MPC85XX_NO_RESETVEC +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" +#define CONFIG_SPL_SPI_BOOT +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_COMMON_INIT_DDR +#endif +#endif + +#ifdef CONFIG_NAND +#define CONFIG_SPL +#define CONFIG_TPL +#ifdef CONFIG_TPL_BUILD +#define CONFIG_SPL_NAND_BOOT +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_NAND_INIT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_COMMON_INIT_DDR +#define CONFIG_SPL_MAX_SIZE (128 << 10) +#define CONFIG_SPL_TEXT_BASE 0xf8f81000 +#define CONFIG_SYS_MPC85XX_NO_RESETVEC +#define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) +#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) +#define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) +#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10) +#elif defined(CONFIG_SPL_BUILD) +#define CONFIG_SPL_INIT_MINIMAL +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SPL_TEXT_BASE 0xff800000 +#define CONFIG_SPL_MAX_SIZE 4096 +#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) +#define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 +#define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000 +#define CONFIG_SYS_NAND_U_BOOT_OFFS (128 << 10) +#endif /* not CONFIG_TPL_BUILD */ + +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_TPL_PAD_TO 0x20000 +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SYS_TEXT_BASE 0x11001000 +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #endif #ifndef CONFIG_SYS_TEXT_BASE @@ -64,8 +144,12 @@ #endif #ifndef CONFIG_SYS_MONITOR_BASE +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE +#else #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif +#endif /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ @@ -120,22 +204,45 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MEMTEST_END 0x1fffffff #define CONFIG_PANIC_HANG /* do not reset board on panic */ - /* - * Config the L2 Cache as L2 SRAM - */ +/* + * Config the L2 Cache as L2 SRAM +*/ +#if defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_INIT_L2_ADDR_PHYS 0xff8f80000ull -#else #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) +#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024) +#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10) +#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024) +#if defined(CONFIG_P2020RDB) +#define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10) +#else +#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10) +#endif +#elif defined(CONFIG_NAND) +#ifdef CONFIG_TPL_BUILD +#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10) +#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024) +#else +#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x2000) +#define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) +#endif /* CONFIG_TPL_BUILD */ +#endif #endif -#define CONFIG_SYS_L2_SIZE (512 << 10) -#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -#define CONFIG_SYS_CCSRBAR 0xffe00000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR - -#if defined(CONFIG_NAND_SPL) +#ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif @@ -146,7 +253,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_MEM_INIT_VALUE 0xDeadBeef -#define CONFIG_SYS_SDRAM_SIZE 1024 /* DDR size on P1_P2 RDBs */ +#if defined(CONFIG_P1011RDB) || defined(CONFIG_P1020RDB) +/* + * P1020 and it's derivatives support max 32bit DDR width + * So Reduce available DDR size +*/ +#define CONFIG_SYS_SDRAM_SIZE 512 +#else +#define CONFIG_SYS_SDRAM_SIZE 1024 +#endif #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE @@ -201,14 +316,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \ - defined(CONFIG_RAMBOOT_SPIFLASH) -#define CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_EXTRA_ENV_RELOC -#else -#undef CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO @@ -241,21 +348,12 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc*/ -#ifndef CONFIG_NAND_SPL -#define CONFIG_SYS_NAND_BASE 0xffa00000 +#define CONFIG_SYS_NAND_BASE 0xff800000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull +#define CONFIG_SYS_NAND_BASE_PHYS 0xfff800000ull #else #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE #endif -#else -#define CONFIG_SYS_NAND_BASE 0xfff00000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_NAND_BASE_PHYS 0xffff00000ull -#else -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE -#endif -#endif #define CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} @@ -264,15 +362,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_NAND_FSL_ELBC 1 #define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) -/* NAND boot: 4K NAND loader config */ -#define CONFIG_SYS_NAND_SPL_SIZE 0x1000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) -#define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR) -#define CONFIG_SYS_NAND_U_BOOT_START (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE) -#define CONFIG_SYS_NAND_U_BOOT_OFFS (0) -#define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000) -#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) - /* NAND flash config */ #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ | (2<$@ - -# create symbolic links for common files - -$(obj)/cache.c: - @rm -f $@ - ln -sf $(srctree)/arch/powerpc/lib/cache.c $@ - -$(obj)/cpu_init_early.c: - @rm -f $@ - ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $@ - -$(obj)/spl_minimal.c: - @rm -f $@ - ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $@ - -$(obj)/fsl_law.c: - @rm -f $@ - ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@ - -$(obj)/law.c: - @rm -f $@ - ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@ - -$(obj)/nand_boot_fsl_elbc.c: - @rm -f $@ - ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@ - -$(obj)/ns16550.c: - @rm -f $@ - ln -sf $(srctree)/drivers/serial/ns16550.c $@ - -$(obj)/resetvec.S: - @rm -f $@ - ln -s $(srctree)/$(CPUDIR)/resetvec.S $@ - -$(obj)/start.S: - @rm -f $@ - ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/start.S $@ - -$(obj)/tlb.c: - @rm -f $@ - ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/tlb.c $@ - -$(obj)/tlb_table.c: - @rm -f $@ - ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@ diff --git a/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c b/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c deleted file mode 100644 index f7e8438438e..00000000000 --- a/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright 2009 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define SYSCLK_MASK 0x00200000 -#define BOARDREV_MASK 0x10100000 -#define BOARDREV_B 0x10100000 -#define BOARDREV_C 0x00100000 - -#define SYSCLK_66 66666666 -#define SYSCLK_50 50000000 -#define SYSCLK_100 100000000 - -DECLARE_GLOBAL_DATA_PTR; - -void board_init_f(ulong bootflag) -{ - uint plat_ratio, bus_clk, sys_clk = 0; - volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); - uint val, temp, sysclk_mask; - - val = pgpio->gpdat; - sysclk_mask = val & SYSCLK_MASK; - temp = val & BOARDREV_MASK; - if (temp == BOARDREV_C) { - if(sysclk_mask == 0) - sys_clk = SYSCLK_66; - else - sys_clk = SYSCLK_100; - } else if (temp == BOARDREV_B) { - if(sysclk_mask == 0) - sys_clk = SYSCLK_66; - else - sys_clk = SYSCLK_50; - } - - plat_ratio = gur->porpllsr & 0x0000003e; - plat_ratio >>= 1; - bus_clk = plat_ratio * sys_clk; - NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, - bus_clk / 16 / CONFIG_BAUDRATE); - - puts("\nNAND boot... "); - - /* copy code to DDR and jump to it - this should not return */ - /* NOTE - code has to be copied out of NAND buffer before - * other blocks can be read. - */ - relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, - CONFIG_SYS_NAND_U_BOOT_RELOC); -} - -void board_init_r(gd_t *gd, ulong dest_addr) -{ - nand_boot(); -} - -void putc(char c) -{ - if (c == '\n') - NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); - - NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); -} - -void puts(const char *str) -{ - while (*str) - putc(*str++); -} From 3246584d194d3d8f0354fd2fbeef5a8d1f00769e Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Wed, 14 May 2014 19:33:45 -0500 Subject: [PATCH 104/105] mpc85xx: configs: remove c=ffe from default environment AFAICT, c=ffe does nothing and was a typo from the original commit d17123696c6180ac8b74fbd318bf14652623e982 "powerpc/p4080: Add support for the P4080DS board" and just kept on getting duplicated in subsequently added board config files. Signed-off-by: Kim Phillips Acked-by: Edward Swarthout Reviewed-by: York Sun --- include/configs/B4860QDS.h | 3 +-- include/configs/P2041RDB.h | 3 +-- include/configs/T1040QDS.h | 3 +-- include/configs/T104xRDB.h | 3 +-- include/configs/T208xQDS.h | 3 +-- include/configs/T208xRDB.h | 3 +-- include/configs/T4240EMU.h | 3 +-- include/configs/T4240QDS.h | 3 +-- include/configs/corenet_ds.h | 3 +-- 9 files changed, 9 insertions(+), 18 deletions(-) diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 47aca9c00f2..72a3535cff6 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -838,8 +838,7 @@ unsigned long get_board_ddr_clk(void); "ramdiskfile=b4860qds/ramdisk.uboot\0" \ "fdtaddr=c00000\0" \ "fdtfile=b4860qds/b4860qds.dtb\0" \ - "bdev=sda3\0" \ - "c=ffe\0" + "bdev=sda3\0" /* For emulation this causes u-boot to jump to the start of the proof point app code automatically */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 54e6493913b..e662322e98a 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -713,8 +713,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); "ramdiskfile=p2041rdb/ramdisk.uboot\0" \ "fdtaddr=c00000\0" \ "fdtfile=p2041rdb/p2041rdb.dtb\0" \ - "bdev=sda3\0" \ - "c=ffe\0" + "bdev=sda3\0" #define CONFIG_HDBOOT \ "setenv bootargs root=/dev/$bdev rw " \ diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 522653bdc3d..2215ac86abc 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -767,8 +767,7 @@ unsigned long get_board_ddr_clk(void); "ramdiskfile=t1040qds/ramdisk.uboot\0" \ "fdtaddr=c00000\0" \ "fdtfile=t1040qds/t1040qds.dtb\0" \ - "bdev=sda3\0" \ - "c=ffe\0" + "bdev=sda3\0" #define CONFIG_LINUX \ "setenv bootargs root=/dev/ram rw " \ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 81b4f31bc6e..e564cb7f532 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -779,8 +779,7 @@ "ramdiskfile=" __stringify(RAMDISKFILE) "\0" \ "fdtaddr=c00000\0" \ "fdtfile=" __stringify(FDTFILE) "\0" \ - "bdev=sda3\0" \ - "c=ffe\0" + "bdev=sda3\0" #define CONFIG_LINUX \ "setenv bootargs root=/dev/ram rw " \ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 8bf08430be6..d2a9c6d1ae5 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -837,8 +837,7 @@ unsigned long get_board_ddr_clk(void); "ramdiskfile=t2080qds/ramdisk.uboot\0" \ "fdtaddr=c00000\0" \ "fdtfile=t2080qds/t2080qds.dtb\0" \ - "bdev=sda3\0" \ - "c=ffe\0" + "bdev=sda3\0" /* * For emulation this causes u-boot to jump to the start of the diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 5b261788c9a..626b5626a94 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -797,8 +797,7 @@ unsigned long get_board_ddr_clk(void); "ramdiskfile=t2080rdb/ramdisk.uboot\0" \ "fdtaddr=c00000\0" \ "fdtfile=t2080rdb/t2080rdb.dtb\0" \ - "bdev=sda3\0" \ - "c=ffe\0" + "bdev=sda3\0" /* * For emulation this causes u-boot to jump to the start of the diff --git a/include/configs/T4240EMU.h b/include/configs/T4240EMU.h index ad5a9a6f0c8..53c69b03dbd 100644 --- a/include/configs/T4240EMU.h +++ b/include/configs/T4240EMU.h @@ -128,8 +128,7 @@ "ramdiskfile=t4240emu/ramdisk.uboot\0" \ "fdtaddr=c00000\0" \ "fdtfile=t4240emu/t4240emu.dtb\0" \ - "bdev=sda3\0" \ - "c=ffe\0" + "bdev=sda3\0" /* * For emulation this causes u-boot to jump to the start of the proof point diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index e4eb30fbeb5..5e4065a101d 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -572,8 +572,7 @@ unsigned long get_board_ddr_clk(void); "ramdiskfile=t4240qds/ramdisk.uboot\0" \ "fdtaddr=c00000\0" \ "fdtfile=t4240qds/t4240qds.dtb\0" \ - "bdev=sda3\0" \ - "c=ffe\0" + "bdev=sda3\0" #define CONFIG_HVBOOT \ "setenv bootargs config-addr=0x60000000; " \ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index c8b7c2dff78..521de5d2aa9 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -715,8 +715,7 @@ "ramdiskfile=p4080ds/ramdisk.uboot\0" \ "fdtaddr=c00000\0" \ "fdtfile=p4080ds/p4080ds.dtb\0" \ - "bdev=sda3\0" \ - "c=ffe\0" + "bdev=sda3\0" #define CONFIG_HDBOOT \ "setenv bootargs root=/dev/$bdev rw " \ From e4911815cf98237b65a817a3c791f143794f2837 Mon Sep 17 00:00:00 2001 From: Liu Gang Date: Thu, 15 May 2014 14:30:34 +0800 Subject: [PATCH 105/105] powerpc/srio-pcie-boot: Adjust addresses for SRIO/PCIE boot The new 768KB u-boot image size requires changes for SRIO/PCIE boot. These addresses need to be updated to appropriate locations. The updated addresses are used to configure the SRIO/PCIE inbound windows for the boot, and they must be aligned with the window size based on the SRIO/PCIE modules requirement. So for the 768KB u-boot image, the inbound window cannot be set with 0xfff40000 base address and 0xc0000 size, it should be extended to 1MB size and the base address can be aligned with the size. Signed-off-by: Liu Gang Reviewed-by: York Sun --- include/configs/B4860QDS.h | 10 +++++----- include/configs/P2041RDB.h | 10 +++++----- include/configs/T208xQDS.h | 10 +++++----- include/configs/T208xRDB.h | 10 +++++----- include/configs/T4240QDS.h | 10 +++++----- include/configs/corenet_ds.h | 10 +++++----- 6 files changed, 30 insertions(+), 30 deletions(-) diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 72a3535cff6..1af9ba686d9 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -561,15 +561,15 @@ unsigned long get_board_ddr_clk(void); * for slave u-boot IMAGE instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef080000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff80000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x80000 /* 512K */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff80000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull /* * for slave UCODE and ENV instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef040000ull +#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index e662322e98a..16f7525def4 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -381,15 +381,15 @@ unsigned long get_board_sys_clk(unsigned long dummy); * for slave u-boot IMAGE instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef080000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff80000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x80000 /* 512K */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff80000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull /* * for slave UCODE and ENV instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef040000ull +#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index d2a9c6d1ae5..8dd2e492ba8 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -505,15 +505,15 @@ unsigned long get_board_ddr_clk(void); * for slave u-boot IMAGE instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef080000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff80000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x80000 /* 512K */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff80000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull /* * for slave UCODE and ENV instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef040000ull +#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 626b5626a94..3a1c49c8113 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -461,15 +461,15 @@ unsigned long get_board_ddr_clk(void); * for slave u-boot IMAGE instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef080000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff80000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x80000 /* 512K */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff80000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull /* * for slave UCODE and ENV instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef040000ull +#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 5e4065a101d..a770dd0d3a6 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -375,15 +375,15 @@ unsigned long get_board_ddr_clk(void); * for slave u-boot IMAGE instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef080000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff80000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x80000 /* 512K */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff80000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull /* * for slave UCODE and ENV instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef040000ull +#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 521de5d2aa9..12b32967b43 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -379,15 +379,15 @@ * for slave u-boot IMAGE instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef080000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff80000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x80000 /* 512K */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff80000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull /* * for slave UCODE and ENV instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef040000ull +#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull #define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */