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Patch by Klaus Heydeck, 12 May 2004:

Browse Source 
Using external watchdog for KUP4 boards in mpc8xx/cpu.c;
load_sernum_ethaddr() for KUP4 boards in lib_ppc/board.c;
various changes to KUP4 board specific files
This commit is contained in:
wdenk 2004-05-12 22:54:36 +00:00
parent 6c1362cf63
commit 02b11f8e09
13 changed files with 288 additions and 45 deletions
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7
CHANGELOG
View File

@ -2,6 +2,11 @@
Changes since U-Boot 1.1.1:
======================================================================
* Patch by Klaus Heydeck, 12 May 2004:
Using external watchdog for KUP4 boards in mpc8xx/cpu.c;
load_sernum_ethaddr() for KUP4 boards in lib_ppc/board.c;
various changes to KUP4 board specific files
* Fix minor network problem on MPC5200: need some delay between
resetting the PHY and sending the first packet. Implemented in a
"natural" way by invoking the PHY reset and initialization code
@ -41,7 +46,7 @@ Changes for U-Boot 1.1.1:
errata from Vitesse Semiconductor.
* Patch by Philippe Robin, 22 Apr 2004:
Fix ethernet configuration for "versatile" board
Fix ethernet configuration for "versatile" board
* Patch by Kshitij Gupta, 21 Apr 2004:
Remove busy loop and use MPU timer fr usleep() on OMAP1510/1610 boards

11
board/kup/common/kup.c
View File

@ -70,3 +70,14 @@ void poweron_key (void)
else
setenv ("key1", "on");
}
#ifdef CONFIG_POST
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed (void)
{
return (0);
}
#endif

94
board/kup/common/load_sernum_ethaddr.c Normal file
View File

@ -0,0 +1,94 @@
/*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc8xx.h>
/*-----------------------------------------------------------------------
* Process Hardware Information Block:
*
* If we boot on a system fresh from factory, check if the Hardware
* Information Block exists and save the information it contains.
*
* The KUP Hardware Information Block is defined as
* follows:
* - located in first flash bank
* - starts at offset CFG_HWINFO_OFFSET
* - size CFG_HWINFO_SIZE
*
* Internal structure:
* - sequence of ASCII character lines
* - fields separated by <CR><LF>
* - last field terminated by NUL character (0x00)
*
* Fields in Hardware Information Block:
* 1) Module Type
* 2) MAC Address
* 3) ....
*/
#define ETHADDR_TOKEN "ethaddr="
#define LCD_TOKEN "lcd="
void load_sernum_ethaddr (void)
{
unsigned char *hwi;
unsigned char *var;
unsigned char hwi_stack[CFG_HWINFO_SIZE];
unsigned char *p;
hwi = (unsigned char *) (CFG_FLASH_BASE + CFG_HWINFO_OFFSET);
if (*((unsigned long *) hwi) != (unsigned long) CFG_HWINFO_MAGIC) {
printf ("HardwareInfo not found!\n");
return;
}
memcpy (hwi_stack, hwi, CFG_HWINFO_SIZE);
/*
** ethaddr
*/
var = strstr (hwi_stack, ETHADDR_TOKEN);
if (var) {
var += sizeof (ETHADDR_TOKEN) - 1;
p = strchr (var, '\r');
if (p < hwi + CFG_HWINFO_SIZE) {
*p = '\0';
setenv ("ethaddr", var);
*p = '\r';
}
}
/*
** lcd
*/
var = strstr (hwi_stack, LCD_TOKEN);
if (var) {
var += sizeof (LCD_TOKEN) - 1;
p = strchr (var, '\r');
if (p < hwi + CFG_HWINFO_SIZE) {
*p = '\0';
setenv ("lcd", var);
*p = '\r';
}
}
}

2
board/kup/kup4k/Makefile
View File

@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o ../common/flash.o ../common/kup.o
OBJS = $(BOARD).o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

5
board/kup/kup4k/kup4k.c
View File

@ -129,11 +129,11 @@ int checkboard (void)
*/
immap->im_memctl.memc_or4 = 0xFFFF8926;
immap->im_memctl.memc_br4 = 0x90000401;
__asm__ ("eieio");
latch=(uchar *)0x90000200;
rev = (*latch & 0xF8) >> 3;
mod=(*latch & 0x03);
printf ("Board: KUP4K Rev %d.%d SN: %s\n",rev,mod,getenv("ethaddr"));
printf ("Board: KUP4K Rev %d.%d\n",rev,mod);
return (0);
}
@ -346,6 +346,7 @@ void lcd_logo (bd_t * bd)
*/
memctl->memc_or5 = 0xFFC007F0; /* 4 MB 17 WS or externel TA */
memctl->memc_br5 = 0x80080801; /* Start at 0x80080000 */
__asm__ ("eieio");
fb_info.VmemAddr = (unsigned char *) (S1D_PHYSICAL_VMEM_ADDR);
fb_info.RegAddr = (unsigned char *) (S1D_PHYSICAL_REG_ADDR);

2
board/kup/kup4x/Makefile
View File

@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o ../common/flash.o ../common/kup.o
OBJS = $(BOARD).o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

6
board/kup/kup4x/kup4x.c
View File

@ -24,6 +24,7 @@
#include <common.h>
#include <mpc8xx.h>
#include <post.h>
#include "../common/kup.h"
#ifdef CONFIG_KUP4K_LOGO
/* #include "s1d13706.h" */
@ -123,12 +124,11 @@ int checkboard (void)
*/
memctl->memc_or4 = 0xFFFF8926;
memctl->memc_br4 = 0x90000401;
__asm__ ("eieio");
latch = (volatile uchar *) 0x90000200;
rev = (*latch & 0xF8) >> 3;
mod = (*latch & 0x03);
printf ("Board: KUP4X Rev %d.%d SN: %s\n", rev, mod,
getenv ("ethaddr"));
printf ("Board: KUP4X Rev %d.%d\n",rev,mod);
return (0);
}

11
cpu/mpc8xx/cpu.c
View File

@ -567,6 +567,17 @@ void reset_8xx_watchdog (volatile immap_t * immr)
immr->im_ioport.iop_padir |= WATCHDOG_BIT; /* Output */
immr->im_ioport.iop_paodr &= ~(WATCHDOG_BIT); /* active output */
immr->im_ioport.iop_padat ^= WATCHDOG_BIT; /* Toggle WDI */
# elif defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
/*
* The KUP4 boards uses a TPS3705 Watchdog
* with the trigger pin connected to port PA.5
*/
# define WATCHDOG_BIT 0x0400
immr->im_ioport.iop_papar &= ~(WATCHDOG_BIT); /* GPIO */
immr->im_ioport.iop_padir |= WATCHDOG_BIT; /* Output */
immr->im_ioport.iop_paodr &= ~(WATCHDOG_BIT); /* active output */
immr->im_ioport.iop_padat ^= WATCHDOG_BIT; /* Toggle WDI */
# else
/*

8
drivers/sl811_usb.c
View File

@ -248,7 +248,7 @@ static int sl811_send_packet(struct usb_device *dev, unsigned long pipe, __u8 *b
ctrl |= SL811_USB_CTRL_TOGGLE_1;
if (need_preamble)
ctrl |= SL811_USB_CTRL_PREAMBLE;
sl811_write(SL811_INTRSTS, 0xff);
while (err < 3) {
@ -386,9 +386,9 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
sl811_write(SL811_PIDEP_A,
PIDEP(!dir_in ? USB_PID_IN : USB_PID_OUT, ep));
usb_settoggle(dev, ep, !usb_pipeout(pipe), 1);
if (sl811_send_packet(dev,
!dir_in ? usb_rcvctrlpipe(dev, ep) :
usb_sndctrlpipe(dev, ep),
if (sl811_send_packet(dev,
!dir_in ? usb_rcvctrlpipe(dev, ep) :
usb_sndctrlpipe(dev, ep),
0, 0) < 0) {
PDEBUG(0, "status phase failed!\n");
dev->status = -1;

2
fs/jffs2/jffs2_1pass.c
View File

@ -759,7 +759,7 @@ jffs2_1pass_list_inodes(struct b_lists * pL, u32 pino)
get_fl_mem(b2->offset, sizeof(ojNode), &ojNode);
if (jNode->ino == jDir->ino && jNode->version >= i_version) {
if (i)
put_fl_mem(i);
put_fl_mem(i);
i = get_fl_mem(b2->offset, sizeof(*i), NULL);
}
b2 = b2->next;

92
include/configs/KUP4K.h
View File

@ -72,8 +72,8 @@
"contrast=55\0" \
"silent=1\0" \
"load=tftp 200000 bootloader-4k.bitmap;tftp 100000 bootloader-4k.bin\0" \
"update=protect off 1:0-5;era 1:0-5;cp.b 100000 40000000 $(filesize);" \
"cp.b 200000 40040000 14000\0"
"update=protect off 1:0-7;era 1:0-7;cp.b 100000 40000000 $(filesize);" \
"cp.b 200000 40050000 14000\0"
#define CONFIG_BOOTCOMMAND \
"run slot_a_boot;run slot_b_boot;run nfs_boot;run panic_boot"
@ -85,7 +85,7 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_WATCHDOG 1 /* watchdog enabled */
#define CONFIG_STATUS_LED 1 /* Status LED enabled */
@ -96,23 +96,81 @@
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
#define CONFIG_HARD_I2C
#define CFG_I2C_SPEED 40000
#define CFG_I2C_SLAVE 0x7F
/*
* enable I2C and select the hardware/software driver
*/
#undef CONFIG_HARD_I2C /* I2C with hardware support */
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
#define CONFIG_ETHADDR 00:0B:64:00:00:00 /* our OUI from IEEE */
#define CONFIG_KUP4K_LOGO 0x40040000 /* Address of logo bitmap */
#define CFG_I2C_SPEED 93000 /* 93 kHz is supposed to work */
#define CFG_I2C_SLAVE 0xFE
#ifdef CONFIG_SOFT_I2C
/*
* Software (bit-bang) I2C driver configuration
*/
#define PB_SCL 0x00000020 /* PB 26 */
#define PB_SDA 0x00000010 /* PB 27 */
#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
else immr->im_cpm.cp_pbdat &= ~PB_SDA
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
#endif /* CONFIG_SOFT_I2C */
/*-----------------------------------------------------------------------
* I2C Configuration
*/
#define CFG_I2C_PICIO_ADDR 0x21 /* PCF8574 IO Expander */
#define CFG_I2C_RTC_ADDR 0x51 /* PCF8563 RTC */
/* List of I2C addresses to be verified by POST */
#define I2C_ADDR_LIST {CFG_I2C_PICIO_ADDR, \
CFG_I2C_RTC_ADDR, \
}
#define CONFIG_RTC_PCF8563 /* use Philips PCF8563 RTC */
#define CFG_DISCOVER_PHY
#if 0
#define CONFIG_ETHADDR 00:0B:64:00:00:00 /* our OUI from IEEE */
#endif
#define CONFIG_KUP4K_LOGO 0x40050000 /* Address of logo bitmap */
/* Define to allow the user to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#if 1
/* POST support */
#define CONFIG_POST (CFG_POST_CPU | \
CFG_POST_RTC | \
CFG_POST_I2C)
#ifdef CONFIG_POST
#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
#else
#define CFG_CMD_POST_DIAG 0
#endif
#endif
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
CFG_CMD_DHCP | \
CFG_CMD_IDE | \
CFG_CMD_I2C | \
CFG_CMD_DATE )
CFG_CMD_DATE | \
CFG_CMD_POST_DIAG | \
CFG_CMD_IDE )
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
@ -189,7 +247,7 @@
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_OFFSET 0x30000 /* Offset of Environment Sector */
#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
#define CFG_ENV_SECT_SIZE 0x10000
@ -201,10 +259,10 @@
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
#if 0
#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */
#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */
#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */
#if 1
#define CFG_HWINFO_OFFSET 0x000F0000 /* offset of HW Info block */
#define CFG_HWINFO_SIZE 0x00000100 /* size of HW Info block */
#define CFG_HWINFO_MAGIC 0x4B26500D /* 'K&P<CR>' */
#endif
/*-----------------------------------------------------------------------
* Cache Configuration
@ -220,7 +278,7 @@
*-----------------------------------------------------------------------
* Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
*/
#if defined(CONFIG_WATCHDOG)
#if 0 && defined(CONFIG_WATCHDOG) /* KUP uses external TPS3705 WD */
#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
#else

91
include/configs/KUP4X.h
View File

@ -69,8 +69,9 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"slot_a_boot=setenv bootargs root=/dev/hda2 ip=off;" \
"run addhw;diskboot 200000 0:1;bootm 200000\0" \
"slot_b_boot=setenv bootargs root=/dev/hda2 ip=off;" \
"run addhw;diskboot 200000 2:1;bootm 200000\0" \
"usb_boot=setenv bootargs root=/dev/sda2 ip=off;\
run addhw; sleep 2; usb reset; usb scan; usbboot 200000 0:1;\
usb stop; bootm 200000\0" \
"nfs_boot=dhcp;run nfsargs addip addhw;bootm 200000\0" \
"panic_boot=echo No Bootdevice !!! reset\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath)\0" \
@ -85,7 +86,7 @@
"cp.b 200000 40040000 14000\0"
#define CONFIG_BOOTCOMMAND \
"run slot_a_boot;run nfs_boot;run panic_boot"
"run usb_boot;run_slot_a_boot;run nfs_boot;run panic_boot"
#define CONFIG_MISC_INIT_R 1
@ -94,7 +95,7 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_WATCHDOG 1 /* watchdog enabled */
#define CONFIG_STATUS_LED 1 /* Status LED enabled */
@ -105,19 +106,81 @@
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_HARD_I2C
#define CFG_I2C_SPEED 40000
#define CFG_I2C_SLAVE 0x7F
/*
* enable I2C and select the hardware/software driver
*/
#undef CONFIG_HARD_I2C /* I2C with hardware support */
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
#define CONFIG_ETHADDR 00:0B:64:80:00:00 /* our OUI from IEEE */
#define CFG_I2C_SPEED 93000 /* 93 kHz is supposed to work */
#define CFG_I2C_SLAVE 0xFE
#ifdef CONFIG_SOFT_I2C
/*
* Software (bit-bang) I2C driver configuration
*/
#define PB_SCL 0x00000020 /* PB 26 */
#define PB_SDA 0x00000010 /* PB 27 */
#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
else immr->im_cpm.cp_pbdat &= ~PB_SDA
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
#endif /* CONFIG_SOFT_I2C */
/*-----------------------------------------------------------------------
* I2C Configuration
*/
#define CFG_I2C_PICIO_ADDR 0x21 /* PCF8574 IO Expander */
#define CFG_I2C_RTC_ADDR 0x51 /* PCF8563 RTC */
/* List of I2C addresses to be verified by POST */
#define I2C_ADDR_LIST {CFG_I2C_PICIO_ADDR, \
CFG_I2C_RTC_ADDR, \
}
#define CONFIG_RTC_PCF8563 /* use Philips PCF8563 RTC */
#define CFG_DISCOVER_PHY
#if 0
#define CONFIG_ETHADDR 00:0B:64:80:00:00 /* our OUI from IEEE */
#endif
#undef CONFIG_KUP4K_LOGO
/* Define to allow the user to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#if 1
/* POST support */
#define CONFIG_POST (CFG_POST_CPU | \
CFG_POST_RTC | \
CFG_POST_I2C)
#ifdef CONFIG_POST
#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
#else
#define CFG_CMD_POST_DIAG 0
#endif
#endif
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
CFG_CMD_DHCP | \
CFG_CMD_I2C | \
CFG_CMD_DATE | \
CFG_CMD_POST_DIAG | \
CFG_CMD_IDE | \
CFG_CMD_USB | \
CFG_CMD_FAT)
@ -196,7 +259,7 @@
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_OFFSET 0x30000 /* Offset of Environment Sector */
#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
#define CFG_ENV_SECT_SIZE 0x10000
@ -208,10 +271,10 @@
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
#if 0
#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */
#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */
#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */
#if 1
#define CFG_HWINFO_OFFSET 0x000F0000 /* offset of HW Info block */
#define CFG_HWINFO_SIZE 0x00000100 /* size of HW Info block */
#define CFG_HWINFO_MAGIC 0x4B26500D /* 'K&P<CR>' */
#endif
/*-----------------------------------------------------------------------
* Cache Configuration
@ -227,7 +290,7 @@
*-----------------------------------------------------------------------
* Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
*/
#if defined(CONFIG_WATCHDOG)
#if 0 && defined(CONFIG_WATCHDOG) /* KUP uses external TPS3705 WD */
#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
#else

2
lib_ppc/board.c
View File

@ -817,7 +817,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
#endif
#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
defined(CONFIG_CCM)
defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
load_sernum_ethaddr ();
#endif
/* IP Address */