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imx8qxp: mek: default enable SPL
Enable SPL for i.MX8QXP MEK, and currently use SPL FIT. The SPL enable SPL_DM to use MMC/PINCTRL/POWER DOMAIN/CLK. Note: SPL FIT could not support secure boot chain, because i.MX8/8X only support i.MX container format. This container format has not been upstreamed, so we use FIT for now. When SPL container supported, we could switch to that. Signed-off-by: Peng Fan <peng.fan@nxp.com>
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commit
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@ -5,3 +5,4 @@
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#
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obj-y += imx8qxp_mek.o
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obj-$(CONFIG_SPL_BUILD) += spl.o
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@ -19,6 +19,4 @@ CONTAINER
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/* Add scfw image with exec attribute */
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IMAGE SCU mx8qx-mek-scfw-tcm.bin
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/* Add ATF image with exec attribute */
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IMAGE A35 bl31.bin 0x80000000
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/* Add U-Boot image with load attribute */
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DATA A35 u-boot-dtb.bin 0x80020000
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IMAGE A35 spl/u-boot-spl.bin 0x00100000
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75
board/freescale/imx8qxp_mek/spl.c
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75
board/freescale/imx8qxp_mek/spl.c
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@ -0,0 +1,75 @@
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/*
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* Copyright 2018 NXP
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <spl.h>
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#include <dm/uclass.h>
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#include <dm/device.h>
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#include <dm/uclass-internal.h>
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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DECLARE_GLOBAL_DATA_PTR;
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void spl_board_init(void)
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{
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struct udevice *dev;
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int offset;
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uclass_find_first_device(UCLASS_MISC, &dev);
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for (; dev; uclass_find_next_device(&dev)) {
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if (device_probe(dev))
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continue;
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}
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offset = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "nxp,imx8-pd");
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while (offset != -FDT_ERR_NOTFOUND) {
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lists_bind_fdt(gd->dm_root, offset_to_ofnode(offset),
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NULL, true);
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offset = fdt_node_offset_by_compatible(gd->fdt_blob, offset,
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"nxp,imx8-pd");
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}
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uclass_find_first_device(UCLASS_POWER_DOMAIN, &dev);
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for (; dev; uclass_find_next_device(&dev)) {
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if (device_probe(dev))
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continue;
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}
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arch_cpu_init();
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board_early_init_f();
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timer_init();
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preloader_console_init();
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puts("Normal Boot\n");
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}
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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/* Just empty function now - can't decide what to choose */
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debug("%s: %s\n", __func__, name);
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return 0;
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}
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#endif
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void board_init_f(ulong dummy)
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{
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/* Clear global data */
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memset((void *)gd, 0, sizeof(gd_t));
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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board_init_r(NULL, 0);
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}
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@ -1,11 +1,28 @@
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CONFIG_ARM=y
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CONFIG_ARCH_IMX8=y
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CONFIG_SYS_TEXT_BASE=0x80020000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_IMX8QXP_MEK=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_SPL=y
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CONFIG_NR_DRAM_BANKS=3
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CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
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CONFIG_FIT=y
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qxp_mek/imximage.cfg"
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CONFIG_BOOTDELAY=3
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CONFIG_LOG=y
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_SEPARATE_BSS=y
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CONFIG_SPL_POWER_SUPPORT=y
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CONFIG_SPL_POWER_DOMAIN=y
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CONFIG_SPL_WATCHDOG_SUPPORT=y
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CONFIG_CMD_CPU=y
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# CONFIG_CMD_IMPORTENV is not set
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CONFIG_CMD_CLK=y
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@ -18,8 +35,11 @@ CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_FAT=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-mek"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SPL_DM=y
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CONFIG_SPL_CLK=y
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CONFIG_CLK_IMX8=y
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CONFIG_CPU=y
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CONFIG_DM_GPIO=y
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@ -41,12 +61,16 @@ CONFIG_FEC_MXC_MDIO_BASE=0x5B040000
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CONFIG_FEC_MXC=y
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CONFIG_MII=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_IMX8=y
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CONFIG_POWER_DOMAIN=y
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CONFIG_IMX8_POWER_DOMAIN=y
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CONFIG_DM_REGULATOR=y
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CONFIG_SPL_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_SPL_DM_REGULATOR_GPIO=y
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CONFIG_DM_SERIAL=y
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CONFIG_FSL_LPUART=y
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CONFIG_SPL_TINY_MEMSET=y
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# CONFIG_EFI_LOADER is not set
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@ -9,6 +9,32 @@
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#include <linux/sizes.h>
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#include <asm/arch/imx-regs.h>
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SPL_TEXT_BASE 0x0
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#define CONFIG_SPL_MAX_SIZE (124 * 1024)
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#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x250
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0
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#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
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#define CONFIG_SPL_STACK 0x013E000
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#define CONFIG_SPL_BSS_START_ADDR 0x00128000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
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#define CONFIG_SYS_SPL_MALLOC_START 0x00120000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
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#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
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#define CONFIG_SYS_ICACHE_OFF
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#define CONFIG_SYS_DCACHE_OFF
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#define CONFIG_MALLOC_F_ADDR 0x00120000
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#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
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#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
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#define CONFIG_OF_EMBED
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#endif
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#define CONFIG_REMAKE_ELF
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#define CONFIG_BOARD_EARLY_INIT_F
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