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arm: omap: Unify get_device_type() function

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Refactor OMAP3/4/5 code so that we have only one get_device_type()
function for all platforms.

Details:
 - Add ctrl variable for AM33xx and OMAP3 platforms (like it's done for
   OMAP4/5), so we can obtain status register in common way
 - For now ctrl structure for AM33xx/OMAP3 contains only status register
   address
 - Run hw_data_init() in order to assign ctrl to proper structure
 - Remove DEVICE_MASK and DEVICE_GP definitions as they are not used
   (DEVICE_TYPE_MASK and GP_DEVICE are used instead)
 - Guard structs in omap_common.h with #ifdefs, because otherwise
   including omap_common.h on non-omap4/5 board files breaks compilation

Buildman script was run for all OMAP boards. Result output:
    arm: (for 38/616 boards)
        all +352.5
        bss -1.4
        data +3.5
        rodata +300.0
        spl/u-boot-spl:all +284.7
        spl/u-boot-spl:data +2.2
        spl/u-boot-spl:rodata +252.0
        spl/u-boot-spl:text +30.5
        text +50.4
    (no errors to report)

Tested on AM57x EVM and BeagleBoard xM.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Rework the guards as to not break TI81xx]
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Semen Protsenko 2017-06-02 18:00:00 +03:00 committed by Tom Rini
parent f2d78c1ced
commit 00bbe96eba
21 changed files with 123 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/include/asm/arch-am33xx/cpu.h
View File

@ -36,12 +36,6 @@
#define TCFG_RESET BIT(0) /* software reset */
#define TCFG_EMUFREE BIT(1) /* behaviour of tmr on debug */
#define TCFG_IDLEMOD_SHIFT (2) /* power management */
/* device type */
#define DEVICE_MASK (BIT(8) | BIT(9) | BIT(10))
#define TST_DEVICE 0x0
#define EMU_DEVICE 0x1
#define HS_DEVICE 0x2
#define GP_DEVICE 0x3
/* cpu-id for AM43XX AM33XX and TI81XX family */
#define AM437X 0xB98C

3
arch/arm/include/asm/arch-am33xx/omap.h
View File

@ -41,6 +41,9 @@ struct omap_boot_parameters {
unsigned char boot_device;
unsigned char reset_reason;
};
#define DEVICE_TYPE_SHIFT 0x8
#define DEVICE_TYPE_MASK (0x7 << DEVICE_TYPE_SHIFT)
#endif
#endif

3
arch/arm/include/asm/arch-omap3/omap.h
View File

@ -91,6 +91,9 @@ struct s32ktimer {
unsigned int s32k_cr; /* 0x10 */
};
#define DEVICE_TYPE_SHIFT 0x8
#define DEVICE_TYPE_MASK (0x7 << DEVICE_TYPE_SHIFT)
#endif /* __ASSEMBLY__ */
#ifndef __ASSEMBLY__

1
arch/arm/include/asm/arch-omap4/omap.h
View File

@ -100,7 +100,6 @@ struct s32ktimer {
#define DEVICE_TYPE_SHIFT (0x8)
#define DEVICE_TYPE_MASK (0x7 << DEVICE_TYPE_SHIFT)
#define DEVICE_GP 0x3
#endif /* __ASSEMBLY__ */

1
arch/arm/include/asm/arch-omap5/omap.h
View File

@ -127,7 +127,6 @@ struct s32ktimer {
#define DEVICE_TYPE_SHIFT 0x6
#define DEVICE_TYPE_MASK (0x7 << DEVICE_TYPE_SHIFT)
#define DEVICE_GP 0x3
/* Output impedance control */
#define ds_120_ohm 0x0

11
arch/arm/include/asm/omap_common.h
View File

@ -484,6 +484,7 @@ struct omap_sys_ctrl_regs {
u32 ctrl_core_sma_sw_1;
};
#if defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX)
struct dpll_params {
u32 m;
u32 n;
@ -516,6 +517,7 @@ struct dpll_regs {
u32 cm_div_h23_dpll;
u32 cm_div_h24_dpll;
};
#endif /* CONFIG_OMAP44XX || CONFIG_OMAP54XX */
struct dplls {
const struct dpll_params *mpu;
@ -539,6 +541,7 @@ struct pmic_data {
int (*pmic_write)(u8 sa, u8 reg_addr, u8 reg_data);
};
#if defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX)
enum {
OPP_LOW,
OPP_NOM,
@ -584,6 +587,7 @@ struct vcores_data {
struct volts eve;
struct volts iva;
};
#endif /* CONFIG_OMAP44XX || CONFIG_OMAP54XX */
extern struct prcm_regs const **prcm;
extern struct prcm_regs const omap5_es1_prcm;
@ -595,6 +599,8 @@ extern struct dplls dra7xx_dplls;
extern struct vcores_data const **omap_vcores;
extern const u32 sys_clk_array[8];
extern struct omap_sys_ctrl_regs const **ctrl;
extern struct omap_sys_ctrl_regs const am33xx_ctrl;
extern struct omap_sys_ctrl_regs const omap3_ctrl;
extern struct omap_sys_ctrl_regs const omap4_ctrl;
extern struct omap_sys_ctrl_regs const omap5_ctrl;
extern struct omap_sys_ctrl_regs const dra7xx_ctrl;
@ -611,6 +617,7 @@ const struct dpll_params *get_iva_dpll_params(struct dplls const *);
const struct dpll_params *get_usb_dpll_params(struct dplls const *);
const struct dpll_params *get_abe_dpll_params(struct dplls const *);
#if defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX)
void do_enable_clocks(u32 const *clk_domains,
u32 const *clk_modules_hw_auto,
u32 const *clk_modules_explicit_en,
@ -619,6 +626,7 @@ void do_enable_clocks(u32 const *clk_domains,
void do_disable_clocks(u32 const *clk_domains,
u32 const *clk_modules_disable,
u8 wait_for_disable);
#endif /* CONFIG_OMAP44XX || CONFIG_OMAP54XX */
void setup_post_dividers(u32 const base,
const struct dpll_params *params);
@ -630,7 +638,9 @@ void enable_basic_uboot_clocks(void);
void enable_usb_clocks(int index);
void disable_usb_clocks(int index);
#if defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX)
void scale_vcores(struct vcores_data const *);
#endif /* CONFIG_OMAP44XX || CONFIG_OMAP54XX */
int get_voltrail_opp(int rail_offset);
u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic);
void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic);
@ -750,7 +760,6 @@ static inline u8 is_dra72x(void)
* silicon device type
* Moving to common from cpu.h, since it is shared by various omap devices
*/
#define DEVICE_MASK (BIT(8) | BIT(9) | BIT(10))
#define TST_DEVICE 0x0
#define EMU_DEVICE 0x1
#define HS_DEVICE 0x2

1
arch/arm/mach-omap2/Makefile
View File

@ -20,6 +20,7 @@ endif
endif
obj-y += utils.o
obj-y += sysinfo-common.o
ifneq ($(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
obj-y += hwinit-common.o
obj-y += clocks-common.o

2
arch/arm/mach-omap2/am33xx/Makefile
View File

@ -21,6 +21,8 @@ endif
obj-$(CONFIG_TI816X) += ti816x_emif4.o
obj-y += board.o
obj-y += mux.o
obj-y += prcm-regs.o
obj-y += hw_data.o
obj-$(CONFIG_CLOCK_SYNTHESIZER) += clk_synthesizer.o

3
arch/arm/mach-omap2/am33xx/board.c
View File

@ -26,6 +26,7 @@
#include <asm/io.h>
#include <asm/emif.h>
#include <asm/gpio.h>
#include <asm/omap_common.h>
#include <i2c.h>
#include <miiphy.h>
#include <cpsw.h>
@ -347,6 +348,7 @@ void early_system_init(void)
#ifdef CONFIG_SPL_BUILD
void board_init_f(ulong dummy)
{
hw_data_init();
early_system_init();
board_early_init_f();
sdram_init();
@ -361,6 +363,7 @@ void board_init_f(ulong dummy)
int arch_cpu_init_dm(void)
{
hw_data_init();
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
early_system_init();
#endif

19
arch/arm/mach-omap2/am33xx/hw_data.c Normal file
View File

@ -0,0 +1,19 @@
/*
* HW data initialization for AM33xx.
*
* (C) Copyright 2017 Linaro Ltd.
* Sam Protsenko <semen.protsenko@linaro.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/omap.h>
#include <asm/omap_common.h>
struct omap_sys_ctrl_regs const **ctrl =
(struct omap_sys_ctrl_regs const **)OMAP_SRAM_SCRATCH_SYS_CTRL;
void hw_data_init(void)
{
*ctrl = &am33xx_ctrl;
}

15
arch/arm/mach-omap2/am33xx/prcm-regs.c Normal file
View File

@ -0,0 +1,15 @@
/*
* HW regs data for AM33xx.
*
* (C) Copyright 2017 Linaro Ltd.
* Sam Protsenko <semen.protsenko@linaro.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/hardware.h>
#include <asm/omap_common.h>
struct omap_sys_ctrl_regs const am33xx_ctrl = {
.control_status = CTRL_BASE + 0x40,
};

10
arch/arm/mach-omap2/am33xx/sys_info.c
View File

@ -50,16 +50,6 @@ u32 get_cpu_type(void)
return partnum;
}
/**
* get_device_type(): tell if GP/HS/EMU/TST
*/
u32 get_device_type(void)
{
int mode;
mode = readl(&cstat->statusreg) & (DEVICE_MASK);
return mode >>= 8;
}
/**
* get_sysboot_value(void) - return SYS_BOOT[4:0]
*/

9
arch/arm/mach-omap2/hwinit-common.c
View File

@ -278,15 +278,6 @@ int checkboard(void)
return 0;
}
/*
* get_device_type(): tell if GP/HS/EMU/TST
*/
u32 get_device_type(void)
{
return (readl((*ctrl)->control_status) &
(DEVICE_TYPE_MASK)) >> DEVICE_TYPE_SHIFT;
}
#if defined(CONFIG_DISPLAY_CPUINFO)
/*
* Print CPU information

2
arch/arm/mach-omap2/omap3/Makefile
View File

@ -14,6 +14,8 @@ obj-y += board.o
obj-y += boot.o
obj-y += clock.o
obj-y += sys_info.o
obj-y += prcm-regs.o
obj-y += hw_data.o
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_OMAP3_ID_NAND) += spl_id_nand.o
endif

7
arch/arm/mach-omap2/omap3/board.c
View File

@ -173,6 +173,11 @@ void try_unlock_memory(void)
return;
}
void early_system_init(void)
{
hw_data_init();
}
/******************************************************************************
* Routine: s_init
* Description: Does early system init of muxing and clocks.
@ -181,6 +186,7 @@ void try_unlock_memory(void)
void s_init(void)
{
watchdog_init();
early_system_init();
try_unlock_memory();
@ -204,6 +210,7 @@ void s_init(void)
#ifdef CONFIG_SPL_BUILD
void board_init_f(ulong dummy)
{
early_system_init();
mem_init();
}
#endif

19
arch/arm/mach-omap2/omap3/hw_data.c Normal file
View File

@ -0,0 +1,19 @@
/*
* HW data initialization for OMAP3.
*
* (C) Copyright 2017 Linaro Ltd.
* Sam Protsenko <semen.protsenko@linaro.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/omap.h>
#include <asm/omap_common.h>
struct omap_sys_ctrl_regs const **ctrl =
(struct omap_sys_ctrl_regs const **)OMAP_SRAM_SCRATCH_SYS_CTRL;
void hw_data_init(void)
{
*ctrl = &omap3_ctrl;
}

15
arch/arm/mach-omap2/omap3/prcm-regs.c Normal file
View File

@ -0,0 +1,15 @@
/*
* HW regs data for OMAP3.
*
* (C) Copyright 2017 Linaro Ltd.
* Sam Protsenko <semen.protsenko@linaro.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/omap.h>
#include <asm/omap_common.h>
struct omap_sys_ctrl_regs const omap3_ctrl = {
.control_status = OMAP34XX_CTRL_BASE + 0x2F0,
};

9
arch/arm/mach-omap2/omap3/sys_info.c
View File

@ -17,6 +17,7 @@
#include <asm/arch/mem.h> /* get mem tables */
#include <asm/arch/sys_proto.h>
#include <asm/bootm.h>
#include <asm/omap_common.h>
#include <i2c.h>
#include <linux/compiler.h>
@ -236,14 +237,6 @@ u32 get_boot_type(void)
return (readl(&ctrl_base->status) & SYSBOOT_MASK);
}
/*************************************************************
* get_device_type(): tell if GP/HS/EMU/TST
*************************************************************/
u32 get_device_type(void)
{
return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8);
}
#ifdef CONFIG_DISPLAY_CPUINFO
/**
* Print CPU information

21
arch/arm/mach-omap2/sysinfo-common.c Normal file
View File

@ -0,0 +1,21 @@
/*
* System information routines for all OMAP based boards.
*
* (C) Copyright 2017 Linaro Ltd.
* Sam Protsenko <semen.protsenko@linaro.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/omap.h>
#include <asm/io.h>
#include <asm/omap_common.h>
/**
* Tell if device is GP/HS/EMU/TST.
*/
u32 get_device_type(void)
{
return (readl((*ctrl)->control_status) & DEVICE_TYPE_MASK) >>
DEVICE_TYPE_SHIFT;
}

1
board/ti/am335x/board.c
View File

@ -26,6 +26,7 @@
#include <asm/io.h>
#include <asm/emif.h>
#include <asm/gpio.h>
#include <asm/omap_common.h>
#include <asm/omap_sec_common.h>
#include <asm/omap_mmc.h>
#include <i2c.h>

1
board/ti/am43xx/board.c
View File

@ -20,6 +20,7 @@
#include <asm/arch/ddr_defs.h>
#include <asm/arch/gpio.h>
#include <asm/emif.h>
#include <asm/omap_common.h>
#include "../common/board_detect.h"
#include "board.h"
#include <power/pmic.h>