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u-boot/configs/orangepi_zero_defconfig

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sunxi: add orangepi zero defconfig Orange Pi Zero is a board designed by Xunlong. It has an Allwinner H2+ SoC (similar to H3, which shares the same SoC ID), 256MB/512MB RAM, Allwinner XR819 SDIO Wi-Fi, a MicroUSB port which is used to power the board (also capable of OTG), a USB Type-A socket and a MicroSD slot. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-12-16 22:35:02 +08:00
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-08 08:27:54 +08:00
CONFIG_SPL=y
sunxi: add orangepi zero defconfig Orange Pi Zero is a board designed by Xunlong. It has an Allwinner H2+ SoC (similar to H3, which shares the same SoC ID), 256MB/512MB RAM, Allwinner XR819 SDIO Wi-Fi, a MicroUSB port which is used to power the board (also capable of OTG), a USB Type-A socket and a MicroSD slot. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-12-16 22:35:02 +08:00
CONFIG_MACH_SUN8I_H3=y
sunxi: reduce Orange Pi Zero DRAM clock speed Using `fel-boot-lima-memtester-on-orange-pi-pc 672` on an Orange Pi without heatsink results in the following error after a few minutes: WRITE FAILURE: 0x00200000 != 0xffdfffff at offset 0x0137f47c (bitflip). Also, the constructor repository (github/orangepi-xunlong) seems to contain that 624 Mhz clock speed in its u-boot fork. It may be that 672 Mhz is the advertized overclocked speed. According to http://linux-sunxi.org/Orange_Pi_PC#DRAM_clock_speed_limit it may be worth decreasing that value with other Orange Pi boards. See also e7d6aa0b74b7f4d08ee68da8a586c76c761348e2. Signed-off-by: Clément Bœsch <u@pkh.me> [Add s-o-b line] Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-07-24 04:14:23 +08:00
CONFIG_DRAM_CLK=624
sunxi: add orangepi zero defconfig Orange Pi Zero is a board designed by Xunlong. It has an Allwinner H2+ SoC (similar to H3, which shares the same SoC ID), 256MB/512MB RAM, Allwinner XR819 SDIO Wi-Fi, a MicroUSB port which is used to power the board (also capable of OTG), a USB Type-A socket and a MicroSD slot. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-12-16 22:35:02 +08:00
CONFIG_DRAM_ZQ=3881979
CONFIG_DRAM_ODT_EN=y
configs: Resync defconfigs Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-19 21:47:40 +08:00
# CONFIG_VIDEO_DE2 is not set
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-08 08:27:54 +08:00
CONFIG_SPL_SPI_SUNXI=y
sunxi: add orangepi zero defconfig Orange Pi Zero is a board designed by Xunlong. It has an Allwinner H2+ SoC (similar to H3, which shares the same SoC ID), 256MB/512MB RAM, Allwinner XR819 SDIO Wi-Fi, a MicroUSB port which is used to power the board (also capable of OTG), a USB Type-A socket and a MicroSD slot. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-12-16 22:35:02 +08:00
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-zero"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
# CONFIG_CMD_FLASH is not set
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
configs: Migrate all of the existing USB symbols, except fastboot This syncs all of the currently Kconfig'd symbols out of the headers and into the defconfig files. This has two exceptions, first am335x_evm needs to be converted to DM in SPL and then it can stop undef'ing CONFIG_DM_USB. Leaving this as-is results in a build failure, and without work, run time failure. The other case is am43xx_evm.h and in turn am43xx_evm_usbhost_boot. The problem here is that we need DWC3 USB host mode in SPL, but still desire to have gadget mode in U-Boot proper. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-26 05:50:26 +08:00
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
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