2002-08-27 17:48:53 +08:00
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/*
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* (C) Copyright 2000, 2001
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* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
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*
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2013-07-08 15:37:19 +08:00
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* SPDX-License-Identifier: GPL-2.0+
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2002-08-27 17:48:53 +08:00
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*/
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/*
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* FPGA support
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*/
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#include <common.h>
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#include <command.h>
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2003-06-28 05:31:46 +08:00
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#include <fpga.h>
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2014-03-14 19:05:37 +08:00
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#include <fs.h>
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2005-01-23 02:13:04 +08:00
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#include <malloc.h>
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2002-08-27 17:48:53 +08:00
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/* Local functions */
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2013-04-26 19:10:07 +08:00
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static int fpga_get_op(char *opstr);
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2002-08-27 17:48:53 +08:00
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/* Local defines */
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#define FPGA_NONE -1
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#define FPGA_INFO 0
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#define FPGA_LOAD 1
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2005-01-10 02:12:51 +08:00
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#define FPGA_LOADB 2
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2002-08-27 17:48:53 +08:00
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#define FPGA_DUMP 3
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2006-08-15 20:15:51 +08:00
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#define FPGA_LOADMK 4
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2014-05-02 19:43:39 +08:00
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#define FPGA_LOADP 5
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#define FPGA_LOADBP 6
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2014-03-14 19:05:37 +08:00
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#define FPGA_LOADFS 7
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2002-08-27 17:48:53 +08:00
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/* ------------------------------------------------------------------------- */
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/* command form:
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* fpga <op> <device number> <data addr> <datasize>
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* where op is 'load', 'dump', or 'info'
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* If there is no device number field, the fpga environment variable is used.
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* If there is no data addr field, the fpgadata environment variable is used.
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* The info command requires no data address field.
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*/
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2013-04-26 19:10:07 +08:00
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int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
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2002-08-27 17:48:53 +08:00
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{
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2004-01-02 22:00:00 +08:00
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int op, dev = FPGA_INVALID_DEVICE;
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size_t data_size = 0;
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void *fpga_data = NULL;
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2013-04-26 19:10:07 +08:00
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char *devstr = getenv("fpga");
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char *datastr = getenv("fpgadata");
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2004-01-02 22:00:00 +08:00
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int rc = FPGA_FAIL;
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2010-10-19 15:22:52 +08:00
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int wrong_parms = 0;
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2013-04-26 19:10:07 +08:00
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#if defined(CONFIG_FIT)
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2008-03-12 17:33:01 +08:00
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const char *fit_uname = NULL;
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ulong fit_addr;
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#endif
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2014-03-14 19:05:37 +08:00
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#if defined(CONFIG_CMD_FPGA_LOADFS)
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fpga_fs_info fpga_fsinfo;
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fpga_fsinfo.fstype = FS_TYPE_ANY;
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#endif
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2004-01-02 22:00:00 +08:00
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if (devstr)
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2013-04-26 19:10:07 +08:00
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dev = (int) simple_strtoul(devstr, NULL, 16);
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2004-01-02 22:00:00 +08:00
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if (datastr)
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2013-04-26 19:10:07 +08:00
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fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
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2004-01-02 22:00:00 +08:00
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switch (argc) {
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2014-03-14 19:05:37 +08:00
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#if defined(CONFIG_CMD_FPGA_LOADFS)
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case 9:
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fpga_fsinfo.blocksize = (unsigned int)
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simple_strtoul(argv[5], NULL, 16);
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fpga_fsinfo.interface = argv[6];
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fpga_fsinfo.dev_part = argv[7];
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fpga_fsinfo.filename = argv[8];
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#endif
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2004-01-02 22:00:00 +08:00
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case 5: /* fpga <op> <dev> <data> <datasize> */
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2013-04-26 19:10:07 +08:00
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data_size = simple_strtoul(argv[4], NULL, 16);
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2008-03-12 17:33:01 +08:00
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2004-01-02 22:00:00 +08:00
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case 4: /* fpga <op> <dev> <data> */
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2008-03-12 17:33:01 +08:00
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#if defined(CONFIG_FIT)
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2013-04-26 19:10:07 +08:00
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if (fit_parse_subimage(argv[3], (ulong)fpga_data,
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&fit_addr, &fit_uname)) {
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2008-03-12 17:33:01 +08:00
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fpga_data = (void *)fit_addr;
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2013-04-26 19:10:07 +08:00
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debug("* fpga: subimage '%s' from FIT image ",
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fit_uname);
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debug("at 0x%08lx\n", fit_addr);
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2008-03-12 17:33:01 +08:00
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} else
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#endif
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{
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2013-04-26 19:10:07 +08:00
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fpga_data = (void *)simple_strtoul(argv[3], NULL, 16);
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2011-12-28 14:47:01 +08:00
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debug("* fpga: cmdline image address = 0x%08lx\n",
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2013-04-26 19:10:07 +08:00
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(ulong)fpga_data);
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2008-03-12 17:33:01 +08:00
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}
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2013-04-26 19:10:07 +08:00
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debug("%s: fpga_data = 0x%x\n", __func__, (uint)fpga_data);
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2008-03-12 17:33:01 +08:00
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2004-01-02 22:00:00 +08:00
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case 3: /* fpga <op> <dev | data addr> */
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2013-04-26 19:10:07 +08:00
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dev = (int)simple_strtoul(argv[2], NULL, 16);
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2011-12-28 14:47:01 +08:00
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debug("%s: device = %d\n", __func__, dev);
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2004-01-02 22:00:00 +08:00
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/* FIXME - this is a really weak test */
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2013-04-26 19:10:07 +08:00
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if ((argc == 3) && (dev > fpga_count())) {
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/* must be buffer ptr */
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2011-12-28 14:47:01 +08:00
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debug("%s: Assuming buffer pointer in arg 3\n",
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2013-04-26 19:10:07 +08:00
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__func__);
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2008-03-12 17:33:01 +08:00
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#if defined(CONFIG_FIT)
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2013-04-26 19:10:07 +08:00
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if (fit_parse_subimage(argv[2], (ulong)fpga_data,
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&fit_addr, &fit_uname)) {
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2008-03-12 17:33:01 +08:00
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fpga_data = (void *)fit_addr;
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2013-04-26 19:10:07 +08:00
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debug("* fpga: subimage '%s' from FIT image ",
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fit_uname);
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debug("at 0x%08lx\n", fit_addr);
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2008-03-12 17:33:01 +08:00
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} else
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#endif
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{
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2013-04-26 19:10:07 +08:00
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fpga_data = (void *)dev;
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debug("* fpga: cmdline image addr = 0x%08lx\n",
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(ulong)fpga_data);
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2008-03-12 17:33:01 +08:00
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}
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2011-12-28 14:47:01 +08:00
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debug("%s: fpga_data = 0x%x\n",
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2013-04-26 19:10:07 +08:00
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__func__, (uint)fpga_data);
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2004-01-02 22:00:00 +08:00
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dev = FPGA_INVALID_DEVICE; /* reset device num */
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}
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2008-03-12 17:33:01 +08:00
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2004-01-02 22:00:00 +08:00
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case 2: /* fpga <op> */
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2013-04-26 19:10:07 +08:00
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op = (int)fpga_get_op(argv[1]);
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2004-01-02 22:00:00 +08:00
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break;
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2008-03-12 17:33:01 +08:00
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2004-01-02 22:00:00 +08:00
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default:
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2013-04-26 19:10:07 +08:00
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debug("%s: Too many or too few args (%d)\n", __func__, argc);
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2004-01-02 22:00:00 +08:00
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op = FPGA_NONE; /* force usage display */
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break;
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}
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2010-10-19 15:22:52 +08:00
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if (dev == FPGA_INVALID_DEVICE) {
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puts("FPGA device not specified\n");
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op = FPGA_NONE;
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}
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switch (op) {
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case FPGA_NONE:
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case FPGA_INFO:
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break;
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2014-03-14 19:05:37 +08:00
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#if defined(CONFIG_CMD_FPGA_LOADFS)
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case FPGA_LOADFS:
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/* Blocksize can be zero */
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if (!fpga_fsinfo.interface || !fpga_fsinfo.dev_part ||
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!fpga_fsinfo.filename)
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wrong_parms = 1;
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#endif
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2010-10-19 15:22:52 +08:00
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case FPGA_LOAD:
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2014-05-02 19:43:39 +08:00
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case FPGA_LOADP:
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2010-10-19 15:22:52 +08:00
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case FPGA_LOADB:
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2014-05-02 19:43:39 +08:00
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case FPGA_LOADBP:
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2010-10-19 15:22:52 +08:00
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case FPGA_DUMP:
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if (!fpga_data || !data_size)
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wrong_parms = 1;
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break;
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2014-03-14 19:05:38 +08:00
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#if defined(CONFIG_CMD_FPGA_LOADMK)
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2010-10-19 15:22:52 +08:00
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case FPGA_LOADMK:
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if (!fpga_data)
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wrong_parms = 1;
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break;
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2014-03-14 19:05:38 +08:00
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#endif
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2010-10-19 15:22:52 +08:00
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}
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if (wrong_parms) {
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puts("Wrong parameters for FPGA request\n");
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op = FPGA_NONE;
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}
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2004-01-02 22:00:00 +08:00
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switch (op) {
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case FPGA_NONE:
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2011-12-10 16:44:01 +08:00
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return CMD_RET_USAGE;
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2004-01-02 22:00:00 +08:00
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case FPGA_INFO:
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2013-04-26 19:10:07 +08:00
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rc = fpga_info(dev);
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2004-01-02 22:00:00 +08:00
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break;
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case FPGA_LOAD:
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2014-05-02 20:09:30 +08:00
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rc = fpga_load(dev, fpga_data, data_size, BIT_FULL);
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2004-01-02 22:00:00 +08:00
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break;
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2014-05-02 19:43:39 +08:00
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#if defined(CONFIG_CMD_FPGA_LOADP)
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case FPGA_LOADP:
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rc = fpga_load(dev, fpga_data, data_size, BIT_PARTIAL);
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break;
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#endif
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2005-01-10 02:12:51 +08:00
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case FPGA_LOADB:
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2014-05-02 20:09:30 +08:00
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rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_FULL);
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2005-01-10 02:12:51 +08:00
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break;
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2014-05-02 19:43:39 +08:00
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#if defined(CONFIG_CMD_FPGA_LOADBP)
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case FPGA_LOADBP:
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rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_PARTIAL);
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break;
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#endif
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2014-03-14 19:05:37 +08:00
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#if defined(CONFIG_CMD_FPGA_LOADFS)
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case FPGA_LOADFS:
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rc = fpga_fsload(dev, fpga_data, data_size, &fpga_fsinfo);
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break;
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#endif
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2014-03-14 19:05:38 +08:00
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#if defined(CONFIG_CMD_FPGA_LOADMK)
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2006-08-15 20:15:51 +08:00
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case FPGA_LOADMK:
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2013-04-26 19:10:07 +08:00
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switch (genimg_get_format(fpga_data)) {
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2014-05-28 17:33:33 +08:00
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#if defined(CONFIG_IMAGE_FORMAT_LEGACY)
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2008-02-04 15:28:09 +08:00
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case IMAGE_FORMAT_LEGACY:
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{
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2013-04-26 19:10:07 +08:00
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image_header_t *hdr =
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(image_header_t *)fpga_data;
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ulong data;
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2013-10-04 16:51:01 +08:00
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uint8_t comp;
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comp = image_get_comp(hdr);
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if (comp == IH_COMP_GZIP) {
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2014-07-16 16:30:50 +08:00
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#if defined(CONFIG_GZIP)
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2013-10-04 16:51:01 +08:00
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ulong image_buf = image_get_data(hdr);
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data = image_get_load(hdr);
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ulong image_size = ~0UL;
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if (gunzip((void *)data, ~0UL,
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(void *)image_buf,
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&image_size) != 0) {
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puts("GUNZIP: error\n");
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return 1;
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}
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data_size = image_size;
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2014-07-16 16:30:50 +08:00
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#else
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puts("Gunzip image is not supported\n");
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return 1;
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#endif
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2013-10-04 16:51:01 +08:00
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} else {
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data = (ulong)image_get_data(hdr);
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data_size = image_get_data_size(hdr);
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}
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2014-05-02 20:09:30 +08:00
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rc = fpga_load(dev, (void *)data, data_size,
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BIT_FULL);
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2006-08-15 20:15:51 +08:00
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}
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2008-02-04 15:28:09 +08:00
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break;
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2014-05-28 17:33:33 +08:00
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#endif
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2008-02-04 15:28:09 +08:00
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#if defined(CONFIG_FIT)
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case IMAGE_FORMAT_FIT:
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2008-03-12 17:33:01 +08:00
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{
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const void *fit_hdr = (const void *)fpga_data;
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int noffset;
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2011-07-30 21:33:49 +08:00
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const void *fit_data;
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2008-03-12 17:33:01 +08:00
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if (fit_uname == NULL) {
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2013-04-26 19:10:07 +08:00
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puts("No FIT subimage unit name\n");
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2008-03-12 17:33:01 +08:00
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return 1;
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}
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2013-04-26 19:10:07 +08:00
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if (!fit_check_format(fit_hdr)) {
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puts("Bad FIT image format\n");
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2008-03-12 17:33:01 +08:00
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return 1;
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}
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/* get fpga component image node offset */
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2013-04-26 19:10:07 +08:00
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noffset = fit_image_get_node(fit_hdr,
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fit_uname);
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2008-03-12 17:33:01 +08:00
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if (noffset < 0) {
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2013-04-26 19:10:07 +08:00
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printf("Can't find '%s' FIT subimage\n",
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fit_uname);
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2008-03-12 17:33:01 +08:00
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return 1;
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}
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/* verify integrity */
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2013-05-07 14:11:57 +08:00
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if (!fit_image_verify(fit_hdr, noffset)) {
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2008-03-12 17:33:01 +08:00
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puts ("Bad Data Hash\n");
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return 1;
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}
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/* get fpga subimage data address and length */
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2013-04-26 19:10:07 +08:00
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if (fit_image_get_data(fit_hdr, noffset,
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&fit_data, &data_size)) {
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puts("Fpga subimage data not found\n");
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2008-03-12 17:33:01 +08:00
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return 1;
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}
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2014-05-02 20:09:30 +08:00
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rc = fpga_load(dev, fit_data, data_size,
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BIT_FULL);
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2008-03-12 17:33:01 +08:00
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}
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2008-02-04 15:28:09 +08:00
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break;
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#endif
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default:
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2013-04-26 19:10:07 +08:00
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|
puts("** Unknown image type\n");
|
2008-02-04 15:28:09 +08:00
|
|
|
rc = FPGA_FAIL;
|
|
|
|
break;
|
2006-08-15 20:15:51 +08:00
|
|
|
}
|
|
|
|
break;
|
2014-03-14 19:05:38 +08:00
|
|
|
#endif
|
2006-08-15 20:15:51 +08:00
|
|
|
|
2004-01-02 22:00:00 +08:00
|
|
|
case FPGA_DUMP:
|
2013-04-26 19:10:07 +08:00
|
|
|
rc = fpga_dump(dev, fpga_data, data_size);
|
2004-01-02 22:00:00 +08:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
2013-04-26 19:10:07 +08:00
|
|
|
printf("Unknown operation\n");
|
2011-12-10 16:44:01 +08:00
|
|
|
return CMD_RET_USAGE;
|
2004-01-02 22:00:00 +08:00
|
|
|
}
|
2013-04-26 19:10:07 +08:00
|
|
|
return rc;
|
2002-08-27 17:48:53 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Map op to supported operations. We don't use a table since we
|
|
|
|
* would just have to relocate it from flash anyway.
|
|
|
|
*/
|
2013-04-26 19:10:07 +08:00
|
|
|
static int fpga_get_op(char *opstr)
|
2002-08-27 17:48:53 +08:00
|
|
|
{
|
|
|
|
int op = FPGA_NONE;
|
|
|
|
|
2013-04-26 19:10:07 +08:00
|
|
|
if (!strcmp("info", opstr))
|
2002-08-27 17:48:53 +08:00
|
|
|
op = FPGA_INFO;
|
2013-04-26 19:10:07 +08:00
|
|
|
else if (!strcmp("loadb", opstr))
|
2005-01-10 02:12:51 +08:00
|
|
|
op = FPGA_LOADB;
|
2013-04-26 19:10:07 +08:00
|
|
|
else if (!strcmp("load", opstr))
|
2002-08-27 17:48:53 +08:00
|
|
|
op = FPGA_LOAD;
|
2014-05-02 19:43:39 +08:00
|
|
|
#if defined(CONFIG_CMD_FPGA_LOADP)
|
|
|
|
else if (!strcmp("loadp", opstr))
|
|
|
|
op = FPGA_LOADP;
|
|
|
|
#endif
|
|
|
|
#if defined(CONFIG_CMD_FPGA_LOADBP)
|
|
|
|
else if (!strcmp("loadbp", opstr))
|
|
|
|
op = FPGA_LOADBP;
|
|
|
|
#endif
|
2014-03-14 19:05:37 +08:00
|
|
|
#if defined(CONFIG_CMD_FPGA_LOADFS)
|
|
|
|
else if (!strcmp("loadfs", opstr))
|
|
|
|
op = FPGA_LOADFS;
|
|
|
|
#endif
|
2014-03-14 19:05:38 +08:00
|
|
|
#if defined(CONFIG_CMD_FPGA_LOADMK)
|
2013-04-26 19:10:07 +08:00
|
|
|
else if (!strcmp("loadmk", opstr))
|
2006-08-15 20:15:51 +08:00
|
|
|
op = FPGA_LOADMK;
|
2014-03-14 19:05:38 +08:00
|
|
|
#endif
|
2013-04-26 19:10:07 +08:00
|
|
|
else if (!strcmp("dump", opstr))
|
2002-08-27 17:48:53 +08:00
|
|
|
op = FPGA_DUMP;
|
|
|
|
|
2013-04-26 19:10:07 +08:00
|
|
|
if (op == FPGA_NONE)
|
|
|
|
printf("Unknown fpga operation \"%s\"\n", opstr);
|
|
|
|
|
2002-08-27 17:48:53 +08:00
|
|
|
return op;
|
|
|
|
}
|
|
|
|
|
2014-03-14 19:05:37 +08:00
|
|
|
#if defined(CONFIG_CMD_FPGA_LOADFS)
|
|
|
|
U_BOOT_CMD(fpga, 9, 1, do_fpga,
|
|
|
|
#else
|
2013-04-26 19:10:07 +08:00
|
|
|
U_BOOT_CMD(fpga, 6, 1, do_fpga,
|
2014-03-14 19:05:37 +08:00
|
|
|
#endif
|
2013-04-26 19:10:07 +08:00
|
|
|
"loadable FPGA image support",
|
|
|
|
"[operation type] [device number] [image address] [image size]\n"
|
|
|
|
"fpga operations:\n"
|
2015-01-26 15:52:27 +08:00
|
|
|
" dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
|
2013-04-26 19:10:07 +08:00
|
|
|
" info\t[dev]\t\t\tlist known device information\n"
|
|
|
|
" load\t[dev] [address] [size]\tLoad device from memory buffer\n"
|
2014-05-02 19:43:39 +08:00
|
|
|
#if defined(CONFIG_CMD_FPGA_LOADP)
|
|
|
|
" loadp\t[dev] [address] [size]\t"
|
|
|
|
"Load device from memory buffer with partial bitstream\n"
|
|
|
|
#endif
|
2013-04-26 19:10:07 +08:00
|
|
|
" loadb\t[dev] [address] [size]\t"
|
|
|
|
"Load device from bitstream buffer (Xilinx only)\n"
|
2014-05-02 19:43:39 +08:00
|
|
|
#if defined(CONFIG_CMD_FPGA_LOADBP)
|
|
|
|
" loadbp\t[dev] [address] [size]\t"
|
|
|
|
"Load device from bitstream buffer with partial bitstream"
|
|
|
|
"(Xilinx only)\n"
|
|
|
|
#endif
|
2014-03-14 19:05:37 +08:00
|
|
|
#if defined(CONFIG_CMD_FPGA_LOADFS)
|
|
|
|
"Load device from filesystem (FAT by default) (Xilinx only)\n"
|
|
|
|
" loadfs [dev] [address] [image size] [blocksize] <interface>\n"
|
|
|
|
" [<dev[:part]>] <filename>\n"
|
|
|
|
#endif
|
2014-03-14 19:05:38 +08:00
|
|
|
#if defined(CONFIG_CMD_FPGA_LOADMK)
|
2013-04-26 19:10:07 +08:00
|
|
|
" loadmk [dev] [address]\tLoad device generated with mkimage"
|
2008-03-12 17:33:01 +08:00
|
|
|
#if defined(CONFIG_FIT)
|
2013-04-26 19:10:07 +08:00
|
|
|
"\n"
|
|
|
|
"\tFor loadmk operating on FIT format uImage address must include\n"
|
|
|
|
"\tsubimage unit name in the form of addr:<subimg_uname>"
|
2008-03-12 17:33:01 +08:00
|
|
|
#endif
|
2014-03-14 19:05:38 +08:00
|
|
|
#endif
|
2008-03-12 17:33:01 +08:00
|
|
|
);
|