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u-boot/include/configs/rk3399_common.h

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 05:58:06 +08:00
/* SPDX-License-Identifier: GPL-2.0+ */
ARM64: rockchip: add support for rk3399 SoC based evb RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-19 21:16:59 +08:00
/*
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*/
#ifndef __CONFIG_RK3399_COMMON_H
#define __CONFIG_RK3399_COMMON_H
rockchip: use rockchip linux partitions layout Unify the partitions of each chip then it will be more easy for us to write scripts, tools or guides for rockchip chips. Those extra partitions mostly are used to be compatible with our internal loaders (such as miniloader which was same as spl, or android loader then we can support dual boot) Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-08 13:47:41 +08:00
#include "rockchip-common.h"
ARM64: rockchip: add support for rk3399 SoC based evb RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-19 21:16:59 +08:00
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT
rockchip: spl: RK3399: add COUNTER_FREQUENCY define to rk3399_common.h The BootROM of the RK3399 SoC does not initialise the cntfrq_el0 (which holds the value 0 (zero) on entry into the SPL. This causes the timebase for U-Boot not to advance (and will cause a hang where a timeout would be expected... e.g. if something goes wrong during MMC/SD card startup). This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0 (if necessary). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-24 06:27:45 +08:00
#define COUNTER_FREQUENCY 24000000
rockchip: rk3399: use common secure_timer_init() for spl/tpl SPL/TPL share the same secure_timer_init(), update to use one copy source code and update to use CONFIG_ROCKCHIP_STIMER_BASE as base address and rename to function name to rockchip_stimer_init(). Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-09 22:05:59 +08:00
#define CONFIG_ROCKCHIP_STIMER_BASE 0xff8680a0
rockchip: spl: RK3399: add COUNTER_FREQUENCY define to rk3399_common.h The BootROM of the RK3399 SoC does not initialise the cntfrq_el0 (which holds the value 0 (zero) on entry into the SPL. This causes the timebase for U-Boot not to advance (and will cause a hang where a timeout would be expected... e.g. if something goes wrong during MMC/SD card startup). This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0 (if necessary). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-24 06:27:45 +08:00
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-22 19:59:09 +08:00
#define CONFIG_IRAM_BASE 0xff8c0000
ARM64: rockchip: add support for rk3399 SoC based evb RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-19 21:16:59 +08:00
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
#define CONFIG_SYS_LOAD_ADDR 0x00800800
rockchip: rk3399: add tpl support Rockchip platform suppose to use TPL(run in SRAM) as dram init and SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be limited by SRAM size. This patch add rk3399-board-tpl.c and its common configs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2018-11-09 11:18:15 +08:00
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
#define CONFIG_SPL_STACK 0x00400000
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-10-18 15:54:16 +08:00
#define CONFIG_SPL_MAX_SIZE 0x40000
rockchip: rk3399: add tpl support Rockchip platform suppose to use TPL(run in SRAM) as dram init and SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be limited by SRAM size. This patch add rk3399-board-tpl.c and its common configs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2018-11-09 11:18:15 +08:00
#define CONFIG_SPL_BSS_START_ADDR 0x00400000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000
#else
rockchip: arm64: rk3399: add SPL support Add SPL support for rk3399, default with of-platdata enabled. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Drop Kconfig changes to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-23 16:09:05 +08:00
#define CONFIG_SPL_STACK 0xff8effff
rockchip: rk3399: correct SPL_MAX_SIZE The SPL_MAX_SIZE is the internal memory size minux the space used by bootrom. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-14 16:14:18 +08:00
#define CONFIG_SPL_MAX_SIZE 0x30000 - 0x2000
rockchip: arm64: rk3399: add SPL support Add SPL support for rk3399, default with of-platdata enabled. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Drop Kconfig changes to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-23 16:09:05 +08:00
/* BSS setup */
#define CONFIG_SPL_BSS_START_ADDR 0xff8e0000
#define CONFIG_SPL_BSS_MAX_SIZE 0x10000
rockchip: rk3399: add tpl support Rockchip platform suppose to use TPL(run in SRAM) as dram init and SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be limited by SRAM size. This patch add rk3399-board-tpl.c and its common configs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2018-11-09 11:18:15 +08:00
#endif
ARM64: rockchip: add support for rk3399 SoC based evb RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-19 21:16:59 +08:00
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
/* MMC/SD IP block */
#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000
/* RAW SD card / eMMC locations. */
/* FAT sd card locations. */
#define CONFIG_SYS_SDRAM_BASE 0
rockchip: add sdram_common for common functions There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common
2017-06-23 16:11:05 +08:00
#define SDRAM_MAX_SIZE 0xf8000000
ARM64: rockchip: add support for rk3399 SoC based evb RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-19 21:16:59 +08:00
#ifndef CONFIG_SPL_BUILD
#define ENV_MEM_LAYOUT_SETTINGS \
rockchip: rk3399: do not use lower address The lower address is reserved for ATF, do not use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-07 18:12:55 +08:00
"scriptaddr=0x00500000\0" \
rk3399: Add boot flash script offset, size Most of the SPI flash devices in rockchip (rk3399) are 16MiB size. So, let's use the script offset at the end of 8K.  This way it cannot overlap any offsets being used by software components in flash layout. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-11 02:26:30 +08:00
"script_offset_f=0xffe000\0" \
"script_size_f=0x2000\0" \
rockchip: rk3399: do not use lower address The lower address is reserved for ATF, do not use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-07 18:12:55 +08:00
"pxefile_addr_r=0x00600000\0" \
ARM64: rockchip: add support for rk3399 SoC based evb RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-19 21:16:59 +08:00
"fdt_addr_r=0x01f00000\0" \
rockchip: add text_offset to kernel_addr_r on aarch64 platforms Booting a aarch64 Linux kernel requires the image to be placed text_offset bytes from a 2MB aligned address. See https://www.kernel.org/doc/Documentation/arm64/booting.txt booti_setup() takes care about this alignment and will relocate the image if not properly aligned with memmove(). This can require up to double the size of the loaded image and therefore accidentally overwrite content placed there (i.e ramdisk_addr_r) for large kernel images. By adding text_offset to the default kernel_addr_r we can prevent that from happening for kernels larger 18MB and also save a few cycles. We can assume a text_offset of 0x80000 for most cases, all others will be handled by booti_setup() anyway. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-19 15:02:26 +08:00
"kernel_addr_r=0x02080000\0" \
rockchip: rk3399: Add default env to support compressed kernel Image Add default kernel_comp_addr_r and kernel_comp_size to support boot from compressed kernel Image, this space is temporarily used during decompress according to README.distro. Reported-by: Tian Yuanhao <tianyuanhao@aliyun.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-18 22:45:19 +08:00
"ramdisk_addr_r=0x06000000\0" \
"kernel_comp_addr_r=0x08000000\0" \
"kernel_comp_size=0x2000000\0"
ARM64: rockchip: add support for rk3399 SoC based evb RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-19 21:16:59 +08:00
rockchip: rk3399: Add ROCKCHIP_DEVICE_SETTINGS to set env Some boards use different stdio environment variables from the default. Provide a #define for this which can be set before including the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-22 05:53:32 +08:00
#ifndef ROCKCHIP_DEVICE_SETTINGS
#define ROCKCHIP_DEVICE_SETTINGS
#endif
ARM64: rockchip: add support for rk3399 SoC based evb RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-19 21:16:59 +08:00
#include <config_distro_bootcmd.h>
rk3399: Enable SF distro bootcmd Enable SPI flash(SF) distro boot command in rk3399. This distro boot will read the boot script at specific location at the flash and start sourcing the same. Included the SF device at the last of the target devices list since all the rest of the devices on the list have more possibility to boot the distribution due to the size of the SPI flash is concern. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-11 02:26:31 +08:00
#include <environment/distro/sf.h>
ARM64: rockchip: add support for rk3399 SoC based evb RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-19 21:16:59 +08:00
#define CONFIG_EXTRA_ENV_SETTINGS \
configs: rk3399: add gpt and fs support To compatible with distro boot, we need to add gpt and fs support, including gpt table and vfat, ext2, ext4 support. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
2016-08-04 11:40:29 +08:00
ENV_MEM_LAYOUT_SETTINGS \
rockchip: utilize CONFIG_DEFAULT_FDT_FILE Currently the fdtfile environment variable is set to CONFIG_DEFAULT_DEVICE_TREE which is іnternally used as U-Boot devicetree source. The OS can use a different filename and Kconfig gives us the ability to select a default devicetree via CONFIG_DEFAULT_FDT_FILE. This also gives user configuring U-Boot via menuconfig the behaviour someone would expect. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-05-26 05:45:05 +08:00
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
configs: rk3399: add gpt and fs support To compatible with distro boot, we need to add gpt and fs support, including gpt table and vfat, ext2, ext4 support. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
2016-08-04 11:40:29 +08:00
"partitions=" PARTS_DEFAULT \
rockchip: rk3399: Add ROCKCHIP_DEVICE_SETTINGS to set env Some boards use different stdio environment variables from the default. Provide a #define for this which can be set before including the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-22 05:53:32 +08:00
ROCKCHIP_DEVICE_SETTINGS \
rockchip: rk3399: Add bootcount support Add bootcount support for Rockchip rk3399. The bootcount value is preserved in PMU_SYS_REG0 register, this would help to support redundent boot. Once the redundant boot triggers, the altboot command will look for extlinux-rollback.conf on particular bootable partition which supposed to be a recovery partition where redundant boot required. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-09 16:52:19 +08:00
BOOTENV \
rk3399: Add BOOTENV_SF command Add missing BOOTENV_SF command in rk3399 config. Fix it. Fixes: f263b860acf8 ("rk3399: Enable SF distro bootcmd") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reported-by: Suniel Mahesh <sunil@amarulasolutions.com> Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-08 22:17:08 +08:00
BOOTENV_SF \
rockchip: rk3399: Add bootcount support Add bootcount support for Rockchip rk3399. The bootcount value is preserved in PMU_SYS_REG0 register, this would help to support redundent boot. Once the redundant boot triggers, the altboot command will look for extlinux-rollback.conf on particular bootable partition which supposed to be a recovery partition where redundant boot required. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-09 16:52:19 +08:00
"altbootcmd=" \
"setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
"run distro_bootcmd\0"
ARM64: rockchip: add support for rk3399 SoC based evb RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-19 21:16:59 +08:00
#endif
config: rk3399: add usb related configs This patch to enable configs for usb module - xhci - ehci - usb storage - usb net Signed-off-by: MengDongyang <daniel.meng@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Squashed in patch to move to Kconfig: https://patchwork.ozlabs.org/patch/672543/ Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
2016-08-24 12:02:19 +08:00
/* enable usb config for usb ether */
ARM64: rockchip: add support for rk3399 SoC based evb RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-19 21:16:59 +08:00
#endif
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