2015-03-03 03:40:53 +08:00
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/*
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* Copyright (c) 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _X86_CHROMEBOOK_H
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#define _X86_CHROMEBOOK_H
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#define CONFIG_SYS_MONITOR_LEN (1 << 20)
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#define CONFIG_MISC_INIT_R
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#define CONFIG_X86_MRC_ADDR 0xfffa0000
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2016-03-12 13:07:31 +08:00
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#define CONFIG_X86_REFCODE_ADDR 0xffea0000
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#define CONFIG_X86_REFCODE_RUN_ADDR 0
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2015-03-03 03:40:53 +08:00
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#define CONFIG_SCSI_DEV_LIST \
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{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
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{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
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{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
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{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}, \
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2016-03-16 21:44:43 +08:00
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{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI}, \
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{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI}
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2015-03-03 03:40:53 +08:00
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#define CONFIG_PCI_MEM_BUS 0xe0000000
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#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
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#define CONFIG_PCI_MEM_SIZE 0x10000000
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#define CONFIG_PCI_PREF_BUS 0xd0000000
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#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS
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#define CONFIG_PCI_PREF_SIZE 0x10000000
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#define CONFIG_PCI_IO_BUS 0x1000
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#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
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#define CONFIG_PCI_IO_SIZE 0xefff
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#define CONFIG_BIOSEMU
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#define VIDEO_IO_OFFSET 0
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#define CONFIG_X86EMU_RAW_IO
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#undef CONFIG_ENV_SIZE
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#define CONFIG_ENV_SIZE 0x1000
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#define CONFIG_ENV_SECT_SIZE 0x1000
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#define CONFIG_ENV_OFFSET 0x003f8000
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2016-10-09 19:14:20 +08:00
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#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \
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"stdout=vidconsole,serial\0" \
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"stderr=vidconsole,serial\0"
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2015-03-03 03:40:53 +08:00
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#endif
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