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u-boot/include/configs/rk3368_common.h

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 05:58:06 +08:00
/* SPDX-License-Identifier: GPL-2.0+ */
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 17:51:18 +08:00
/*
* Copyright (c) 2016 Andreas Färber
*/
#ifndef __CONFIG_RK3368_COMMON_H
#define __CONFIG_RK3368_COMMON_H
rockchip: configs: use rockchip-common.h for rk3368 rockchip-common.h already defines values that are missing from rk3368_common.h For example BOOT_TARGET_DEVICES was defined empty and therefore distroboot had no boot targets. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-07 01:24:09 +08:00
#include "rockchip-common.h"
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 17:51:18 +08:00
#define CONFIG_SYS_CACHELINE_SIZE 64
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-03-28 11:01:23 +08:00
#include <asm/arch-rockchip/hardware.h>
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 17:51:18 +08:00
#include <linux/sizes.h>
rockchip: add sdram_common for common functions There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common
2017-06-23 16:11:05 +08:00
#define CONFIG_SYS_SDRAM_BASE 0
#define SDRAM_MAX_SIZE 0xff000000
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 17:51:18 +08:00
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-09 22:00:31 +08:00
#define CONFIG_ROCKCHIP_STIMER_BASE 0xff830020
#define COUNTER_FREQUENCY 24000000
rockchip: rk3368: spl: define COUNTER_FREQUENCY to 24MHz The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0. This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0. If the counter-frequency is not correctly set up, the calculation of delays using the ARMv8 generic timer can not work correctly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-23 05:31:55 +08:00
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-22 19:59:09 +08:00
#define CONFIG_IRAM_BASE 0xff8c0000
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 17:51:18 +08:00
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB behind the area where we load u-boot to, which depending on u-boot size may overlap at some point. So for safety just pick the same value rk3399 has and set CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-02-09 21:47:03 +08:00
#define CONFIG_SYS_LOAD_ADDR 0x00800800
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 17:51:18 +08:00
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-10-18 15:54:16 +08:00
#define CONFIG_SPL_MAX_SIZE 0x40000
rockchip: rk3368: spl: add memory layout for TPL and SPL For the RK3368, we use a multi-stage boot-process consisting of the following: 1. TPL: initalises DRAM, returns to boot-ROM (which then loads the next stage and transfers control to it) 2. SPL: a full-features SPL stage including OF_CONTROL and FIT image loading, which fetches the ATF, DTB and full U-Boot and then transfers control to the ATF (using the BL31 parameter block to indicate the location of BL33/U-Boot) 3. ATF: sets up the secure world and exits to BL33 (i.e. a full U-Boot) in the normal world 4. full U-Boot TPL/SPL and the full U-Boot are built from this tree and need to run from distinct text addresses and with distinct initial stack pointer addresses. This commit sets up the configuration to run: - TPL from the SRAM at 0xff8c0000 (note that the first 0x1000 are reserved for use by the boot-ROM and contain the SP when the TPL is entered) - SPL from DRAM at 0x0 - U-Boot from DRAM at 0x200000 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-14 23:52:09 +08:00
#define CONFIG_SPL_BSS_START_ADDR 0x400000
#define CONFIG_SPL_BSS_MAX_SIZE 0x20000
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
2019-03-29 22:48:26 +08:00
#define CONFIG_SPL_STACK 0x00188000
rockchip: rk3368: spl: add memory layout for TPL and SPL For the RK3368, we use a multi-stage boot-process consisting of the following: 1. TPL: initalises DRAM, returns to boot-ROM (which then loads the next stage and transfers control to it) 2. SPL: a full-features SPL stage including OF_CONTROL and FIT image loading, which fetches the ATF, DTB and full U-Boot and then transfers control to the ATF (using the BL31 parameter block to indicate the location of BL33/U-Boot) 3. ATF: sets up the secure world and exits to BL33 (i.e. a full U-Boot) in the normal world 4. full U-Boot TPL/SPL and the full U-Boot are built from this tree and need to run from distinct text addresses and with distinct initial stack pointer addresses. This commit sets up the configuration to run: - TPL from the SRAM at 0xff8c0000 (note that the first 0x1000 are reserved for use by the boot-ROM and contain the SP when the TPL is entered) - SPL from DRAM at 0x0 - U-Boot from DRAM at 0x200000 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-14 23:52:09 +08:00
rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so that regular kernel images can get loaded without problems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-02-09 21:47:04 +08:00
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 17:51:18 +08:00
#ifndef CONFIG_SPL_BUILD
#define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x00500000\0" \
"pxefile_addr_r=0x00600000\0" \
"fdt_addr_r=0x5600000\0" \
"kernel_addr_r=0x280000\0" \
"ramdisk_addr_r=0x5bf0000\0"
#include <config_distro_bootcmd.h>
#define CONFIG_EXTRA_ENV_SETTINGS \
rockchip: utilize CONFIG_DEFAULT_FDT_FILE Currently the fdtfile environment variable is set to CONFIG_DEFAULT_DEVICE_TREE which is іnternally used as U-Boot devicetree source. The OS can use a different filename and Kconfig gives us the ability to select a default devicetree via CONFIG_DEFAULT_FDT_FILE. This also gives user configuring U-Boot via menuconfig the behaviour someone would expect. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-05-26 05:45:05 +08:00
"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-04 20:32:23 +08:00
ENV_MEM_LAYOUT_SETTINGS \
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 17:51:18 +08:00
BOOTENV
#endif
#endif
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