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u-boot/include/configs/colibri_vf.h

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 05:58:06 +08:00
/* SPDX-License-Identifier: GPL-2.0+ */
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
/*
colibri_vf: migrate fec, esdhc, nfc and usb to driver model Migrate FEC, ESDHC, NFC and USB to driver model. While at it also do no longer enable optional I2C clock in board file as the generic clock code now handles this. Note for space reason and as it is not required just for booting we do not enable I2C in U-Boot by default. While at it also update copyright period. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-03-26 00:25:01 +08:00
* Copyright 2015-2019 Toradex, Inc.
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
*
apalis/colibri_imx7/pxa270/t20/t30/vf: integrate config block handling With our common code in place actually make use of it across all our modules. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2016-11-17 00:49:23 +08:00
* Configuration settings for the Toradex VF50/VF61 modules.
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
*
* Based on vf610twr.h:
* Copyright 2013 Freescale Semiconductor, Inc.
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <asm/arch/imx-regs.h>
config: colibri_vf: use macros from linux/sizes.h Use SZ_X{MK} macros from linux/sizes.h for include/configs/colibri_vf.h. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-03-26 00:25:02 +08:00
#include <linux/sizes.h>
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
common/board_f.c: change the macro name and remove it for PPC platforms For most PPC platforms, they will call the first get_clocks() in init_sequence_f[] as they define CONFIG_PPC. CONFIG_SYS_FSL_CLK is then defined to call the second get_clocks(), which should be redundant for PPC. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-26 19:47:42 +08:00
#define CONFIG_SYS_FSL_CLK
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
#define CONFIG_SKIP_LOWLEVEL_INIT
board: toradex: colibri_vf: Add DCU support for Colibri Vybrid The Vybrid SoC family has the same display controller unit (DCU) like the LS1021A SoC. This patch adds platform data, pinmux defines and clock control to enable the driver for Toradex Colibri Vybrid module. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-04-11 13:42:14 +08:00
#ifdef CONFIG_VIDEO_FSL_DCU_FB
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_SYS_FSL_DCU_LE
#define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR
#define DCU_LAYER_MAX_NUM 64
#endif
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
/* Size of malloc() pool */
config: colibri_vf: use macros from linux/sizes.h Use SZ_X{MK} macros from linux/sizes.h for include/configs/colibri_vf.h. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-03-26 00:25:02 +08:00
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M)
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
/* NAND support */
mtd: vf610_nfc: enable ONFI detection This changes enable ONFI detection. The Read ID command now allows one address byte which is needed for ONFI detection. To read the ONFI parameter page, the NAND_CMD_PARAM need to be supported. The CMD code enables one command and one address byte along with reading data from flash using R/B#, as specified by ONFI. Signed-off-by: Stefan Agner <stefan@agner.ch>
2015-05-09 01:07:13 +08:00
#define CONFIG_SYS_NAND_ONFI_DETECTION
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_SERVERIP 192.168.10.1
#define CONFIG_LOADADDR 0x80008000
#define CONFIG_FDTADDR 0x84000000
/* We boot from the gfxRAM area of the OCRAM. */
configs: vf610: increase maximum size and enforce correct limit On Vybrid SoCs U-Boot gets loaded into GFX SRAM which is 512KiB. Currently 32KiB is reserved for the IMX header. However, this is not reflected in the size limit. In v2017.11-rc2 the actual size limit (512KiB-32KiB) has been reached for Colibri VF61, which lead to a successful build of U-Boot but not a working binary. The IMX header is much smaller than 32KiB, typically around 1KiB. Decrease the reserved size to 4KiB and specify the correct U-Boot size limit. Apply this new base address and limit for all Vybrid based boards. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2017-10-17 19:59:19 +08:00
#define CONFIG_BOARD_SIZE_LIMIT 520192
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
#define SD_BOOTCMD \
"sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \
"sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \
"${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
"load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \
"load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \
configs: colibri_vf: Add fdt_fixup environment variable u-boot allows modifying a device tree after it is loaded into memory. Add fdt_fixup hook in u-boot environment which can facilitate such modifications. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2016-12-02 16:58:27 +08:00
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
#define NFS_BOOTCMD \
"nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
"nfsboot=run setup; " \
"setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \
"${setupargs} ${vidargs}; echo Booting from NFS...;" \
"dhcp ${kernel_addr_r} && " \
"tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
configs: colibri_vf: Add fdt_fixup environment variable u-boot allows modifying a device tree after it is loaded into memory. Add fdt_fixup hook in u-boot environment which can facilitate such modifications. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2016-12-02 16:58:27 +08:00
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
#define UBI_BOOTCMD \
"ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
"ubi.fm_autoconvert=1\0" \
"ubiboot=run setup; " \
"setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \
"${setupargs} ${vidargs}; echo Booting from NAND...; " \
colibri_vf: Read kernel and device tree from static UBI volumes Our update scripts write the kernel and device tree in seperate UBI volumes. This allows to use a lot less UBI/UBIFS support in U-Boot, which should lower the risk of hitting bugs in this area. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2016-11-25 18:49:17 +08:00
"ubi part ubi && " \
"ubi read ${kernel_addr_r} kernel && " \
"ubi read ${fdt_addr_r} dtb && " \
configs: colibri_vf: Add fdt_fixup environment variable u-boot allows modifying a device tree after it is loaded into memory. Add fdt_fixup hook in u-boot environment which can facilitate such modifications. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2016-12-02 16:58:27 +08:00
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot"
colibri_vf: Enable USB support for Colibri Vybrid Enable USB support on Toradex Colibri Vybrid Modules. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
2015-04-17 21:26:42 +08:00
#define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel_addr_r=0x82000000\0" \
"fdt_addr_r=0x84000000\0" \
"kernel_file=zImage\0" \
"fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \
"fdt_board=eval-v3\0" \
configs: colibri_vf: Add fdt_fixup environment variable u-boot allows modifying a device tree after it is loaded into memory. Add fdt_fixup hook in u-boot environment which can facilitate such modifications. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2016-12-02 16:58:27 +08:00
"fdt_fixup=;\0" \
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
"defargs=\0" \
"console=ttyLP0\0" \
"setup=setenv setupargs " \
"console=tty1 console=${console}" \
",${baudrate}n8 ${memargs}\0" \
"setsdupdate=mmc rescan && set interface mmc && " \
"fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
"setusbupdate=usb start && set interface usb && " \
"fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
"setupdate=run setsdupdate || run setusbupdate\0" \
Kconfig: Migrate MTDIDS_DEFAULT / MTDPARTS_DEFAULT We move all instances of CONFIG_MTDIDS_DEFAULT and CONFIG_MTDPARTS_DEFAULT from the header files to the defconfig files. There's a few cases here where we need to expand upon what was in the header file. Tested-by: Adam Ford <aford173@gmail.com> #omap3_logic Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-23 05:55:07 +08:00
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
colibri_vf: Enable USB support for Colibri Vybrid Enable USB support on Toradex Colibri Vybrid Modules. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
2015-04-17 21:26:42 +08:00
"dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
board: toradex: colibri_vf: Add DCU support for Colibri Vybrid The Vybrid SoC family has the same display controller unit (DCU) like the LS1021A SoC. This patch adds platform data, pinmux defines and clock control to enable the driver for Toradex Colibri Vybrid module. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-04-11 13:42:14 +08:00
"video-mode=dcufb:640x480-16@60,monitor=lcd\0" \
"splashpos=m,m\0" \
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
SD_BOOTCMD \
NFS_BOOTCMD \
UBI_BOOTCMD
/* Miscellaneous configurable options */
colibri_vf: Increase console IO buffer size to 1024 Increase console IO buffer size to 1024 from the previous value of 256. The previous value was too short for editing environment variables like ubiboot from the console. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
2015-06-08 15:10:41 +08:00
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_MEMTEST_START 0x80010000
#define CONFIG_SYS_MEMTEST_END 0x87C00000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/* Physical memory map */
#define PHYS_SDRAM (0x80000000)
config: colibri_vf: use macros from linux/sizes.h Use SZ_X{MK} macros from linux/sizes.h for include/configs/colibri_vf.h. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-03-26 00:25:02 +08:00
#define PHYS_SDRAM_SIZE (256 * SZ_1M)
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Environment organization */
#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE (64 * 2048)
#define CONFIG_ENV_RANGE (4 * 64 * 2048)
#define CONFIG_ENV_OFFSET (12 * 64 * 2048)
#endif
colibri_vf: Enable USB support for Colibri Vybrid Enable USB support on Toradex Colibri Vybrid Modules. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
2015-04-17 21:26:42 +08:00
/* USB Host Support */
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
/* USB DFU */
config: colibri_vf: use macros from linux/sizes.h Use SZ_X{MK} macros from linux/sizes.h for include/configs/colibri_vf.h. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-03-26 00:25:02 +08:00
#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
colibri_vf: Enable USB support for Colibri Vybrid Enable USB support on Toradex Colibri Vybrid Modules. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
2015-04-17 21:26:42 +08:00
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 18:54:26 +08:00
#endif /* __CONFIG_H */
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