2015-11-17 17:53:24 +08:00
|
|
|
CONFIG_PPC=y
|
2022-10-21 08:22:39 +08:00
|
|
|
CONFIG_TEXT_BASE=0xF0000000
|
2019-11-19 09:02:10 +08:00
|
|
|
CONFIG_ENV_SIZE=0x4000
|
|
|
|
CONFIG_ENV_SECT_SIZE=0x20000
|
2021-06-28 22:17:29 +08:00
|
|
|
CONFIG_DEFAULT_DEVICE_TREE="kmtepr2"
|
2020-02-07 02:42:52 +08:00
|
|
|
CONFIG_BOOTCOUNT_BOOTLIMIT=3
|
2019-01-21 16:17:53 +08:00
|
|
|
CONFIG_SYS_CLK_FREQ=66000000
|
2022-04-09 01:36:51 +08:00
|
|
|
CONFIG_SYS_LOAD_ADDR=0x100000
|
|
|
|
CONFIG_ENV_ADDR=0xF00C0000
|
2015-11-17 17:53:24 +08:00
|
|
|
CONFIG_MPC83xx=y
|
2019-01-21 16:17:56 +08:00
|
|
|
CONFIG_HIGH_BATS=y
|
2022-10-29 08:26:55 +08:00
|
|
|
CONFIG_SYS_INIT_RAM_LOCK=y
|
2019-01-21 16:17:33 +08:00
|
|
|
CONFIG_TARGET_KMTEPR2=y
|
2019-01-21 16:17:54 +08:00
|
|
|
CONFIG_CORE_PLL_RATIO_25_1=y
|
|
|
|
CONFIG_QUICC_MULT_FACTOR_3=y
|
|
|
|
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
|
|
|
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
2019-01-21 16:17:57 +08:00
|
|
|
CONFIG_BAT0=y
|
|
|
|
CONFIG_BAT0_NAME="SDRAM"
|
|
|
|
CONFIG_BAT0_BASE=0x00000000
|
|
|
|
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
|
|
|
CONFIG_BAT0_ACCESS_RW=y
|
|
|
|
CONFIG_BAT0_ICACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT0_ICACHE_GUARDED=y
|
|
|
|
CONFIG_BAT0_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT0_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT0_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT1=y
|
|
|
|
CONFIG_BAT1_NAME="IMMR"
|
|
|
|
CONFIG_BAT1_BASE=0xE0000000
|
|
|
|
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
|
|
|
CONFIG_BAT1_ACCESS_RW=y
|
|
|
|
CONFIG_BAT1_ICACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT1_ICACHE_GUARDED=y
|
|
|
|
CONFIG_BAT1_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT1_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT1_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT2=y
|
|
|
|
CONFIG_BAT2_NAME="KMBEC_FPGA"
|
|
|
|
CONFIG_BAT2_BASE=0xE8000000
|
|
|
|
CONFIG_BAT2_LENGTH_128_MBYTES=y
|
|
|
|
CONFIG_BAT2_ACCESS_RW=y
|
|
|
|
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
|
|
|
CONFIG_BAT2_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT2_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT2_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT3=y
|
|
|
|
CONFIG_BAT3_NAME="FLASH"
|
|
|
|
CONFIG_BAT3_BASE=0xF0000000
|
|
|
|
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
|
|
|
CONFIG_BAT3_ACCESS_RW=y
|
|
|
|
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
|
|
|
CONFIG_BAT3_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT3_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT3_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT4=y
|
|
|
|
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
|
|
|
|
CONFIG_BAT4_BASE=0xE6000000
|
|
|
|
CONFIG_BAT4_ACCESS_RW=y
|
|
|
|
CONFIG_BAT4_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT5=y
|
|
|
|
CONFIG_BAT5_NAME="APP1"
|
|
|
|
CONFIG_BAT5_BASE=0xA0000000
|
|
|
|
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
|
|
|
CONFIG_BAT5_ACCESS_RW=y
|
|
|
|
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
|
|
|
|
CONFIG_BAT5_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT5_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT5_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT6=y
|
|
|
|
CONFIG_BAT6_NAME="APP2"
|
|
|
|
CONFIG_BAT6_BASE=0xB0000000
|
|
|
|
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
|
|
|
CONFIG_BAT6_ACCESS_RW=y
|
|
|
|
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
|
|
|
CONFIG_BAT6_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT6_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT6_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
2019-01-21 16:17:58 +08:00
|
|
|
CONFIG_LBLAW0=y
|
|
|
|
CONFIG_LBLAW0_BASE=0xF0000000
|
|
|
|
CONFIG_LBLAW0_NAME="FLASH"
|
|
|
|
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
|
|
|
|
CONFIG_LBLAW1=y
|
|
|
|
CONFIG_LBLAW1_BASE=0xE8000000
|
|
|
|
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
|
|
|
|
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
|
|
|
|
CONFIG_LBLAW2=y
|
|
|
|
CONFIG_LBLAW2_BASE=0xA0000000
|
|
|
|
CONFIG_LBLAW2_NAME="APP1"
|
|
|
|
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
|
|
|
|
CONFIG_LBLAW3=y
|
|
|
|
CONFIG_LBLAW3_BASE=0xB0000000
|
|
|
|
CONFIG_LBLAW3_NAME="APP2"
|
|
|
|
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
|
2019-05-27 02:45:25 +08:00
|
|
|
CONFIG_ELBC_BR0_OR0=y
|
|
|
|
CONFIG_BR0_OR0_NAME="FLASH"
|
|
|
|
CONFIG_BR0_OR0_BASE=0xF0000000
|
|
|
|
CONFIG_BR0_PORTSIZE_16BIT=y
|
|
|
|
CONFIG_OR0_AM_256_MBYTES=y
|
|
|
|
CONFIG_OR0_SCY_5=y
|
|
|
|
CONFIG_OR0_CSNT_EARLIER=y
|
|
|
|
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
|
|
|
CONFIG_OR0_TRLX_RELAXED=y
|
|
|
|
CONFIG_OR0_EAD_EXTRA=y
|
|
|
|
CONFIG_ELBC_BR1_OR1=y
|
|
|
|
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
|
|
|
|
CONFIG_BR1_OR1_BASE=0xE8000000
|
|
|
|
CONFIG_OR1_AM_128_MBYTES=y
|
|
|
|
CONFIG_OR1_SCY_2=y
|
|
|
|
CONFIG_OR1_CSNT_EARLIER=y
|
|
|
|
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
|
|
|
CONFIG_OR1_TRLX_RELAXED=y
|
|
|
|
CONFIG_OR1_EAD_EXTRA=y
|
|
|
|
CONFIG_ELBC_BR2_OR2=y
|
|
|
|
CONFIG_BR2_OR2_NAME="APP1"
|
|
|
|
CONFIG_BR2_OR2_BASE=0xA0000000
|
|
|
|
CONFIG_OR2_AM_256_MBYTES=y
|
|
|
|
CONFIG_OR2_SCY_2=y
|
|
|
|
CONFIG_OR2_CSNT_EARLIER=y
|
|
|
|
CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
|
|
|
|
CONFIG_OR2_TRLX_RELAXED=y
|
|
|
|
CONFIG_OR2_EAD_EXTRA=y
|
|
|
|
CONFIG_ELBC_BR3_OR3=y
|
|
|
|
CONFIG_BR3_OR3_NAME="APP2"
|
|
|
|
CONFIG_BR3_OR3_BASE=0xB0000000
|
|
|
|
CONFIG_BR3_PORTSIZE_16BIT=y
|
|
|
|
CONFIG_OR3_AM_256_MBYTES=y
|
|
|
|
CONFIG_OR3_SCY_4=y
|
2019-01-21 16:18:09 +08:00
|
|
|
CONFIG_HID0_FINAL_EMCP=y
|
|
|
|
CONFIG_HID0_FINAL_ICE=y
|
|
|
|
CONFIG_HID2_HBE=y
|
2019-01-21 16:18:12 +08:00
|
|
|
CONFIG_ACR_PIPE_DEP_4=y
|
|
|
|
CONFIG_ACR_RPTCNT_4=y
|
|
|
|
CONFIG_ACR_APARK_MASTER=y
|
|
|
|
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
2019-05-27 02:45:25 +08:00
|
|
|
CONFIG_LCRR_EADC_1=y
|
|
|
|
CONFIG_LCRR_CLKDIV_2=y
|
2021-12-18 07:08:36 +08:00
|
|
|
CONFIG_83XX_PCICLK=0x3ef1480
|
2016-02-23 13:55:43 +08:00
|
|
|
CONFIG_OF_BOARD_SETUP=y
|
|
|
|
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
2016-04-23 04:41:25 +08:00
|
|
|
CONFIG_AUTOBOOT_KEYED=y
|
|
|
|
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
|
|
|
|
CONFIG_AUTOBOOT_STOP_STR=" "
|
2020-10-10 00:22:06 +08:00
|
|
|
CONFIG_BOARD_EARLY_INIT_R=y
|
|
|
|
CONFIG_LAST_STAGE_INIT=y
|
|
|
|
CONFIG_MISC_INIT_R=y
|
|
|
|
CONFIG_HUSH_PARSER=y
|
2022-05-12 04:21:06 +08:00
|
|
|
CONFIG_SYS_MAXARGS=32
|
2022-05-12 06:01:06 +08:00
|
|
|
CONFIG_SYS_CBSIZE=512
|
2022-05-12 05:38:09 +08:00
|
|
|
CONFIG_SYS_PBSIZE=532
|
2022-06-26 07:29:46 +08:00
|
|
|
CONFIG_SYS_BOOTM_LEN=0x2000000
|
2017-10-09 02:48:01 +08:00
|
|
|
CONFIG_CMD_IMLS=y
|
2016-04-25 05:29:26 +08:00
|
|
|
CONFIG_CMD_ASKENV=y
|
|
|
|
CONFIG_CMD_GREPENV=y
|
2017-05-17 17:25:10 +08:00
|
|
|
CONFIG_CMD_EEPROM=y
|
2021-08-18 05:59:45 +08:00
|
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
|
|
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
|
2016-04-23 04:41:25 +08:00
|
|
|
CONFIG_CMD_I2C=y
|
2022-10-29 08:27:02 +08:00
|
|
|
CONFIG_LOADS_ECHO=y
|
|
|
|
CONFIG_SYS_LOADS_BAUD_CHANGE=y
|
2016-04-23 04:41:25 +08:00
|
|
|
CONFIG_CMD_DHCP=y
|
2022-02-26 00:19:50 +08:00
|
|
|
CONFIG_BOOTP_BOOTFILESIZE=y
|
2016-04-25 05:29:26 +08:00
|
|
|
CONFIG_CMD_MII=y
|
2016-04-23 04:41:25 +08:00
|
|
|
CONFIG_CMD_PING=y
|
2017-05-17 17:25:37 +08:00
|
|
|
CONFIG_CMD_JFFS2=y
|
2018-11-14 08:54:45 +08:00
|
|
|
CONFIG_CMD_MTDPARTS=y
|
2017-10-23 05:55:07 +08:00
|
|
|
CONFIG_MTDIDS_DEFAULT="nor0=boot"
|
|
|
|
CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
|
2016-09-21 13:58:19 +08:00
|
|
|
CONFIG_CMD_UBI=y
|
2017-07-23 06:36:16 +08:00
|
|
|
# CONFIG_CMD_UBIFS is not set
|
2020-07-03 19:48:56 +08:00
|
|
|
CONFIG_ENV_OVERWRITE=y
|
2019-11-11 00:28:03 +08:00
|
|
|
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
2019-11-19 09:02:10 +08:00
|
|
|
CONFIG_ENV_ADDR_REDUND=0xF00E0000
|
2022-03-11 22:12:07 +08:00
|
|
|
CONFIG_USE_ETHPRIME=y
|
|
|
|
CONFIG_ETHPRIME="UEC0"
|
2020-10-10 00:22:06 +08:00
|
|
|
CONFIG_VERSION_VARIABLE=y
|
2018-02-10 06:50:57 +08:00
|
|
|
CONFIG_BOOTCOUNT_LIMIT=y
|
2020-02-03 14:43:57 +08:00
|
|
|
CONFIG_DM_BOOTCOUNT=y
|
|
|
|
CONFIG_BOOTCOUNT_MEM=y
|
2021-11-14 07:10:40 +08:00
|
|
|
CONFIG_SYS_BR0_PRELIM_BOOL=y
|
|
|
|
CONFIG_SYS_BR0_PRELIM=0xF0001001
|
|
|
|
CONFIG_SYS_OR0_PRELIM=0xF0000E55
|
|
|
|
CONFIG_SYS_BR1_PRELIM_BOOL=y
|
|
|
|
CONFIG_SYS_BR1_PRELIM=0xE8000801
|
|
|
|
CONFIG_SYS_OR1_PRELIM=0xF8000E25
|
|
|
|
CONFIG_SYS_BR2_PRELIM_BOOL=y
|
|
|
|
CONFIG_SYS_BR2_PRELIM=0xA0000801
|
|
|
|
CONFIG_SYS_OR2_PRELIM=0xF0000C25
|
|
|
|
CONFIG_SYS_BR3_PRELIM_BOOL=y
|
|
|
|
CONFIG_SYS_BR3_PRELIM=0xB0001001
|
|
|
|
CONFIG_SYS_OR3_PRELIM=0xF0000040
|
2021-08-19 11:12:24 +08:00
|
|
|
CONFIG_SYS_I2C_LEGACY=y
|
2021-08-19 11:12:35 +08:00
|
|
|
CONFIG_SYS_I2C_FSL=y
|
|
|
|
CONFIG_SYS_FSL_I2C_OFFSET=0x3000
|
|
|
|
CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
|
|
|
|
CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
|
|
|
|
CONFIG_SYS_I2C_SLAVE=0x7F
|
|
|
|
CONFIG_SYS_I2C_SPEED=200000
|
2017-03-14 01:48:42 +08:00
|
|
|
# CONFIG_MMC is not set
|
2019-10-04 01:50:05 +08:00
|
|
|
CONFIG_MTD=y
|
2017-02-11 21:43:54 +08:00
|
|
|
CONFIG_MTD_NOR_FLASH=y
|
2018-10-15 04:10:50 +08:00
|
|
|
CONFIG_FLASH_CFI_DRIVER=y
|
|
|
|
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
|
|
|
CONFIG_FLASH_CFI_MTD=y
|
|
|
|
CONFIG_SYS_FLASH_PROTECTION=y
|
|
|
|
CONFIG_SYS_FLASH_CFI=y
|
2020-02-03 14:43:57 +08:00
|
|
|
CONFIG_DM_ETH_PHY=y
|
|
|
|
CONFIG_QE_UEC=y
|
2016-10-27 05:15:37 +08:00
|
|
|
# CONFIG_PCI is not set
|
2020-02-03 14:43:57 +08:00
|
|
|
# CONFIG_PINCTRL_FULL is not set
|
2019-05-12 19:59:12 +08:00
|
|
|
CONFIG_QE=y
|
2015-11-19 21:48:14 +08:00
|
|
|
CONFIG_SYS_NS16550=y
|