2017-05-05 18:12:29 +08:00
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CONFIG_ARM=y
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2022-04-13 17:47:20 +08:00
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CONFIG_COUNTER_FREQUENCY=25000000
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2020-05-08 21:08:39 +08:00
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CONFIG_GIC_V3_ITS=y
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2017-05-05 18:12:29 +08:00
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CONFIG_TARGET_LS2080AQDS=y
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2022-10-21 08:22:39 +08:00
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CONFIG_TEXT_BASE=0x80400000
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2021-11-01 20:19:22 +08:00
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CONFIG_SYS_MALLOC_LEN=0x0220000
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2022-04-08 00:33:23 +08:00
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CONFIG_SYS_MALLOC_F_LEN=0x400
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2017-05-05 18:12:29 +08:00
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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2020-08-11 03:31:07 +08:00
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CONFIG_NR_DRAM_BANKS=3
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2023-02-17 22:58:06 +08:00
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
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2020-01-23 02:38:00 +08:00
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CONFIG_ENV_SIZE=0x20000
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CONFIG_ENV_OFFSET=0x300000
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2021-06-28 22:17:29 +08:00
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CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
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2020-07-07 01:54:25 +08:00
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CONFIG_SPL_TEXT_BASE=0x1800a000
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2017-06-19 21:47:40 +08:00
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CONFIG_FSL_LS_PPA=y
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2021-08-09 02:20:09 +08:00
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CONFIG_SPL_MMC=y
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2021-08-09 02:20:12 +08:00
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CONFIG_SPL_SERIAL=y
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2021-07-11 11:14:31 +08:00
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CONFIG_SPL_DRIVERS_MISC=y
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2023-02-17 22:58:06 +08:00
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CONFIG_SPL_STACK=0x18009ff0
|
2018-04-08 08:27:54 +08:00
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CONFIG_SPL=y
|
2020-04-29 04:15:47 +08:00
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CONFIG_AHCI=y
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2022-07-08 02:12:07 +08:00
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|
CONFIG_FSL_USE_PCA9547_MUX=y
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CONFIG_FSL_QIXIS=y
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2022-01-29 23:25:30 +08:00
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|
CONFIG_REMAKE_ELF=y
|
2022-10-29 08:27:07 +08:00
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|
CONFIG_SYS_MONITOR_LEN=1048576
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2022-01-25 05:08:41 +08:00
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|
CONFIG_MP=y
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2017-05-05 18:12:29 +08:00
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|
CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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|
CONFIG_OF_STDOUT_VIA_ALIAS=y
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2021-12-15 02:36:40 +08:00
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|
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
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2017-05-05 18:12:29 +08:00
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|
CONFIG_SD_BOOT=y
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|
|
CONFIG_BOOTDELAY=10
|
2017-08-15 01:22:17 +08:00
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|
CONFIG_USE_BOOTARGS=y
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|
|
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
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2021-11-10 22:11:40 +08:00
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|
CONFIG_BOOTCOMMAND="mmc read 0x80200000 0x6800 0x800; fsl_mc apply dpl 0x80200000 && mmc read $kernel_load $kernel_start $kernel_size && bootm $kernel_load"
|
2022-03-18 20:38:20 +08:00
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|
|
CONFIG_RESET_PHY_R=y
|
2022-05-17 05:20:26 +08:00
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|
|
CONFIG_SPL_MAX_SIZE=0x16000
|
2022-05-27 22:19:45 +08:00
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|
|
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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|
|
|
CONFIG_SPL_BSS_START_ADDR=0x80100000
|
2022-05-20 03:09:22 +08:00
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|
|
CONFIG_SPL_BSS_MAX_SIZE=0x100000
|
2022-05-27 01:13:21 +08:00
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|
|
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
2022-05-28 00:48:32 +08:00
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|
|
CONFIG_SYS_SPL_MALLOC=y
|
2017-05-05 18:12:29 +08:00
|
|
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|
|
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
|
2017-06-19 21:47:40 +08:00
|
|
|
CONFIG_SPL_ENV_SUPPORT=y
|
2021-07-11 11:14:36 +08:00
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|
|
CONFIG_SPL_I2C=y
|
2021-08-09 02:20:16 +08:00
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|
|
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
2022-05-28 05:13:52 +08:00
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|
|
CONFIG_SPL_TARGET="u-boot-with-spl.bin"
|
2022-05-12 04:21:06 +08:00
|
|
|
CONFIG_SYS_MAXARGS=64
|
2022-05-12 05:38:09 +08:00
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|
|
CONFIG_SYS_PBSIZE=532
|
2017-05-05 18:12:29 +08:00
|
|
|
CONFIG_CMD_GREPENV=y
|
2021-08-18 05:59:45 +08:00
|
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
2017-08-15 07:58:53 +08:00
|
|
|
CONFIG_CMD_I2C=y
|
2017-05-05 18:12:29 +08:00
|
|
|
CONFIG_CMD_MMC=y
|
2017-07-29 09:31:42 +08:00
|
|
|
CONFIG_CMD_NAND=y
|
2017-08-15 07:58:53 +08:00
|
|
|
CONFIG_CMD_PCI=y
|
2017-05-05 18:12:29 +08:00
|
|
|
CONFIG_CMD_USB=y
|
|
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
|
|
CONFIG_CMD_CACHE=y
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|
|
|
CONFIG_CMD_DATE=y
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|
|
CONFIG_OF_CONTROL=y
|
|
|
|
CONFIG_OF_EMBED=y
|
2020-07-03 19:48:56 +08:00
|
|
|
CONFIG_ENV_OVERWRITE=y
|
2017-08-28 19:16:32 +08:00
|
|
|
CONFIG_ENV_IS_IN_MMC=y
|
2019-11-13 11:46:36 +08:00
|
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
2022-03-11 22:12:07 +08:00
|
|
|
CONFIG_USE_ETHPRIME=y
|
|
|
|
CONFIG_ETHPRIME="DPMAC1@xgmii"
|
2017-05-05 18:12:29 +08:00
|
|
|
CONFIG_NET_RANDOM_ETHADDR=y
|
2022-01-31 22:49:33 +08:00
|
|
|
CONFIG_SATA=y
|
2019-01-30 19:17:44 +08:00
|
|
|
CONFIG_SATA_CEVA=y
|
2021-08-22 01:50:17 +08:00
|
|
|
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
|
2022-03-31 06:07:31 +08:00
|
|
|
CONFIG_DIMM_SLOTS_PER_CTLR=2
|
2022-08-01 09:08:22 +08:00
|
|
|
CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS=2
|
2021-08-22 01:50:18 +08:00
|
|
|
CONFIG_DDR_ECC=y
|
|
|
|
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
|
2022-07-24 01:05:12 +08:00
|
|
|
CONFIG_SYS_FSL_DDR_INTLV_256B=y
|
2021-08-19 11:12:24 +08:00
|
|
|
CONFIG_SYS_I2C_LEGACY=y
|
2021-08-19 11:12:25 +08:00
|
|
|
CONFIG_SYS_I2C_EARLY_INIT=y
|
2021-08-18 05:59:45 +08:00
|
|
|
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
|
2018-03-28 20:38:19 +08:00
|
|
|
CONFIG_FSL_ESDHC=y
|
2022-06-17 02:04:38 +08:00
|
|
|
CONFIG_ESDHC_DETECT_QUIRK=y
|
2019-12-05 06:18:38 +08:00
|
|
|
CONFIG_MTD=y
|
|
|
|
CONFIG_MTD_RAW_NAND=y
|
2021-09-23 02:50:37 +08:00
|
|
|
CONFIG_NAND_FSL_IFC=y
|
2021-09-23 02:50:34 +08:00
|
|
|
CONFIG_SYS_NAND_ONFI_DETECTION=y
|
2022-11-13 06:36:47 +08:00
|
|
|
CONFIG_SYS_NAND_MAX_OOBFREE=2
|
|
|
|
CONFIG_SYS_NAND_MAX_ECCPOS=256
|
2017-05-05 18:12:29 +08:00
|
|
|
CONFIG_DM_SPI_FLASH=y
|
2019-04-24 20:45:12 +08:00
|
|
|
# CONFIG_SPI_FLASH_BAR is not set
|
2021-12-12 03:55:51 +08:00
|
|
|
CONFIG_SPI_FLASH_SPANSION=y
|
2017-08-02 08:19:59 +08:00
|
|
|
CONFIG_PHYLIB=y
|
2020-04-25 03:35:53 +08:00
|
|
|
CONFIG_PHYLIB_10G=y
|
|
|
|
CONFIG_PHY_REALTEK=y
|
|
|
|
CONFIG_PHY_TERANETICS=y
|
|
|
|
CONFIG_PHY_VITESSE=y
|
2022-07-24 01:05:10 +08:00
|
|
|
CONFIG_FSL_MEMAC=y
|
|
|
|
CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
|
2017-08-08 10:00:34 +08:00
|
|
|
CONFIG_PHY_GIGE=y
|
2017-05-05 18:12:29 +08:00
|
|
|
CONFIG_E1000=y
|
2018-07-21 12:03:57 +08:00
|
|
|
CONFIG_MII=y
|
2022-01-23 03:38:11 +08:00
|
|
|
CONFIG_NVME_PCI=y
|
2017-05-05 18:12:29 +08:00
|
|
|
CONFIG_PCI=y
|
|
|
|
CONFIG_DM_PCI_COMPAT=y
|
2020-07-09 23:31:42 +08:00
|
|
|
CONFIG_PCIE_LAYERSCAPE_RC=y
|
2021-12-12 03:55:51 +08:00
|
|
|
CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
|
2022-11-20 07:45:31 +08:00
|
|
|
CONFIG_RTC_DS3231=y
|
2019-01-30 19:17:44 +08:00
|
|
|
CONFIG_DM_SCSI=y
|
2022-12-04 22:39:03 +08:00
|
|
|
CONFIG_SYS_NS16550_SERIAL=y
|
2018-04-16 01:51:26 +08:00
|
|
|
CONFIG_SPI=y
|
2017-05-05 18:12:29 +08:00
|
|
|
CONFIG_DM_SPI=y
|
|
|
|
CONFIG_FSL_QSPI=y
|
|
|
|
CONFIG_USB=y
|
|
|
|
CONFIG_USB_XHCI_HCD=y
|
|
|
|
CONFIG_USB_XHCI_DWC3=y
|