2002-09-19 04:04:01 +08:00
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/*
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* (C) Copyright 2001
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* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
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*
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2013-07-08 15:37:19 +08:00
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* SPDX-License-Identifier: GPL-2.0+
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2002-09-19 04:04:01 +08:00
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*/
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/*
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* MII Utilities
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*/
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#include <common.h>
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#include <command.h>
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2004-04-19 07:32:11 +08:00
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#include <miiphy.h>
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2004-04-19 06:57:51 +08:00
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typedef struct _MII_reg_desc_t {
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ushort regno;
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char * name;
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} MII_reg_desc_t;
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2010-10-20 13:06:48 +08:00
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static const MII_reg_desc_t reg_0_5_desc_tbl[] = {
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2010-12-24 04:40:12 +08:00
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{ MII_BMCR, "PHY control register" },
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{ MII_BMSR, "PHY status register" },
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{ MII_PHYSID1, "PHY ID 1 register" },
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{ MII_PHYSID2, "PHY ID 2 register" },
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{ MII_ADVERTISE, "Autonegotiation advertisement register" },
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{ MII_LPA, "Autonegotiation partner abilities register" },
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2004-04-19 06:57:51 +08:00
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};
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typedef struct _MII_field_desc_t {
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ushort hi;
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ushort lo;
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ushort mask;
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char * name;
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} MII_field_desc_t;
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2010-10-20 13:06:48 +08:00
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static const MII_field_desc_t reg_0_desc_tbl[] = {
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2004-04-19 06:57:51 +08:00
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{ 15, 15, 0x01, "reset" },
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{ 14, 14, 0x01, "loopback" },
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{ 13, 6, 0x81, "speed selection" }, /* special */
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{ 12, 12, 0x01, "A/N enable" },
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{ 11, 11, 0x01, "power-down" },
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{ 10, 10, 0x01, "isolate" },
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{ 9, 9, 0x01, "restart A/N" },
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{ 8, 8, 0x01, "duplex" }, /* special */
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{ 7, 7, 0x01, "collision test enable" },
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{ 5, 0, 0x3f, "(reserved)" }
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};
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2010-10-20 13:06:48 +08:00
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static const MII_field_desc_t reg_1_desc_tbl[] = {
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2004-04-19 06:57:51 +08:00
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{ 15, 15, 0x01, "100BASE-T4 able" },
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{ 14, 14, 0x01, "100BASE-X full duplex able" },
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{ 13, 13, 0x01, "100BASE-X half duplex able" },
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{ 12, 12, 0x01, "10 Mbps full duplex able" },
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{ 11, 11, 0x01, "10 Mbps half duplex able" },
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{ 10, 10, 0x01, "100BASE-T2 full duplex able" },
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{ 9, 9, 0x01, "100BASE-T2 half duplex able" },
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{ 8, 8, 0x01, "extended status" },
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{ 7, 7, 0x01, "(reserved)" },
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{ 6, 6, 0x01, "MF preamble suppression" },
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{ 5, 5, 0x01, "A/N complete" },
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{ 4, 4, 0x01, "remote fault" },
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{ 3, 3, 0x01, "A/N able" },
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{ 2, 2, 0x01, "link status" },
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{ 1, 1, 0x01, "jabber detect" },
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{ 0, 0, 0x01, "extended capabilities" },
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};
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2010-10-20 13:06:48 +08:00
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static const MII_field_desc_t reg_2_desc_tbl[] = {
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2004-04-19 06:57:51 +08:00
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{ 15, 0, 0xffff, "OUI portion" },
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};
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2010-10-20 13:06:48 +08:00
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static const MII_field_desc_t reg_3_desc_tbl[] = {
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2004-04-19 06:57:51 +08:00
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{ 15, 10, 0x3f, "OUI portion" },
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{ 9, 4, 0x3f, "manufacturer part number" },
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{ 3, 0, 0x0f, "manufacturer rev. number" },
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};
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2010-10-20 13:06:48 +08:00
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static const MII_field_desc_t reg_4_desc_tbl[] = {
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2004-04-19 06:57:51 +08:00
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{ 15, 15, 0x01, "next page able" },
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2013-08-08 19:44:41 +08:00
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{ 14, 14, 0x01, "(reserved)" },
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2004-04-19 06:57:51 +08:00
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{ 13, 13, 0x01, "remote fault" },
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2013-08-08 19:44:41 +08:00
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{ 12, 12, 0x01, "(reserved)" },
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2004-04-19 06:57:51 +08:00
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{ 11, 11, 0x01, "asymmetric pause" },
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{ 10, 10, 0x01, "pause enable" },
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{ 9, 9, 0x01, "100BASE-T4 able" },
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{ 8, 8, 0x01, "100BASE-TX full duplex able" },
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{ 7, 7, 0x01, "100BASE-TX able" },
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{ 6, 6, 0x01, "10BASE-T full duplex able" },
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{ 5, 5, 0x01, "10BASE-T able" },
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{ 4, 0, 0x1f, "xxx to do" },
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};
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2010-10-20 13:06:48 +08:00
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static const MII_field_desc_t reg_5_desc_tbl[] = {
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2004-04-19 06:57:51 +08:00
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{ 15, 15, 0x01, "next page able" },
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{ 14, 14, 0x01, "acknowledge" },
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{ 13, 13, 0x01, "remote fault" },
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{ 12, 12, 0x01, "(reserved)" },
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{ 11, 11, 0x01, "asymmetric pause able" },
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{ 10, 10, 0x01, "pause able" },
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{ 9, 9, 0x01, "100BASE-T4 able" },
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{ 8, 8, 0x01, "100BASE-X full duplex able" },
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{ 7, 7, 0x01, "100BASE-TX able" },
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{ 6, 6, 0x01, "10BASE-T full duplex able" },
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{ 5, 5, 0x01, "10BASE-T able" },
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{ 4, 0, 0x1f, "xxx to do" },
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};
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typedef struct _MII_field_desc_and_len_t {
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2010-10-20 13:06:48 +08:00
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const MII_field_desc_t *pdesc;
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2004-04-19 06:57:51 +08:00
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ushort len;
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} MII_field_desc_and_len_t;
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2010-10-20 13:06:48 +08:00
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static const MII_field_desc_and_len_t desc_and_len_tbl[] = {
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{ reg_0_desc_tbl, ARRAY_SIZE(reg_0_desc_tbl) },
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{ reg_1_desc_tbl, ARRAY_SIZE(reg_1_desc_tbl) },
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{ reg_2_desc_tbl, ARRAY_SIZE(reg_2_desc_tbl) },
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{ reg_3_desc_tbl, ARRAY_SIZE(reg_3_desc_tbl) },
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{ reg_4_desc_tbl, ARRAY_SIZE(reg_4_desc_tbl) },
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{ reg_5_desc_tbl, ARRAY_SIZE(reg_5_desc_tbl) },
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2004-04-19 06:57:51 +08:00
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};
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static void dump_reg(
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ushort regval,
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2010-10-20 13:06:48 +08:00
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const MII_reg_desc_t *prd,
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const MII_field_desc_and_len_t *pdl);
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2004-04-19 06:57:51 +08:00
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static int special_field(
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ushort regno,
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2010-10-20 13:06:48 +08:00
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const MII_field_desc_t *pdesc,
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2004-04-19 06:57:51 +08:00
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ushort regval);
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2010-10-20 13:06:48 +08:00
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static void MII_dump_0_to_5(
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2004-04-19 06:57:51 +08:00
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ushort regvals[6],
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uchar reglo,
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uchar reghi)
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{
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ulong i;
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for (i = 0; i < 6; i++) {
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if ((reglo <= i) && (i <= reghi))
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dump_reg(regvals[i], ®_0_5_desc_tbl[i],
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&desc_and_len_tbl[i]);
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}
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}
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static void dump_reg(
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ushort regval,
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2010-10-20 13:06:48 +08:00
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const MII_reg_desc_t *prd,
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const MII_field_desc_and_len_t *pdl)
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2004-04-19 06:57:51 +08:00
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{
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ulong i;
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ushort mask_in_place;
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2010-10-20 13:06:48 +08:00
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const MII_field_desc_t *pdesc;
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2004-04-19 06:57:51 +08:00
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printf("%u. (%04hx) -- %s --\n",
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prd->regno, regval, prd->name);
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for (i = 0; i < pdl->len; i++) {
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pdesc = &pdl->pdesc[i];
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mask_in_place = pdesc->mask << pdesc->lo;
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printf(" (%04hx:%04hx) %u.",
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mask_in_place,
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regval & mask_in_place,
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prd->regno);
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if (special_field(prd->regno, pdesc, regval)) {
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}
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else {
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if (pdesc->hi == pdesc->lo)
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printf("%2u ", pdesc->lo);
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else
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printf("%2u-%2u", pdesc->hi, pdesc->lo);
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printf(" = %5u %s",
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(regval & mask_in_place) >> pdesc->lo,
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pdesc->name);
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}
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printf("\n");
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}
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printf("\n");
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}
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/* Special fields:
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** 0.6,13
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** 0.8
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** 2.15-0
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** 3.15-0
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** 4.4-0
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** 5.4-0
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*/
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static int special_field(
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ushort regno,
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2010-10-20 13:06:48 +08:00
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const MII_field_desc_t *pdesc,
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2004-04-19 06:57:51 +08:00
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ushort regval)
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{
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2010-12-24 04:40:12 +08:00
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if ((regno == MII_BMCR) && (pdesc->lo == 6)) {
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ushort speed_bits = regval & (BMCR_SPEED1000 | BMCR_SPEED100);
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2004-04-19 06:57:51 +08:00
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printf("%2u,%2u = b%u%u speed selection = %s Mbps",
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6, 13,
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(regval >> 6) & 1,
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(regval >> 13) & 1,
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2010-12-24 04:40:12 +08:00
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speed_bits == BMCR_SPEED1000 ? "1000" :
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speed_bits == BMCR_SPEED100 ? "100" :
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"10");
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2004-04-19 06:57:51 +08:00
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return 1;
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}
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2010-12-24 04:40:12 +08:00
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else if ((regno == MII_BMCR) && (pdesc->lo == 8)) {
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2004-04-19 06:57:51 +08:00
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printf("%2u = %5u duplex = %s",
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pdesc->lo,
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(regval >> pdesc->lo) & 1,
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((regval >> pdesc->lo) & 1) ? "full" : "half");
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return 1;
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}
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2010-12-24 04:40:12 +08:00
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else if ((regno == MII_ADVERTISE) && (pdesc->lo == 0)) {
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2004-04-19 06:57:51 +08:00
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ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
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printf("%2u-%2u = %5u selector = %s",
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pdesc->hi, pdesc->lo, sel_bits,
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2004-04-25 21:18:40 +08:00
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sel_bits == PHY_ANLPAR_PSB_802_3 ?
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2004-04-19 06:57:51 +08:00
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"IEEE 802.3" :
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2004-04-25 21:18:40 +08:00
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sel_bits == PHY_ANLPAR_PSB_802_9 ?
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2004-04-19 06:57:51 +08:00
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"IEEE 802.9 ISLAN-16T" :
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"???");
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return 1;
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}
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2010-12-24 04:40:12 +08:00
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else if ((regno == MII_LPA) && (pdesc->lo == 0)) {
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2004-04-19 06:57:51 +08:00
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ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
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printf("%2u-%2u = %u selector = %s",
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pdesc->hi, pdesc->lo, sel_bits,
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2004-04-25 21:18:40 +08:00
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sel_bits == PHY_ANLPAR_PSB_802_3 ?
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2004-04-19 06:57:51 +08:00
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"IEEE 802.3" :
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2004-04-25 21:18:40 +08:00
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sel_bits == PHY_ANLPAR_PSB_802_9 ?
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2004-04-19 06:57:51 +08:00
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"IEEE 802.9 ISLAN-16T" :
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"???");
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return 1;
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}
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return 0;
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}
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2010-10-20 13:06:48 +08:00
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static char last_op[2];
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static uint last_data;
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static uint last_addr_lo;
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static uint last_addr_hi;
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static uint last_reg_lo;
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static uint last_reg_hi;
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2004-04-19 06:57:51 +08:00
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static void extract_range(
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char * input,
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unsigned char * plo,
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unsigned char * phi)
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{
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char * end;
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*plo = simple_strtoul(input, &end, 16);
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if (*end == '-') {
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end++;
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*phi = simple_strtoul(end, NULL, 16);
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}
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else {
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*phi = *plo;
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}
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}
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2004-04-24 04:32:05 +08:00
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/* ---------------------------------------------------------------- */
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2010-10-20 13:06:48 +08:00
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static int do_mii(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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2004-04-19 06:57:51 +08:00
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{
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2005-10-29 04:30:33 +08:00
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char op[2];
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2004-04-19 06:57:51 +08:00
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unsigned char addrlo, addrhi, reglo, reghi;
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2005-09-25 03:54:50 +08:00
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unsigned char addr, reg;
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2004-04-19 06:57:51 +08:00
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unsigned short data;
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int rcode = 0;
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2010-07-28 06:35:08 +08:00
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const char *devname;
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2004-04-19 06:57:51 +08:00
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2010-07-17 07:06:04 +08:00
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if (argc < 2)
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2011-12-10 16:44:01 +08:00
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return CMD_RET_USAGE;
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2007-12-27 14:39:54 +08:00
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2008-03-30 14:22:13 +08:00
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#if defined(CONFIG_MII_INIT)
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2004-04-19 06:57:51 +08:00
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mii_init ();
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#endif
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/*
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* We use the last specified parameters, unless new ones are
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* entered.
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*/
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2005-10-29 04:30:33 +08:00
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op[0] = last_op[0];
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op[1] = last_op[1];
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2004-04-19 06:57:51 +08:00
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addrlo = last_addr_lo;
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addrhi = last_addr_hi;
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reglo = last_reg_lo;
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reghi = last_reg_hi;
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data = last_data;
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if ((flag & CMD_FLAG_REPEAT) == 0) {
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2005-10-29 04:30:33 +08:00
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op[0] = argv[1][0];
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if (strlen(argv[1]) > 1)
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op[1] = argv[1][1];
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|
|
else
|
|
|
|
op[1] = '\0';
|
|
|
|
|
2004-04-19 06:57:51 +08:00
|
|
|
if (argc >= 3)
|
|
|
|
extract_range(argv[2], &addrlo, &addrhi);
|
|
|
|
if (argc >= 4)
|
|
|
|
extract_range(argv[3], ®lo, ®hi);
|
|
|
|
if (argc >= 5)
|
|
|
|
data = simple_strtoul (argv[4], NULL, 16);
|
|
|
|
}
|
|
|
|
|
2005-10-29 04:30:33 +08:00
|
|
|
/* use current device */
|
|
|
|
devname = miiphy_get_current_dev();
|
|
|
|
|
2004-04-19 06:57:51 +08:00
|
|
|
/*
|
|
|
|
* check info/read/write.
|
|
|
|
*/
|
2005-10-29 04:30:33 +08:00
|
|
|
if (op[0] == 'i') {
|
2004-04-19 06:57:51 +08:00
|
|
|
unsigned char j, start, end;
|
|
|
|
unsigned int oui;
|
|
|
|
unsigned char model;
|
|
|
|
unsigned char rev;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Look for any and all PHYs. Valid addresses are 0..31.
|
|
|
|
*/
|
|
|
|
if (argc >= 3) {
|
2005-09-25 03:54:50 +08:00
|
|
|
start = addrlo; end = addrhi;
|
2004-04-19 06:57:51 +08:00
|
|
|
} else {
|
2005-09-25 03:54:50 +08:00
|
|
|
start = 0; end = 31;
|
2004-04-19 06:57:51 +08:00
|
|
|
}
|
|
|
|
|
2005-09-25 03:54:50 +08:00
|
|
|
for (j = start; j <= end; j++) {
|
2005-10-29 04:30:33 +08:00
|
|
|
if (miiphy_info (devname, j, &oui, &model, &rev) == 0) {
|
2004-04-19 06:57:51 +08:00
|
|
|
printf("PHY 0x%02X: "
|
|
|
|
"OUI = 0x%04X, "
|
|
|
|
"Model = 0x%02X, "
|
|
|
|
"Rev = 0x%02X, "
|
2007-11-01 21:46:50 +08:00
|
|
|
"%3dbase%s, %s\n",
|
2004-04-19 06:57:51 +08:00
|
|
|
j, oui, model, rev,
|
2005-10-29 04:30:33 +08:00
|
|
|
miiphy_speed (devname, j),
|
2007-11-01 21:46:50 +08:00
|
|
|
miiphy_is_1000base_x (devname, j)
|
|
|
|
? "X" : "T",
|
2005-10-29 04:30:33 +08:00
|
|
|
(miiphy_duplex (devname, j) == FULL)
|
|
|
|
? "FDX" : "HDX");
|
2004-04-19 06:57:51 +08:00
|
|
|
}
|
|
|
|
}
|
2005-10-29 04:30:33 +08:00
|
|
|
} else if (op[0] == 'r') {
|
2004-04-19 06:57:51 +08:00
|
|
|
for (addr = addrlo; addr <= addrhi; addr++) {
|
|
|
|
for (reg = reglo; reg <= reghi; reg++) {
|
|
|
|
data = 0xffff;
|
2005-10-29 04:30:33 +08:00
|
|
|
if (miiphy_read (devname, addr, reg, &data) != 0) {
|
2004-04-19 06:57:51 +08:00
|
|
|
printf(
|
|
|
|
"Error reading from the PHY addr=%02x reg=%02x\n",
|
|
|
|
addr, reg);
|
|
|
|
rcode = 1;
|
2005-09-25 03:54:50 +08:00
|
|
|
} else {
|
2004-04-19 06:57:51 +08:00
|
|
|
if ((addrlo != addrhi) || (reglo != reghi))
|
|
|
|
printf("addr=%02x reg=%02x data=",
|
|
|
|
(uint)addr, (uint)reg);
|
|
|
|
printf("%04X\n", data & 0x0000FFFF);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if ((addrlo != addrhi) && (reglo != reghi))
|
|
|
|
printf("\n");
|
|
|
|
}
|
2005-10-29 04:30:33 +08:00
|
|
|
} else if (op[0] == 'w') {
|
2004-04-19 06:57:51 +08:00
|
|
|
for (addr = addrlo; addr <= addrhi; addr++) {
|
|
|
|
for (reg = reglo; reg <= reghi; reg++) {
|
2005-10-29 04:30:33 +08:00
|
|
|
if (miiphy_write (devname, addr, reg, data) != 0) {
|
2004-04-19 06:57:51 +08:00
|
|
|
printf("Error writing to the PHY addr=%02x reg=%02x\n",
|
|
|
|
addr, reg);
|
|
|
|
rcode = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2005-10-29 04:30:33 +08:00
|
|
|
} else if (strncmp(op, "du", 2) == 0) {
|
2004-04-19 06:57:51 +08:00
|
|
|
ushort regs[6];
|
|
|
|
int ok = 1;
|
|
|
|
if ((reglo > 5) || (reghi > 5)) {
|
|
|
|
printf(
|
|
|
|
"The MII dump command only formats the "
|
|
|
|
"standard MII registers, 0-5.\n");
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
for (addr = addrlo; addr <= addrhi; addr++) {
|
2005-10-29 04:30:33 +08:00
|
|
|
for (reg = reglo; reg < reghi + 1; reg++) {
|
|
|
|
if (miiphy_read(devname, addr, reg, ®s[reg]) != 0) {
|
2004-04-19 06:57:51 +08:00
|
|
|
ok = 0;
|
|
|
|
printf(
|
|
|
|
"Error reading from the PHY addr=%02x reg=%02x\n",
|
|
|
|
addr, reg);
|
|
|
|
rcode = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (ok)
|
|
|
|
MII_dump_0_to_5(regs, reglo, reghi);
|
|
|
|
printf("\n");
|
|
|
|
}
|
2005-10-29 04:30:33 +08:00
|
|
|
} else if (strncmp(op, "de", 2) == 0) {
|
|
|
|
if (argc == 2)
|
|
|
|
miiphy_listdev ();
|
|
|
|
else
|
|
|
|
miiphy_set_current_dev (argv[2]);
|
2004-04-19 06:57:51 +08:00
|
|
|
} else {
|
2011-12-10 16:44:01 +08:00
|
|
|
return CMD_RET_USAGE;
|
2004-04-19 06:57:51 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Save the parameters for repeats.
|
|
|
|
*/
|
2005-10-29 04:30:33 +08:00
|
|
|
last_op[0] = op[0];
|
|
|
|
last_op[1] = op[1];
|
2004-04-19 06:57:51 +08:00
|
|
|
last_addr_lo = addrlo;
|
|
|
|
last_addr_hi = addrhi;
|
|
|
|
last_reg_lo = reglo;
|
|
|
|
last_reg_hi = reghi;
|
|
|
|
last_data = data;
|
|
|
|
|
|
|
|
return rcode;
|
|
|
|
}
|
|
|
|
|
|
|
|
/***************************************************/
|
|
|
|
|
|
|
|
U_BOOT_CMD(
|
|
|
|
mii, 5, 1, do_mii,
|
2009-01-28 08:03:12 +08:00
|
|
|
"MII utility commands",
|
2005-10-29 04:30:33 +08:00
|
|
|
"device - list available devices\n"
|
|
|
|
"mii device <devname> - set current device\n"
|
|
|
|
"mii info <addr> - display MII PHY info\n"
|
|
|
|
"mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
|
|
|
|
"mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
|
|
|
|
"mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n"
|
2009-05-24 23:06:54 +08:00
|
|
|
"Addr and/or reg may be ranges, e.g. 2-7."
|
2004-04-19 06:57:51 +08:00
|
|
|
);
|