u-boot/include/configs/am64x_evm.h

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Configuration header file for K3 AM642 SoC family
*
* Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
* Keerthy <j-keerthy@ti.com>
*/
#ifndef __CONFIG_AM642_EVM_H
#define __CONFIG_AM642_EVM_H
#include <linux/sizes.h>
#include <config_distro_bootcmd.h>
#include <environment/ti/mmc.h>
configs: am64x_evm_*_defconfig: Rearrange the components in SRAM to satisfy the limitations for USB DFU boot mode For USB DFU boot mode there is a limitation on the load address of boot images that they have to be less than 0x70001000. Therefore, move the SPL_TEXT_BASE address to 0x70000000. Currently ATF is being loaded at 0x70000000, if the SPL is being loaded at 0x70000000 then ATF would overwrite SPL image when loaded. Therefore, move the location of ATF to a latter location in SRAM, past the SPL image. Also rearrange the EEPROM and BSS data on top of ATF. Given below is the placement of various data sections in SRAM ┌──────────────────────────────────────┐0x70000000 │ │ │ │ │ │ │ SPL IMAGE (Max size 1.5 MB) │ │ │ │ │ │ │ ├──────────────────────────────────────┤0x7017FFFF │ │ │ SPL STACK │ │ │ ├──────────────────────────────────────┤0x70192727 │ GLOBAL DATA(216 B) │ ├──────────────────────────────────────┤0x701927FF │ │ │ INITIAL HEAP (32 KB) │ │ │ ├──────────────────────────────────────┤0x7019A7FF │ │ │ BSS (20 KB) │ ├──────────────────────────────────────┤0x7019F7FF │ EEPROM DATA (2 KB) │ ├──────────────────────────────────────┤0x7019FFFF │ │ │ │ │ ATF (123 KB) │ │ │ │ │ ├──────────────────────────────────────┤0x701BEBFB │ BOOT PARAMETER INDEX TABLE (5124 B)│ ├──────────────────────────────────────┤0x701BFFFF │ │ │SYSFW FIREWALLED DUE TO A BUG (128 KB)│ │ │ ├──────────────────────────────────────┤0x701DFFFF │ │ │ DMSC CODE AREA (128 KB) │ │ │ └──────────────────────────────────────┘0x701FFFFF Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-9-a-govindraju@ti.com
2021-06-05 00:30:38 +08:00
#include <asm/arch/am64_hardware.h>
#include <environment/ti/k3_dfu.h>
/* DDR Configuration */
#define CONFIG_SYS_SDRAM_BASE1 0x880000000
#ifdef CONFIG_SYS_K3_SPL_ATF
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin"
#endif
#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
#if defined(CONFIG_TARGET_AM642_A53_EVM)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \
CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE - 4)
#else
/*
* Maximum size in memory allocated to the SPL BSS. Keep it as tight as
* possible (to allow the build to go through), as this directly affects
* our memory footprint. The less we use for BSS the more we have available
* for everything else.
*/
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000
/*
* Link BSS to be within SPL in a dedicated region located near the top of
* the MCU SRAM, this way making it available also before relocation. Note
* that we are not using the actual top of the MCU SRAM as there is a memory
* location filled in by the boot ROM that we want to read out without any
* interference from the C context.
*/
configs: am64x_evm_*_defconfig: Rearrange the components in SRAM to satisfy the limitations for USB DFU boot mode For USB DFU boot mode there is a limitation on the load address of boot images that they have to be less than 0x70001000. Therefore, move the SPL_TEXT_BASE address to 0x70000000. Currently ATF is being loaded at 0x70000000, if the SPL is being loaded at 0x70000000 then ATF would overwrite SPL image when loaded. Therefore, move the location of ATF to a latter location in SRAM, past the SPL image. Also rearrange the EEPROM and BSS data on top of ATF. Given below is the placement of various data sections in SRAM ┌──────────────────────────────────────┐0x70000000 │ │ │ │ │ │ │ SPL IMAGE (Max size 1.5 MB) │ │ │ │ │ │ │ ├──────────────────────────────────────┤0x7017FFFF │ │ │ SPL STACK │ │ │ ├──────────────────────────────────────┤0x70192727 │ GLOBAL DATA(216 B) │ ├──────────────────────────────────────┤0x701927FF │ │ │ INITIAL HEAP (32 KB) │ │ │ ├──────────────────────────────────────┤0x7019A7FF │ │ │ BSS (20 KB) │ ├──────────────────────────────────────┤0x7019F7FF │ EEPROM DATA (2 KB) │ ├──────────────────────────────────────┤0x7019FFFF │ │ │ │ │ ATF (123 KB) │ │ │ │ │ ├──────────────────────────────────────┤0x701BEBFB │ BOOT PARAMETER INDEX TABLE (5124 B)│ ├──────────────────────────────────────┤0x701BFFFF │ │ │SYSFW FIREWALLED DUE TO A BUG (128 KB)│ │ │ ├──────────────────────────────────────┤0x701DFFFF │ │ │ DMSC CODE AREA (128 KB) │ │ │ └──────────────────────────────────────┘0x701FFFFF Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-9-a-govindraju@ti.com
2021-06-05 00:30:38 +08:00
#define CONFIG_SPL_BSS_START_ADDR (TI_SRAM_SCRATCH_BOARD_EEPROM_START -\
CONFIG_SPL_BSS_MAX_SIZE)
/* Set the stack right below the SPL BSS section */
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR
/* Configure R5 SPL post-relocation malloc pool in DDR */
#define CONFIG_SYS_SPL_MALLOC_START 0x84000000
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
#endif
#define PARTS_DEFAULT \
/* Linux partitions */ \
"name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
/* U-Boot general configuration */
#define EXTRA_ENV_AM642_BOARD_SETTINGS \
"findfdt=" \
"if test $board_name = am64x_gpevm; then " \
"setenv fdtfile k3-am642-evm.dtb; fi; " \
"if test $board_name = am64x_skevm; then " \
"setenv fdtfile k3-am642-sk.dtb; fi;" \
"if test $fdtfile = undefined; then " \
"echo WARNING: Could not determine device tree to use; fi; \0" \
"name_kern=Image\0" \
"console=ttyS2,115200n8\0" \
"args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 " \
"${mtdparts}\0" \
"run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
/* U-Boot MMC-specific configuration */
#define EXTRA_ENV_AM642_BOARD_SETTINGS_MMC \
"boot=mmc\0" \
"mmcdev=1\0" \
"bootpart=1:2\0" \
"bootdir=/boot\0" \
"rd_spec=-\0" \
"init_mmc=run args_all args_mmc\0" \
"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
"get_overlay_mmc=" \
"fdt address ${fdtaddr};" \
"fdt resize 0x100000;" \
"for overlay in $name_overlays;" \
"do;" \
"load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \
"fdt apply ${dtboaddr};" \
"done;\0" \
"get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
"${bootdir}/${name_kern}\0" \
"get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
"${bootdir}/${name_fit}\0" \
"partitions=" PARTS_DEFAULT
#define EXTRA_ENV_AM642_BOARD_SETTING_USBMSC \
"args_usb=run finduuid;setenv bootargs console=${console} " \
"${optargs} " \
"root=PARTUUID=${uuid} rw " \
"rootfstype=${mmcrootfstype}\0" \
"init_usb=run args_all args_usb\0" \
"get_fdt_usb=load usb ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
"get_overlay_usb=" \
"fdt address ${fdtaddr};" \
"fdt resize 0x100000;" \
"for overlay in $name_overlays;" \
"do;" \
"load usb ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \
"fdt apply ${dtboaddr};" \
"done;\0" \
"get_kern_usb=load usb ${bootpart} ${loadaddr} " \
"${bootdir}/${name_kern}\0" \
"get_fit_usb=load usb ${bootpart} ${addr_fit} " \
"${bootdir}/${name_fit}\0" \
"usbboot=setenv boot usb;" \
"setenv bootpart 0:2;" \
"usb start;" \
"run findfdt;" \
"run init_usb;" \
"run get_kern_usb;" \
"run get_fdt_usb;" \
"run run_kern\0"
#define EXTRA_ENV_DFUARGS \
DFU_ALT_INFO_MMC \
DFU_ALT_INFO_EMMC \
DFU_ALT_INFO_RAM \
DFU_ALT_INFO_OSPI
/* Incorporate settings into the U-Boot environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
DEFAULT_MMC_TI_ARGS \
EXTRA_ENV_AM642_BOARD_SETTINGS \
EXTRA_ENV_AM642_BOARD_SETTINGS_MMC \
EXTRA_ENV_DFUARGS \
EXTRA_ENV_AM642_BOARD_SETTING_USBMSC
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
#endif /* __CONFIG_AM642_EVM_H */