u-boot/tools/rksd.c

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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2015 Google, Inc
* Written by Simon Glass <sjg@chromium.org>
*
* See README.rockchip for details of the rksd format
*/
#include "imagetool.h"
#include <image.h>
#include <rc4.h>
#include "mkimage.h"
#include "rkcommon.h"
static void rksd_set_header(void *buf, struct stat *sbuf, int ifd,
struct image_tool_params *params)
{
unsigned int size;
int ret;
/*
* We need to calculate this using 'RK_SPL_HDR_START' and not using
* 'tparams->header_size', as the additional byte inserted when
* 'is_boot0' is true counts towards the payload (and not towards the
* header).
*/
size = params->file_size - RK_SPL_HDR_START;
ret = rkcommon_set_header(buf, size, params);
if (ret) {
/* TODO(sjg@chromium.org): This method should return an error */
printf("Warning: SPL image is too large (size %#x) and will "
"not boot\n", size);
}
}
static int rksd_check_image_type(uint8_t type)
{
if (type == IH_TYPE_RKSD)
return EXIT_SUCCESS;
else
return EXIT_FAILURE;
}
static int rksd_vrec_header(struct image_tool_params *params,
struct image_type_params *tparams)
{
/*
* Pad to a 2KB alignment, as required for init_size by the ROM
* (see https://lists.denx.de/pipermail/u-boot/2017-May/293268.html)
*/
return rkcommon_vrec_header(params, tparams, RK_INIT_SIZE_ALIGN);
}
/*
* rk_sd parameters
*/
U_BOOT_IMAGE_TYPE(
rksd,
"Rockchip SD Boot Image support",
rockchip: mkimage: pad the header to 8-bytes (using a 'nop') for RK3399 The RK3399 boot code (running as AArch64) poses a bit of a challenge for SPL image generation: * The BootROM will start execution right after the 4-byte header (at the odd instruction word loaded into SRAM at 0xff8c2004, with the 'RK33' boot magic residing at 0xff8c2000). * The default padding (during ELF generation) for AArch64 is 0x0, which is an illegal instruction and the .text section needs to be naturally aligned (someone might locate a 64bit constant relative to the section start and unaligned loads trigger a fault for all privileged modes of an ARMv8)... so we can't simply define the CONFIG_SPL_TEXT_BASE option to the odd address (0xff8c2004). * Finally, we don't want to change the values used for padding of the SPL .text section for all ARMv8 targets to the instruction word encoding 'nop', as this would affect all padding in this section and might hide errors that would otherwise quickly trigger an illegal insn exception. To deal with this situation, we modify the rkimage generation to - understand the fact that the RK3399 needs to pad the header to an 8 byte boundary using an AArch64 'nop' - the necessary logic to adjust the header_size (which controls the location where the payload is copied into the image) and to insert this padding (AArch64 insn words are always little-endian) into the image following the 4-byte header magic. X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-03-15 19:08:43 +08:00
0,
NULL,
rkcommon_check_params,
rkcommon_verify_header,
rkcommon_print_header,
rksd_set_header,
NULL,
rksd_check_image_type,
NULL,
rksd_vrec_header
);