u-boot/board/qca/ap121/Kconfig

if TARGET_AP121

config SYS_VENDOR
	default "qca"

config SYS_BOARD
	default "ap121"

config SYS_CONFIG_NAME
	default "ap121"

config SYS_TEXT_BASE
	default 0x9f000000

config SYS_DCACHE_SIZE
	default 32768

config SYS_DCACHE_LINE_SIZE
	default 32

config SYS_ICACHE_SIZE
	default 65536

config SYS_ICACHE_LINE_SIZE
	default 32

endif
mips: ath79: add AP121 reference board This patch add board-level code and base DT for AP121. Signed-off-by: Wills Wang <wills.wang@live.com> [updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> 2016-03-16 16:59:59 +08:00			`if TARGET_AP121`

			`config SYS_VENDOR`
			`default "qca"`

			`config SYS_BOARD`
			`default "ap121"`

			`config SYS_CONFIG_NAME`
			`default "ap121"`

MIPS: Move CONFIG_SYS_TEXT_BASE to Kconfig Move CONFIG_SYS_TEXT_BASE to Kconfig, and add default values in board Kconfig files matching what was present in their config headers. This will make it cleaner to conditionalise the value for Malta based on 32 vs 64 bit builds. Signed-off-by: Paul Burton <paul.burton@imgtec.com> 2016-05-17 18:56:39 +08:00			`config SYS_TEXT_BASE`
			`default 0x9f000000`

MIPS: Move cache sizes to Kconfig Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton <paul.burton@imgtec.com> 2016-05-27 21:28:04 +08:00			`config SYS_DCACHE_SIZE`
			`default 32768`

MIPS: Split I & D cache line size config Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> 2016-05-27 21:28:05 +08:00			`config SYS_DCACHE_LINE_SIZE`
			`default 32`

MIPS: Move cache sizes to Kconfig Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton <paul.burton@imgtec.com> 2016-05-27 21:28:04 +08:00			`config SYS_ICACHE_SIZE`
			`default 65536`

MIPS: Split I & D cache line size config Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> 2016-05-27 21:28:05 +08:00			`config SYS_ICACHE_LINE_SIZE`
MIPS: Move cache sizes to Kconfig Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton <paul.burton@imgtec.com> 2016-05-27 21:28:04 +08:00			`default 32`

mips: ath79: add AP121 reference board This patch add board-level code and base DT for AP121. Signed-off-by: Wills Wang <wills.wang@live.com> [updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> 2016-03-16 16:59:59 +08:00			`endif`