2018-05-07 05:58:06 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2013-05-22 11:57:37 +08:00
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/*
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* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
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*/
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2013-11-09 18:22:08 +08:00
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#ifndef _MALTA_CONFIG_H
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#define _MALTA_CONFIG_H
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2013-05-22 11:57:37 +08:00
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/*
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* System configuration
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*/
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2013-11-09 18:22:08 +08:00
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#define CONFIG_MALTA
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2013-05-22 11:57:37 +08:00
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2013-10-24 20:32:00 +08:00
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#define CONFIG_MEMSIZE_IN_BYTES
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2013-05-22 11:57:42 +08:00
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#define CONFIG_PCI_GT64120
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2013-11-08 19:18:50 +08:00
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#define CONFIG_PCI_MSC01
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2013-05-22 11:57:42 +08:00
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2013-11-08 19:18:55 +08:00
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#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
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2013-05-22 11:57:37 +08:00
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/*
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* CPU Configuration
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*/
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#define CONFIG_SYS_MHZ 250 /* arbitrary value */
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#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
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/*
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* Memory map
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*/
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2013-11-12 23:47:32 +08:00
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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2013-05-22 11:57:37 +08:00
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2016-05-26 21:49:36 +08:00
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#ifdef CONFIG_64BIT
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# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
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#else
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# define CONFIG_SYS_SDRAM_BASE 0x80000000
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#endif
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2013-05-22 11:57:37 +08:00
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#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
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#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
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2016-05-26 21:49:36 +08:00
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
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2013-05-22 11:57:37 +08:00
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
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#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
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2013-11-27 01:45:28 +08:00
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#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
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2013-05-22 11:57:37 +08:00
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/*
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* Serial driver
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*/
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2016-05-17 14:43:27 +08:00
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#define CONFIG_SYS_NS16550_PORT_MAPPED
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2013-05-22 11:57:37 +08:00
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/*
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* Flash configuration
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*/
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2016-05-26 21:49:36 +08:00
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#ifdef CONFIG_64BIT
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# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
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#else
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# define CONFIG_SYS_FLASH_BASE 0xbe000000
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#endif
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2013-05-22 11:57:39 +08:00
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 128
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2013-05-22 11:57:37 +08:00
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2013-11-08 19:18:56 +08:00
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/*
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* Environment
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*/
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2015-01-29 18:38:20 +08:00
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/*
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* IDE/ATA
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*/
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#define CONFIG_SYS_IDE_MAXBUS 1
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#define CONFIG_SYS_IDE_MAXDEVICE 2
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#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
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#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
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#define CONFIG_SYS_ATA_DATA_OFFSET 0
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#define CONFIG_SYS_ATA_REG_OFFSET 0
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2013-05-22 11:57:37 +08:00
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/*
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* Commands
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*/
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2013-05-22 11:57:42 +08:00
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2013-11-09 18:22:08 +08:00
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#endif /* _MALTA_CONFIG_H */
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