2011-10-24 16:50:20 +08:00
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/*
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* Copyright 2010-2011 Calxeda, Inc.
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*
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2013-07-08 15:37:19 +08:00
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* SPDX-License-Identifier: GPL-2.0+
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2011-10-24 16:50:20 +08:00
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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2014-04-11 05:17:30 +08:00
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#include <config_distro_defaults.h>
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2013-06-13 11:24:47 +08:00
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#define CONFIG_SYS_DCACHE_OFF
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#define CONFIG_SYS_THUMB_BUILD
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2011-10-24 16:50:20 +08:00
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
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2013-10-04 23:22:43 +08:00
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#define CONFIG_SYS_TIMER_RATE (150000000/256)
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#define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4)
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#define CONFIG_SYS_TIMER_COUNTS_DOWN
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2011-10-24 16:50:20 +08:00
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
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#define CONFIG_PL011_SERIAL
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#define CONFIG_PL011_CLOCK 150000000
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#define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) }
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#define CONFIG_CONS_INDEX 0
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2013-06-13 11:24:47 +08:00
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#define CONFIG_BAUDRATE 115200
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2011-10-24 16:50:20 +08:00
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2012-02-02 00:57:54 +08:00
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#define CONFIG_BOOTCOUNT_LIMIT
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2012-08-17 01:55:41 +08:00
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#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
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#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
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2012-02-02 00:57:54 +08:00
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#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c
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2011-10-24 16:50:20 +08:00
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#define CONFIG_MISC_INIT_R
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2013-08-24 23:10:54 +08:00
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#define CONFIG_LIBATA
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2011-10-24 16:50:20 +08:00
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#define CONFIG_SCSI_AHCI
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#define CONFIG_SCSI_AHCI_PLAT
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 5
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#define CONFIG_SYS_SCSI_MAX_LUN 1
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#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
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CONFIG_SYS_SCSI_MAX_LUN)
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2011-12-15 19:15:50 +08:00
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#define CONFIG_CALXEDA_XGMAC
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2011-10-24 16:50:20 +08:00
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/*
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* Command line configuration.
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*/
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#define CONFIG_CMD_SCSI
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2013-06-13 11:24:51 +08:00
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#define CONFIG_BOOT_RETRY_TIME -1
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#define CONFIG_RESET_TO_RETRY
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2015-05-18 20:08:23 +08:00
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2011-10-24 16:50:20 +08:00
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/*
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* Miscellaneous configurable options
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*/
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2013-06-13 11:24:47 +08:00
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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2011-10-24 16:50:20 +08:00
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#define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT)+16)
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#define CONFIG_SYS_LOAD_ADDR 0x800000
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2013-06-13 11:24:47 +08:00
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#define CONFIG_SYS_64BIT_LBA
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2011-10-24 16:50:20 +08:00
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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2015-06-21 07:29:55 +08:00
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* The DRAM is already setup, so do not touch the DT node later.
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2011-10-24 16:50:20 +08:00
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*/
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2015-06-21 07:29:55 +08:00
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#define CONFIG_NR_DRAM_BANKS 0
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2011-10-24 16:50:20 +08:00
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#define PHYS_SDRAM_1_SIZE (4089 << 20)
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#define CONFIG_SYS_MEMTEST_START 0x100000
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#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000)
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2012-02-02 00:57:56 +08:00
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/* Environment data setup
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*/
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#define CONFIG_ENV_IS_IN_NVRAM
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#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */
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#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */
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#define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */
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#define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR
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2011-10-24 16:50:20 +08:00
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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2012-02-02 00:57:53 +08:00
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#define CONFIG_SYS_TEXT_BASE 0x00008000
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2011-10-24 16:50:20 +08:00
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#define CONFIG_SYS_INIT_SP_ADDR 0x01000000
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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