2004-10-12 07:10:30 +08:00
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The port was tested on Wind River System Sbc8560 board
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<www.windriver.com>. U-Boot was installed on the flash memory of the
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CPU card (no the SODIMM).
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2004-10-11 06:44:24 +08:00
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2004-10-12 07:10:30 +08:00
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NOTE: Please configure uboot compile to the proper PCI frequency and
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setup the appropriate DIP switch settings.
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2004-10-11 06:44:24 +08:00
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SBC8560 board:
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2004-10-12 07:10:30 +08:00
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Make sure boards switches are set to their appropriate conditions.
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Refer to the Engineering Reference Guide ERG-00300-002. Of particular
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importance are: 1) the settings for JP4 (JP4 1-3 and 2-4), which
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select the on-board FLASH device (Intel 28F128Jx); 2) The settings
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for the Clock SW9 (33 MHz or 66 MHz).
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2004-10-11 06:44:24 +08:00
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2004-10-12 07:10:30 +08:00
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Note: SW9 Settings: 66 MHz
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4:1 ratio CCB clocks:SYSCLK
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2004-10-11 06:44:24 +08:00
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3:1 ration e500 Core:CCB
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pos1 - on, pos2 - on, pos3 - off, pos4 - on, pos5 - off, pos6 - on
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2004-10-12 07:10:30 +08:00
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Note: SW9 Settings: 33 MHz
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2004-10-11 06:44:24 +08:00
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8:1 ratio CCB clocks:SYSCLK
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3:1 ration e500 Core:CCB
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pos1 - on, pos2 - on, pos3 - on, pos4 - off, pos5 - off, pos6 - on
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2004-10-12 07:10:30 +08:00
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2004-10-11 06:44:24 +08:00
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Flashing the FLASH device with the "Wind River ICE":
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2004-10-12 07:10:30 +08:00
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1) Properly connect and configure the Wind River ICE to the target
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JTAG port. This includes running the SBC8560 register script. Make
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sure target memory can be read and written.
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2004-10-11 06:44:24 +08:00
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2) Build the u-boot image:
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make distclean
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make SBC8560_66_config or SBC8560_33_config
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make CROSS_COMPILE=.../ELDK3.0/ppc_8xx-/ all
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2004-10-12 07:10:30 +08:00
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Note: reference is made to the ELDK3.0 compiler. Further, it seems
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the ppc_8xx compiler is required for the 85xx (no 85xx
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designated compiler in ELDK3.0)
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2004-10-11 06:44:24 +08:00
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2004-10-12 07:10:30 +08:00
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3) Convert the uboot (.elf) file to a uboot.bin file (using
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visionClick converter). The bin file should be converted from
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fffc0000 to ffffffff
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2004-10-11 06:44:24 +08:00
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4) Setup the Flash Utility (tools menu) for:
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2004-10-12 07:10:30 +08:00
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2004-10-11 06:44:24 +08:00
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Do a "dc clr" [visionClick] to load the default register settings
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Determine the clock speed of the PCI bus and set SW9 accordingly
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2004-10-12 07:10:30 +08:00
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Note: the speed of the PCI bus defaults to the slowest PCI card
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2004-10-11 06:44:24 +08:00
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PlayBack the "default" register file for the SBC8560
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Select the uboot.bin file with zero bias
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Select the initialize Target prior to programming
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Select the V28F640Jx (8192 x 8) 1 device FLASH Algorithm
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Select the erase base address from FFFC0000 to FFFFFFFF
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Select the start address from 0 with size of 4000
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5) Erase and Program
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