u-boot/include/configs/rpi_2.h

/*
 * (C) Copyright 2012,2015 Stephen Warren
 *
 * SPDX-License-Identifier:	GPL-2.0
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BCM2836
#define CONFIG_SYS_CACHELINE_SIZE		64
#define CONFIG_SYS_DCACHE_OFF

#include "rpi-common.h"

#endif
rpi: add support for Raspberry Pi 2 model B USB doesn't seem to work yet; the controller detects the on-board Hub/ Ethernet device but can't read the descriptors from it. I haven't investigated yet. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> 2015-02-17 03:16:15 +08:00			`/*`
			`* (C) Copyright 2012,2015 Stephen Warren`
			`*`
			`* SPDX-License-Identifier: GPL-2.0`
			`*/`

			`#ifndef __CONFIG_H`
			`#define __CONFIG_H`

			`#define CONFIG_SKIP_LOWLEVEL_INIT`
			`#define CONFIG_BCM2836`
ARM: bcm283x: Define CONFIG_SYS_CACHELINE_SIZE The cacheline is always 32 bytes for arm1176 CPUs, so define it at board config level for cache handling code. The ARM Cortex-A7 has a dcache line size of 64 bytes. Signed-off-by: Alexander Stein <alexanders83@web.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org> 2015-07-24 15:22:11 +08:00			`#define CONFIG_SYS_CACHELINE_SIZE 64`
arm/rpi: Enable dcache Now that mailbox driver supports cache flush and invalidation, we can enable dcache. Signed-off-by: Alexander Stein <alexanders83@web.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org> 2015-07-24 15:22:15 +08:00			`#define CONFIG_SYS_DCACHE_OFF`
rpi: add support for Raspberry Pi 2 model B USB doesn't seem to work yet; the controller detects the on-board Hub/ Ethernet device but can't read the descriptors from it. I haven't investigated yet. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> 2015-02-17 03:16:15 +08:00
			`#include "rpi-common.h"`

			`#endif`