mirrors/reactos
0
0
Fork 0
mirror of https://github.com/reactos/reactos.git synced 2024-11-23 19:43:31 +08:00
Code Issues Packages Projects Releases Wiki Activity

[NTOS:KE] Fix magic constants for x86 CPU features

Browse Source 
Do it the same way as in amd64 ke.h/cpu.c. CORE-18023
This commit is contained in:
Stanislav Motylkov 2023-06-30 17:06:19 +03:00
parent c7e4c3a8e9
commit 00715ccf8b
2 changed files with 42 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
ntoskrnl/include/internal/i386/ke.h
View File

@ -22,6 +22,30 @@ extern "C"
#define KD_BREAKPOINT_SIZE sizeof(UCHAR)
#define KD_BREAKPOINT_VALUE 0xCC
/* CPUID 1 - EDX flags */
#define X86_FEATURE_FPU 0x00000001 /* x87 FPU is present */
#define X86_FEATURE_VME 0x00000002 /* Virtual 8086 Extensions are present */
#define X86_FEATURE_DBG 0x00000004 /* Debugging extensions are present */
#define X86_FEATURE_PSE 0x00000008 /* Page Size Extension is present */
#define X86_FEATURE_TSC 0x00000010 /* Time Stamp Counters are present */
#define X86_FEATURE_PAE 0x00000040 /* Physical Address Extension is present */
#define X86_FEATURE_CX8 0x00000100 /* CMPXCHG8B instruction present */
#define X86_FEATURE_APIC 0x00000200 /* APIC is present */
#define X86_FEATURE_SYSCALL 0x00000800 /* SYSCALL/SYSRET support present */
#define X86_FEATURE_MTTR 0x00001000 /* Memory type range registers are present */
#define X86_FEATURE_PGE 0x00002000 /* Page Global Enable */
#define X86_FEATURE_CMOV 0x00008000 /* "Conditional move" instruction supported */
#define X86_FEATURE_PAT 0x00010000 /* Page Attribute Table is supported */
#define X86_FEATURE_DS 0x00200000 /* Debug Store is present */
#define X86_FEATURE_MMX 0x00800000 /* MMX extension present */
#define X86_FEATURE_FXSR 0x01000000 /* FXSAVE/FXRSTOR instructions present */
#define X86_FEATURE_SSE 0x02000000 /* SSE extension present */
#define X86_FEATURE_SSE2 0x04000000 /* SSE2 extension present */
#define X86_FEATURE_HT 0x10000000 /* Hyper-Threading present */
/* CPUID 0x80000001 - EDX extended flags */
#define X86_FEATURE_NX 0x00100000 /* NX support present */
//
// One-liners for getting and setting special purpose registers in portable code
//

36
ntoskrnl/ke/i386/cpu.c
View File

@ -365,28 +365,28 @@ KiGetFeatureBits(VOID)
CpuFeatures = CpuInfo.Edx;
/* Convert all CPUID Feature bits into our format */
if (CpuFeatures & 0x00000002) FeatureBits |= KF_V86_VIS | KF_CR4;
if (CpuFeatures & 0x00000008) FeatureBits |= KF_LARGE_PAGE | KF_CR4;
if (CpuFeatures & 0x00000010) FeatureBits |= KF_RDTSC;
if (CpuFeatures & 0x00000100) FeatureBits |= KF_CMPXCHG8B;
if (CpuFeatures & 0x00000800) FeatureBits |= KF_FAST_SYSCALL;
if (CpuFeatures & 0x00001000) FeatureBits |= KF_MTRR;
if (CpuFeatures & 0x00002000) FeatureBits |= KF_GLOBAL_PAGE | KF_CR4;
if (CpuFeatures & 0x00008000) FeatureBits |= KF_CMOV;
if (CpuFeatures & 0x00010000) FeatureBits |= KF_PAT;
if (CpuFeatures & 0x00200000) FeatureBits |= KF_DTS;
if (CpuFeatures & 0x00800000) FeatureBits |= KF_MMX;
if (CpuFeatures & 0x01000000) FeatureBits |= KF_FXSR;
if (CpuFeatures & 0x02000000) FeatureBits |= KF_XMMI;
if (CpuFeatures & 0x04000000) FeatureBits |= KF_XMMI64;
if (CpuFeatures & X86_FEATURE_VME) FeatureBits |= KF_V86_VIS | KF_CR4;
if (CpuFeatures & X86_FEATURE_PSE) FeatureBits |= KF_LARGE_PAGE | KF_CR4;
if (CpuFeatures & X86_FEATURE_TSC) FeatureBits |= KF_RDTSC;
if (CpuFeatures & X86_FEATURE_CX8) FeatureBits |= KF_CMPXCHG8B;
if (CpuFeatures & X86_FEATURE_SYSCALL) FeatureBits |= KF_FAST_SYSCALL;
if (CpuFeatures & X86_FEATURE_MTTR) FeatureBits |= KF_MTRR;
if (CpuFeatures & X86_FEATURE_PGE) FeatureBits |= KF_GLOBAL_PAGE | KF_CR4;
if (CpuFeatures & X86_FEATURE_CMOV) FeatureBits |= KF_CMOV;
if (CpuFeatures & X86_FEATURE_PAT) FeatureBits |= KF_PAT;
if (CpuFeatures & X86_FEATURE_DS) FeatureBits |= KF_DTS;
if (CpuFeatures & X86_FEATURE_MMX) FeatureBits |= KF_MMX;
if (CpuFeatures & X86_FEATURE_FXSR) FeatureBits |= KF_FXSR;
if (CpuFeatures & X86_FEATURE_SSE) FeatureBits |= KF_XMMI;
if (CpuFeatures & X86_FEATURE_SSE2) FeatureBits |= KF_XMMI64;
if (CpuFeatures & 0x00000040)
if (CpuFeatures & X86_FEATURE_PAE)
{
DPRINT1("Support PAE\n");
}
/* Check if the CPU has hyper-threading */
if (CpuFeatures & 0x10000000)
if (CpuFeatures & X86_FEATURE_HT)
{
/* Set the number of logical CPUs */
Prcb->LogicalProcessorsPerPhysicalProcessor = (UCHAR)(CpuInfo.Ebx >> 16);
@ -416,7 +416,7 @@ KiGetFeatureBits(VOID)
KiCpuId(&CpuInfo, 0x80000001);
/* Check if NX-bit is supported */
if (CpuInfo.Edx & 0x00100000) FeatureBits |= KF_NX_BIT;
if (CpuInfo.Edx & X86_FEATURE_NX) FeatureBits |= KF_NX_BIT;
/* Now handle each features for each CPU Vendor */
switch (Vendor)
@ -481,7 +481,7 @@ KiGetCacheInformation(VOID)
/* Handle Intel case */
case CPU_INTEL:
/*Check if we support CPUID 2 */
/* Check if we support CPUID 2 */
KiCpuId(&CpuInfo, 0);
if (CpuInfo.Eax >= 2)
{