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d19a4d4ef4
Advertise gsi routing and set up irqchip routing entries for GIC SPIs. This is not mandated as long as MSI routing is not used (because the kernel sets a default irqchip routing table). However once MSI routing gets used (for VIRTIO-PCI vhost for example), the first call to KVM_SET_GSI_ROUTING overrides the kernel default irqchip table. If no routing entry exists for the GSI, any IRQFD signaling for this GSI will fail. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1474616617-366-2-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
173 lines
5.2 KiB
C
173 lines
5.2 KiB
C
/*
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* ARM Generic Interrupt Controller using KVM in-kernel support
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*
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* Copyright (c) 2015 Samsung Electronics Co., Ltd.
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* Written by Pavel Fedin
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* Based on vGICv2 code by Peter Maydell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/intc/arm_gicv3_common.h"
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#include "hw/sysbus.h"
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#include "sysemu/kvm.h"
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#include "kvm_arm.h"
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#include "vgic_common.h"
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#include "migration/migration.h"
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#ifdef DEBUG_GICV3_KVM
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#define DPRINTF(fmt, ...) \
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do { fprintf(stderr, "kvm_gicv3: " fmt, ## __VA_ARGS__); } while (0)
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#else
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#define DPRINTF(fmt, ...) \
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do { } while (0)
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#endif
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#define TYPE_KVM_ARM_GICV3 "kvm-arm-gicv3"
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#define KVM_ARM_GICV3(obj) \
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OBJECT_CHECK(GICv3State, (obj), TYPE_KVM_ARM_GICV3)
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#define KVM_ARM_GICV3_CLASS(klass) \
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OBJECT_CLASS_CHECK(KVMARMGICv3Class, (klass), TYPE_KVM_ARM_GICV3)
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#define KVM_ARM_GICV3_GET_CLASS(obj) \
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OBJECT_GET_CLASS(KVMARMGICv3Class, (obj), TYPE_KVM_ARM_GICV3)
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typedef struct KVMARMGICv3Class {
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ARMGICv3CommonClass parent_class;
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DeviceRealize parent_realize;
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void (*parent_reset)(DeviceState *dev);
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} KVMARMGICv3Class;
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static void kvm_arm_gicv3_set_irq(void *opaque, int irq, int level)
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{
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GICv3State *s = (GICv3State *)opaque;
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kvm_arm_gic_set_irq(s->num_irq, irq, level);
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}
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static void kvm_arm_gicv3_put(GICv3State *s)
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{
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/* TODO */
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DPRINTF("Cannot put kernel gic state, no kernel interface\n");
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}
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static void kvm_arm_gicv3_get(GICv3State *s)
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{
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/* TODO */
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DPRINTF("Cannot get kernel gic state, no kernel interface\n");
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}
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static void kvm_arm_gicv3_reset(DeviceState *dev)
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{
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GICv3State *s = ARM_GICV3_COMMON(dev);
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KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s);
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DPRINTF("Reset\n");
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kgc->parent_reset(dev);
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kvm_arm_gicv3_put(s);
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}
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static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp)
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{
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GICv3State *s = KVM_ARM_GICV3(dev);
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KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s);
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Error *local_err = NULL;
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int i;
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DPRINTF("kvm_arm_gicv3_realize\n");
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kgc->parent_realize(dev, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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if (s->security_extn) {
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error_setg(errp, "the in-kernel VGICv3 does not implement the "
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"security extensions");
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return;
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}
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gicv3_init_irqs_and_mmio(s, kvm_arm_gicv3_set_irq, NULL);
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/* Try to create the device via the device control API */
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s->dev_fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_ARM_VGIC_V3, false);
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if (s->dev_fd < 0) {
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error_setg_errno(errp, -s->dev_fd, "error creating in-kernel VGIC");
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return;
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}
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kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_NR_IRQS,
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0, &s->num_irq, true);
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/* Tell the kernel to complete VGIC initialization now */
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kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
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KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true);
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kvm_arm_register_device(&s->iomem_dist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,
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KVM_VGIC_V3_ADDR_TYPE_DIST, s->dev_fd);
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kvm_arm_register_device(&s->iomem_redist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,
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KVM_VGIC_V3_ADDR_TYPE_REDIST, s->dev_fd);
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/* Block migration of a KVM GICv3 device: the API for saving and restoring
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* the state in the kernel is not yet finalised in the kernel or
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* implemented in QEMU.
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*/
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error_setg(&s->migration_blocker, "vGICv3 migration is not implemented");
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migrate_add_blocker(s->migration_blocker);
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if (kvm_has_gsi_routing()) {
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/* set up irq routing */
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kvm_init_irq_routing(kvm_state);
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for (i = 0; i < s->num_irq - GIC_INTERNAL; ++i) {
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kvm_irqchip_add_irq_route(kvm_state, i, 0, i);
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}
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kvm_gsi_routing_allowed = true;
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kvm_irqchip_commit_routes(kvm_state);
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}
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}
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static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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ARMGICv3CommonClass *agcc = ARM_GICV3_COMMON_CLASS(klass);
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KVMARMGICv3Class *kgc = KVM_ARM_GICV3_CLASS(klass);
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agcc->pre_save = kvm_arm_gicv3_get;
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agcc->post_load = kvm_arm_gicv3_put;
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kgc->parent_realize = dc->realize;
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kgc->parent_reset = dc->reset;
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dc->realize = kvm_arm_gicv3_realize;
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dc->reset = kvm_arm_gicv3_reset;
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}
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static const TypeInfo kvm_arm_gicv3_info = {
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.name = TYPE_KVM_ARM_GICV3,
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.parent = TYPE_ARM_GICV3_COMMON,
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.instance_size = sizeof(GICv3State),
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.class_init = kvm_arm_gicv3_class_init,
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.class_size = sizeof(KVMARMGICv3Class),
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};
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static void kvm_arm_gicv3_register_types(void)
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{
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type_register_static(&kvm_arm_gicv3_info);
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}
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type_init(kvm_arm_gicv3_register_types)
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