qemu/target
Peter Maydell ff9b547502 MIPS patches 2017-07-21
Changes:
 * Add Enhanced Virtual Addressing (EVA) support
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Merge remote-tracking branch 'remotes/yongbok/tags/mips-20170721' into staging

MIPS patches 2017-07-21

Changes:
* Add Enhanced Virtual Addressing (EVA) support

# gpg: Signature made Fri 21 Jul 2017 03:25:15 BST
# gpg:                using RSA key 0x2238EB86D5F797C2
# gpg: Good signature from "Yongbok Kim <yongbok.kim@imgtec.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8600 4CF5 3415 A5D9 4CFA  2B5C 2238 EB86 D5F7 97C2

* remotes/yongbok/tags/mips-20170721:
  target/mips: Enable CP0_EBase.WG on MIPS64 CPUs
  target/mips: Add EVA support to P5600
  target/mips: Implement segmentation control
  target/mips: Add segmentation control registers
  target/mips: Add an MMU mode for ERL
  target/mips: Abstract mmu_idx from hflags
  target/mips: Check memory permissions with mem_idx
  target/mips: Decode microMIPS EVA load & store instructions
  target/mips: Decode MIPS32 EVA load & store instructions
  target/mips: Prepare loads/stores for EVA
  target/mips: Add CP0_Ebase.WG (write gate) support
  target/mips: Weaken TLB flush on UX,SX,KX,ASID changes
  target/mips: Fix TLBWI shadow flush for EHINV,XI,RI
  target/mips: Fix MIPS64 MFC0 UserLocal on BE host

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-21 13:28:51 +01:00
..
alpha tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
arm tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
cris tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
hppa tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
i386 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
lm32 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
m68k tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
microblaze tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
mips target/mips: Enable CP0_EBase.WG on MIPS64 CPUs 2017-07-21 03:23:44 +01:00
moxie tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
nios2 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
openrisc tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
ppc Use qemu_tolower() and qemu_toupper(), not tolower() and toupper() 2017-07-21 10:32:41 +01:00
s390x tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
sh4 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
sparc tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
tilegx tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
tricore tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
unicore32 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
xtensa tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00