Peter Maydell 9df52f58e7 target-arm queue: ... * Implement ID_PFR2 * Conditionalize DBGDIDR * rename xlnx-zcu102.canbusN properties * provide powerdown/reset mechanism for secure firmware on 'virt' board * hw/misc: Fix arith overflow in NPCM7XX PWM module * target/arm: Replace magic value by MMU_DATA_LOAD definition * configure: fix preadv errors on Catalina macOS with new XCode * Various configure and other cleanups in preparation for iOS support * hvf: Add hypervisor entitlement to output binaries (needed for Big Sur) * Implement pvpanic-pci device * Convert the CMSDK timer devices to the Clock framework -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmAUMuIZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3m5ED/9uRVa571OwoyAztgS3HN6e Yi8ddj/isCB/shsJQn9Z6kOqg6WUejvLMyT3d3ulH81eje5s8s8xcGOkch8r7oV+ 2SAi80b92AdXsuIPqLeyx6dgJr8e/6MAzD8gYaAKEJsIbKWJFMb3O1OjyITrGM0N E1F3lLXAut9xxWXgvT+3ES2z+eRxI7gwr6PTDIoCQ5PqQUwqSt8hIn9VCZwaR6l1 3570Yy0ScfDCgAZmk6tUVaPJ3gz8BEE11Iuq2R5N8YtYO9570dZDuvsH0RLplRr2 Wns3ReggjySgB9qmL0ZEl7sLkUDKSS8ud9+75V6h69eUXRqdWUylKgEPjQOs9rFw lhLp0bz+J9KwC1UoQtUXA+/D9M+1xjj1iVhG4CWJe2p4xn5+gzCPz3RLQxLu4ekZ FLAEsph8ftqM9J4a1AsEUf6ghRkG2v/eSKaoBOl5Mq8BOaM+YEZ0T0ZeTQspM9tF iTHk22Ld2aX3aHCbXSnEfND+QEzQXgTQvUHXPTYpYAZPjK4PSfkm6CfsAlir71so TlxwTeoy94dnK4eQjcAHK9GnvRTt5AEImrmC89xAplMYtgBfGmMiFIDysvmCaedt EesNHhh3PAqh7wOiqVa96ALZeAys0LpoBVjzHlmXsfsRgUR+JzxKq3pq0PT1DMcn 92gWwHt3AAqEn4dZ20KxBw== =INlE -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210129-1' into staging target-arm queue: * Implement ID_PFR2 * Conditionalize DBGDIDR * rename xlnx-zcu102.canbusN properties * provide powerdown/reset mechanism for secure firmware on 'virt' board * hw/misc: Fix arith overflow in NPCM7XX PWM module * target/arm: Replace magic value by MMU_DATA_LOAD definition * configure: fix preadv errors on Catalina macOS with new XCode * Various configure and other cleanups in preparation for iOS support * hvf: Add hypervisor entitlement to output binaries (needed for Big Sur) * Implement pvpanic-pci device * Convert the CMSDK timer devices to the Clock framework # gpg: Signature made Fri 29 Jan 2021 16:08:02 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210129-1: (46 commits) hw/arm/stellaris: Remove board-creation reset of STELLARIS_SYS arm: Remove frq properties on CMSDK timer, dualtimer, watchdog, ARMSSE arm: Don't set freq properties on CMSDK timer, dualtimer, watchdog, ARMSSE hw/arm/armsse: Use Clock to set system_clock_scale tests/qtest/cmsdk-apb-watchdog-test: Test clock changes hw/watchdog/cmsdk-apb-watchdog: Convert to use Clock input hw/timer/cmsdk-apb-dualtimer: Convert to use Clock input hw/timer/cmsdk-apb-timer: Convert to use Clock input hw/arm/stellaris: Create Clock input for watchdog hw/arm/stellaris: Convert SSYS to QOM device hw/arm/musca: Create and connect ARMSSE Clocks hw/arm/mps2-tz: Create and connect ARMSSE Clocks hw/arm/mps2: Create and connect SYSCLK Clock hw/arm/mps2: Inline CMSDK_APB_TIMER creation hw/arm/armsse: Wire up clocks hw/arm/armsse: Rename "MAINCLK" property to "MAINCLK_FRQ" hw/watchdog/cmsdk-apb-watchdog: Add Clock input hw/timer/cmsdk-apb-dualtimer: Add Clock input hw/timer/cmsdk-apb-timer: Add Clock input hw/timer/cmsdk-apb-timer: Rename CMSDKAPBTIMER struct to CMSDKAPBTimer ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2021-01-29 17:22:53 +00:00
..
alpha	migration: Replace migration's JSON writer by the general one	2020-12-19 10:39:16 +01:00
arm	target/arm: Replace magic value by MMU_DATA_LOAD definition	2021-01-29 10:47:28 +00:00
avr	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
cris	cris tcg cpus: Fix Lesser GPL version number	2020-11-15 16:39:05 +01:00
hppa	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
i386	qapi: Use QAPI_LIST_APPEND in trivial cases	2021-01-28 08:08:45 +01:00
lm32	nomaintainer: Fix Lesser GPL version number	2020-11-15 17:04:40 +01:00
m68k	gdbstub: drop CPUEnv from gdb_exit()	2021-01-18 10:05:06 +00:00
microblaze	target/microblaze: Add security attributes on memory transactions	2021-01-27 08:32:55 +01:00
mips	target/mips: Remove vendor specific CPU definitions	2021-01-14 17:13:54 +01:00
moxie	qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros	2020-09-18 14:12:32 -04:00
nios2	gdbstub: drop CPUEnv from gdb_exit()	2021-01-18 10:05:06 +00:00
openrisc	migration: Replace migration's JSON writer by the general one	2020-12-19 10:39:16 +01:00
ppc	migration: Replace migration's JSON writer by the general one	2020-12-19 10:39:16 +01:00
riscv	Testing, gdbstub and semihosting patches:	2021-01-18 12:10:20 +00:00
rx	target/rx: Fix compiler errors for build with sanitizers	2021-01-29 09:31:53 +01:00
s390x	s390x: Use strpadcpy for copying vm name	2021-01-21 11:19:45 +01:00
sh4	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
sparc	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
tilegx	nomaintainer: Fix Lesser GPL version number	2020-11-15 17:04:40 +01:00
tricore	tcg: Make tb arg to synchronize_from_tb const	2021-01-07 05:09:41 -10:00
unicore32	target/unicore32/translate: Add missing fallthrough annotations	2020-12-18 09:14:22 +01:00
xtensa	xtensa tcg cpus: Fix Lesser GPL version number	2020-11-15 16:40:15 +01:00
meson.build	meson: target	2020-08-21 06:30:35 -04:00